\n
address_offset : 0x0 Bytes (0x0)
size : 0x41C byte (0x0)
mem_usage : registers
protection : not protected
desc OCCRWH
address_offset : 0x12 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc OCCRWL
address_offset : 0x16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc OCSRU
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OCEH : desc OCEH
bits : 0 - -1 (0 bit)
access : read-write
OCEL : desc OCEL
bits : 1 - 0 (0 bit)
access : read-write
OCPH : desc OCPH
bits : 2 - 1 (0 bit)
access : read-write
OCPL : desc OCPL
bits : 3 - 2 (0 bit)
access : read-write
OCIEH : desc OCIEH
bits : 4 - 3 (0 bit)
access : read-write
OCIEL : desc OCIEL
bits : 5 - 4 (0 bit)
access : read-write
OCFH : desc OCFH
bits : 6 - 5 (0 bit)
access : read-write
OCFL : desc OCFL
bits : 7 - 6 (0 bit)
access : read-write
desc OCERU
address_offset : 0x1A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHBUFEN : desc CHBUFEN
bits : 0 - 0 (1 bit)
access : read-write
CLBUFEN : desc CLBUFEN
bits : 2 - 2 (1 bit)
access : read-write
MHBUFEN : desc MHBUFEN
bits : 4 - 4 (1 bit)
access : read-write
MLBUFEN : desc MLBUFEN
bits : 6 - 6 (1 bit)
access : read-write
LMCH : desc LMCH
bits : 8 - 7 (0 bit)
access : read-write
LMCL : desc LMCL
bits : 9 - 8 (0 bit)
access : read-write
LMMH : desc LMMH
bits : 10 - 9 (0 bit)
access : read-write
LMML : desc LMML
bits : 11 - 10 (0 bit)
access : read-write
MCECH : desc MCECH
bits : 12 - 11 (0 bit)
access : read-write
MCECL : desc MCECL
bits : 13 - 12 (0 bit)
access : read-write
desc OCSRV
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OCEH : desc OCEH
bits : 0 - -1 (0 bit)
access : read-write
OCEL : desc OCEL
bits : 1 - 0 (0 bit)
access : read-write
OCPH : desc OCPH
bits : 2 - 1 (0 bit)
access : read-write
OCPL : desc OCPL
bits : 3 - 2 (0 bit)
access : read-write
OCIEH : desc OCIEH
bits : 4 - 3 (0 bit)
access : read-write
OCIEL : desc OCIEL
bits : 5 - 4 (0 bit)
access : read-write
OCFH : desc OCFH
bits : 6 - 5 (0 bit)
access : read-write
OCFL : desc OCFL
bits : 7 - 6 (0 bit)
access : read-write
desc OCERV
address_offset : 0x1E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHBUFEN : desc CHBUFEN
bits : 0 - 0 (1 bit)
access : read-write
CLBUFEN : desc CLBUFEN
bits : 2 - 2 (1 bit)
access : read-write
MHBUFEN : desc MHBUFEN
bits : 4 - 4 (1 bit)
access : read-write
MLBUFEN : desc MLBUFEN
bits : 6 - 6 (1 bit)
access : read-write
LMCH : desc LMCH
bits : 8 - 7 (0 bit)
access : read-write
LMCL : desc LMCL
bits : 9 - 8 (0 bit)
access : read-write
LMMH : desc LMMH
bits : 10 - 9 (0 bit)
access : read-write
LMML : desc LMML
bits : 11 - 10 (0 bit)
access : read-write
MCECH : desc MCECH
bits : 12 - 11 (0 bit)
access : read-write
MCECL : desc MCECL
bits : 13 - 12 (0 bit)
access : read-write
desc OCCRUH
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc OCSRW
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OCEH : desc OCEH
bits : 0 - -1 (0 bit)
access : read-write
OCEL : desc OCEL
bits : 1 - 0 (0 bit)
access : read-write
OCPH : desc OCPH
bits : 2 - 1 (0 bit)
access : read-write
OCPL : desc OCPL
bits : 3 - 2 (0 bit)
access : read-write
OCIEH : desc OCIEH
bits : 4 - 3 (0 bit)
access : read-write
OCIEL : desc OCIEL
bits : 5 - 4 (0 bit)
access : read-write
OCFH : desc OCFH
bits : 6 - 5 (0 bit)
access : read-write
OCFL : desc OCFL
bits : 7 - 6 (0 bit)
access : read-write
desc OCERW
address_offset : 0x22 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHBUFEN : desc CHBUFEN
bits : 0 - 0 (1 bit)
access : read-write
CLBUFEN : desc CLBUFEN
bits : 2 - 2 (1 bit)
access : read-write
MHBUFEN : desc MHBUFEN
bits : 4 - 4 (1 bit)
access : read-write
MLBUFEN : desc MLBUFEN
bits : 6 - 6 (1 bit)
access : read-write
LMCH : desc LMCH
bits : 8 - 7 (0 bit)
access : read-write
LMCL : desc LMCL
bits : 9 - 8 (0 bit)
access : read-write
LMMH : desc LMMH
bits : 10 - 9 (0 bit)
access : read-write
LMML : desc LMML
bits : 11 - 10 (0 bit)
access : read-write
MCECH : desc MCECH
bits : 12 - 11 (0 bit)
access : read-write
MCECL : desc MCECL
bits : 13 - 12 (0 bit)
access : read-write
desc OCMRHUH
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OCFDCH : desc OCFDCH
bits : 0 - -1 (0 bit)
access : read-write
OCFPKH : desc OCFPKH
bits : 1 - 0 (0 bit)
access : read-write
OCFUCH : desc OCFUCH
bits : 2 - 1 (0 bit)
access : read-write
OCFZRH : desc OCFZRH
bits : 3 - 2 (0 bit)
access : read-write
OPDCH : desc OPDCH
bits : 4 - 4 (1 bit)
access : read-write
OPPKH : desc OPPKH
bits : 6 - 6 (1 bit)
access : read-write
OPUCH : desc OPUCH
bits : 8 - 8 (1 bit)
access : read-write
OPZRH : desc OPZRH
bits : 10 - 10 (1 bit)
access : read-write
OPNPKH : desc OPNPKH
bits : 12 - 12 (1 bit)
access : read-write
OPNZRH : desc OPNZRH
bits : 14 - 14 (1 bit)
access : read-write
desc OCMRLUL
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OCFDCL : desc OCFDCL
bits : 0 - -1 (0 bit)
access : read-write
OCFPKL : desc OCFPKL
bits : 1 - 0 (0 bit)
access : read-write
OCFUCL : desc OCFUCL
bits : 2 - 1 (0 bit)
access : read-write
OCFZRL : desc OCFZRL
bits : 3 - 2 (0 bit)
access : read-write
OPDCL : desc OPDCL
bits : 4 - 4 (1 bit)
access : read-write
OPPKL : desc OPPKL
bits : 6 - 6 (1 bit)
access : read-write
OPUCL : desc OPUCL
bits : 8 - 8 (1 bit)
access : read-write
OPZRL : desc OPZRL
bits : 10 - 10 (1 bit)
access : read-write
OPNPKL : desc OPNPKL
bits : 12 - 12 (1 bit)
access : read-write
OPNZRL : desc OPNZRL
bits : 14 - 14 (1 bit)
access : read-write
EOPNDCL : desc EOPNDCL
bits : 16 - 16 (1 bit)
access : read-write
EOPNUCL : desc EOPNUCL
bits : 18 - 18 (1 bit)
access : read-write
EOPDCL : desc EOPDCL
bits : 20 - 20 (1 bit)
access : read-write
EOPPKL : desc EOPPKL
bits : 22 - 22 (1 bit)
access : read-write
EOPUCL : desc EOPUCL
bits : 24 - 24 (1 bit)
access : read-write
EOPZRL : desc EOPZRL
bits : 26 - 26 (1 bit)
access : read-write
EOPNPKL : desc EOPNPKL
bits : 28 - 28 (1 bit)
access : read-write
EOPNZRL : desc EOPNZRL
bits : 30 - 30 (1 bit)
access : read-write
desc OCMRHVH
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OCFDCH : desc OCFDCH
bits : 0 - -1 (0 bit)
access : read-write
OCFPKH : desc OCFPKH
bits : 1 - 0 (0 bit)
access : read-write
OCFUCH : desc OCFUCH
bits : 2 - 1 (0 bit)
access : read-write
OCFZRH : desc OCFZRH
bits : 3 - 2 (0 bit)
access : read-write
OPDCH : desc OPDCH
bits : 4 - 4 (1 bit)
access : read-write
OPPKH : desc OPPKH
bits : 6 - 6 (1 bit)
access : read-write
OPUCH : desc OPUCH
bits : 8 - 8 (1 bit)
access : read-write
OPZRH : desc OPZRH
bits : 10 - 10 (1 bit)
access : read-write
OPNPKH : desc OPNPKH
bits : 12 - 12 (1 bit)
access : read-write
OPNZRH : desc OPNZRH
bits : 14 - 14 (1 bit)
access : read-write
desc OCMRLVL
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OCFDCL : desc OCFDCL
bits : 0 - -1 (0 bit)
access : read-write
OCFPKL : desc OCFPKL
bits : 1 - 0 (0 bit)
access : read-write
OCFUCL : desc OCFUCL
bits : 2 - 1 (0 bit)
access : read-write
OCFZRL : desc OCFZRL
bits : 3 - 2 (0 bit)
access : read-write
OPDCL : desc OPDCL
bits : 4 - 4 (1 bit)
access : read-write
OPPKL : desc OPPKL
bits : 6 - 6 (1 bit)
access : read-write
OPUCL : desc OPUCL
bits : 8 - 8 (1 bit)
access : read-write
OPZRL : desc OPZRL
bits : 10 - 10 (1 bit)
access : read-write
OPNPKL : desc OPNPKL
bits : 12 - 12 (1 bit)
access : read-write
OPNZRL : desc OPNZRL
bits : 14 - 14 (1 bit)
access : read-write
EOPNDCL : desc EOPNDCL
bits : 16 - 16 (1 bit)
access : read-write
EOPNUCL : desc EOPNUCL
bits : 18 - 18 (1 bit)
access : read-write
EOPDCL : desc EOPDCL
bits : 20 - 20 (1 bit)
access : read-write
EOPPKL : desc EOPPKL
bits : 22 - 22 (1 bit)
access : read-write
EOPUCL : desc EOPUCL
bits : 24 - 24 (1 bit)
access : read-write
EOPZRL : desc EOPZRL
bits : 26 - 26 (1 bit)
access : read-write
EOPNPKL : desc EOPNPKL
bits : 28 - 28 (1 bit)
access : read-write
EOPNZRL : desc EOPNZRL
bits : 30 - 30 (1 bit)
access : read-write
desc OCMRHWH
address_offset : 0x34 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OCFDCH : desc OCFDCH
bits : 0 - -1 (0 bit)
access : read-write
OCFPKH : desc OCFPKH
bits : 1 - 0 (0 bit)
access : read-write
OCFUCH : desc OCFUCH
bits : 2 - 1 (0 bit)
access : read-write
OCFZRH : desc OCFZRH
bits : 3 - 2 (0 bit)
access : read-write
OPDCH : desc OPDCH
bits : 4 - 4 (1 bit)
access : read-write
OPPKH : desc OPPKH
bits : 6 - 6 (1 bit)
access : read-write
OPUCH : desc OPUCH
bits : 8 - 8 (1 bit)
access : read-write
OPZRH : desc OPZRH
bits : 10 - 10 (1 bit)
access : read-write
OPNPKH : desc OPNPKH
bits : 12 - 12 (1 bit)
access : read-write
OPNZRH : desc OPNZRH
bits : 14 - 14 (1 bit)
access : read-write
desc OCMRLWL
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OCFDCL : desc OCFDCL
bits : 0 - -1 (0 bit)
access : read-write
OCFPKL : desc OCFPKL
bits : 1 - 0 (0 bit)
access : read-write
OCFUCL : desc OCFUCL
bits : 2 - 1 (0 bit)
access : read-write
OCFZRL : desc OCFZRL
bits : 3 - 2 (0 bit)
access : read-write
OPDCL : desc OPDCL
bits : 4 - 4 (1 bit)
access : read-write
OPPKL : desc OPPKL
bits : 6 - 6 (1 bit)
access : read-write
OPUCL : desc OPUCL
bits : 8 - 8 (1 bit)
access : read-write
OPZRL : desc OPZRL
bits : 10 - 10 (1 bit)
access : read-write
OPNPKL : desc OPNPKL
bits : 12 - 12 (1 bit)
access : read-write
OPNZRL : desc OPNZRL
bits : 14 - 14 (1 bit)
access : read-write
EOPNDCL : desc EOPNDCL
bits : 16 - 16 (1 bit)
access : read-write
EOPNUCL : desc EOPNUCL
bits : 18 - 18 (1 bit)
access : read-write
EOPDCL : desc EOPDCL
bits : 20 - 20 (1 bit)
access : read-write
EOPPKL : desc EOPPKL
bits : 22 - 22 (1 bit)
access : read-write
EOPUCL : desc EOPUCL
bits : 24 - 24 (1 bit)
access : read-write
EOPZRL : desc EOPZRL
bits : 26 - 26 (1 bit)
access : read-write
EOPNPKL : desc EOPNPKL
bits : 28 - 28 (1 bit)
access : read-write
EOPNZRL : desc EOPNZRL
bits : 30 - 30 (1 bit)
access : read-write
desc ECSR
address_offset : 0x418 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EMBVAL : desc EMBVAL
bits : 0 - 1 (2 bit)
access : read-write
desc CPSR
address_offset : 0x42 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc CNTR
address_offset : 0x46 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc CCSR
address_offset : 0x48 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CKDIV : desc CKDIV
bits : 0 - 2 (3 bit)
access : read-write
CLEAR : desc CLEAR
bits : 4 - 3 (0 bit)
access : read-write
MODE : desc MODE
bits : 5 - 4 (0 bit)
access : read-write
STOP : desc STOP
bits : 6 - 5 (0 bit)
access : read-write
BUFEN : desc BUFEN
bits : 7 - 6 (0 bit)
access : read-write
IRQPEN : desc IRQPEN
bits : 8 - 7 (0 bit)
access : read-write
IRQPF : desc IRQPF
bits : 9 - 8 (0 bit)
access : read-write
IRQZEN : desc IRQZEN
bits : 13 - 12 (0 bit)
access : read-write
IRQZF : desc IRQZF
bits : 14 - 13 (0 bit)
access : read-write
ECKEN : desc ECKEN
bits : 15 - 14 (0 bit)
access : read-write
desc CVPR
address_offset : 0x4A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ZIM : desc ZIM
bits : 0 - 2 (3 bit)
access : read-write
PIM : desc PIM
bits : 4 - 6 (3 bit)
access : read-write
ZIC : desc ZIC
bits : 8 - 10 (3 bit)
access : read-only
PIC : desc PIC
bits : 12 - 14 (3 bit)
access : read-only
desc OCCRUL
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc PFSRU
address_offset : 0x82 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc PDARU
address_offset : 0x84 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc PDBRU
address_offset : 0x86 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc PFSRV
address_offset : 0x8A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc PDARV
address_offset : 0x8C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc PDBRV
address_offset : 0x8E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc PFSRW
address_offset : 0x92 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc PDARW
address_offset : 0x94 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc PDBRW
address_offset : 0x96 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc POCRU
address_offset : 0x98 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIVCK : desc DIVCK
bits : 0 - 1 (2 bit)
access : read-write
PWMMD : desc PWMMD
bits : 4 - 4 (1 bit)
access : read-write
LVLS : desc LVLS
bits : 6 - 6 (1 bit)
access : read-write
desc POCRV
address_offset : 0x9C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIVCK : desc DIVCK
bits : 0 - 1 (2 bit)
access : read-write
PWMMD : desc PWMMD
bits : 4 - 4 (1 bit)
access : read-write
LVLS : desc LVLS
bits : 6 - 6 (1 bit)
access : read-write
desc OCCRVH
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc POCRW
address_offset : 0xA0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIVCK : desc DIVCK
bits : 0 - 1 (2 bit)
access : read-write
PWMMD : desc PWMMD
bits : 4 - 4 (1 bit)
access : read-write
LVLS : desc LVLS
bits : 6 - 6 (1 bit)
access : read-write
desc RCSR
address_offset : 0xA4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTIDU : desc RTIDU
bits : 0 - -1 (0 bit)
access : read-write
RTIDV : desc RTIDV
bits : 1 - 0 (0 bit)
access : read-write
RTIDW : desc RTIDW
bits : 2 - 1 (0 bit)
access : read-write
RTIFU : desc RTIFU
bits : 4 - 3 (0 bit)
access : read-only
RTICU : desc RTICU
bits : 5 - 4 (0 bit)
access : read-write
RTEU : desc RTEU
bits : 6 - 5 (0 bit)
access : read-write
RTSU : desc RTSU
bits : 7 - 6 (0 bit)
access : read-write
RTIFV : desc RTIFV
bits : 8 - 7 (0 bit)
access : read-only
RTICV : desc RTICV
bits : 9 - 8 (0 bit)
access : read-write
RTEV : desc RTEV
bits : 10 - 9 (0 bit)
access : read-write
RTSV : desc RTSV
bits : 11 - 10 (0 bit)
access : read-write
RTIFW : desc RTIFW
bits : 12 - 11 (0 bit)
access : read-only
RTICW : desc RTICW
bits : 13 - 12 (0 bit)
access : read-write
RTEW : desc RTEW
bits : 14 - 13 (0 bit)
access : read-write
RTSW : desc RTSW
bits : 15 - 14 (0 bit)
access : read-write
desc SCCRUH
address_offset : 0xB2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc SCCRUL
address_offset : 0xB6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc SCCRVH
address_offset : 0xBA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc SCCRVL
address_offset : 0xBE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc SCCRWH
address_offset : 0xC2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc SCCRWL
address_offset : 0xC6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
desc SCSRUH
address_offset : 0xC8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUFEN : desc BUFEN
bits : 0 - 0 (1 bit)
access : read-write
EVTOS : desc EVTOS
bits : 2 - 3 (2 bit)
access : read-write
LMC : desc LMC
bits : 5 - 4 (0 bit)
access : read-write
EVTMS : desc EVTMS
bits : 8 - 7 (0 bit)
access : read-write
EVTDS : desc EVTDS
bits : 9 - 8 (0 bit)
access : read-write
DEN : desc DEN
bits : 12 - 11 (0 bit)
access : read-write
PEN : desc PEN
bits : 13 - 12 (0 bit)
access : read-write
UEN : desc UEN
bits : 14 - 13 (0 bit)
access : read-write
ZEN : desc ZEN
bits : 15 - 14 (0 bit)
access : read-write
desc SCMRUH
address_offset : 0xCA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AMC : desc AMC
bits : 0 - 2 (3 bit)
access : read-write
MZCE : desc MZCE
bits : 6 - 5 (0 bit)
access : read-write
MPCE : desc MPCE
bits : 7 - 6 (0 bit)
access : read-write
desc SCSRUL
address_offset : 0xCC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUFEN : desc BUFEN
bits : 0 - 0 (1 bit)
access : read-write
EVTOS : desc EVTOS
bits : 2 - 3 (2 bit)
access : read-write
LMC : desc LMC
bits : 5 - 4 (0 bit)
access : read-write
EVTMS : desc EVTMS
bits : 8 - 7 (0 bit)
access : read-write
EVTDS : desc EVTDS
bits : 9 - 8 (0 bit)
access : read-write
DEN : desc DEN
bits : 12 - 11 (0 bit)
access : read-write
PEN : desc PEN
bits : 13 - 12 (0 bit)
access : read-write
UEN : desc UEN
bits : 14 - 13 (0 bit)
access : read-write
ZEN : desc ZEN
bits : 15 - 14 (0 bit)
access : read-write
desc SCMRUL
address_offset : 0xCE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AMC : desc AMC
bits : 0 - 2 (3 bit)
access : read-write
MZCE : desc MZCE
bits : 6 - 5 (0 bit)
access : read-write
MPCE : desc MPCE
bits : 7 - 6 (0 bit)
access : read-write
desc SCSRVH
address_offset : 0xD0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUFEN : desc BUFEN
bits : 0 - 0 (1 bit)
access : read-write
EVTOS : desc EVTOS
bits : 2 - 3 (2 bit)
access : read-write
LMC : desc LMC
bits : 5 - 4 (0 bit)
access : read-write
EVTMS : desc EVTMS
bits : 8 - 7 (0 bit)
access : read-write
EVTDS : desc EVTDS
bits : 9 - 8 (0 bit)
access : read-write
DEN : desc DEN
bits : 12 - 11 (0 bit)
access : read-write
PEN : desc PEN
bits : 13 - 12 (0 bit)
access : read-write
UEN : desc UEN
bits : 14 - 13 (0 bit)
access : read-write
ZEN : desc ZEN
bits : 15 - 14 (0 bit)
access : read-write
desc SCMRVH
address_offset : 0xD2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AMC : desc AMC
bits : 0 - 2 (3 bit)
access : read-write
MZCE : desc MZCE
bits : 6 - 5 (0 bit)
access : read-write
MPCE : desc MPCE
bits : 7 - 6 (0 bit)
access : read-write
desc SCSRVL
address_offset : 0xD4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUFEN : desc BUFEN
bits : 0 - 0 (1 bit)
access : read-write
EVTOS : desc EVTOS
bits : 2 - 3 (2 bit)
access : read-write
LMC : desc LMC
bits : 5 - 4 (0 bit)
access : read-write
EVTMS : desc EVTMS
bits : 8 - 7 (0 bit)
access : read-write
EVTDS : desc EVTDS
bits : 9 - 8 (0 bit)
access : read-write
DEN : desc DEN
bits : 12 - 11 (0 bit)
access : read-write
PEN : desc PEN
bits : 13 - 12 (0 bit)
access : read-write
UEN : desc UEN
bits : 14 - 13 (0 bit)
access : read-write
ZEN : desc ZEN
bits : 15 - 14 (0 bit)
access : read-write
desc SCMRVL
address_offset : 0xD6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AMC : desc AMC
bits : 0 - 2 (3 bit)
access : read-write
MZCE : desc MZCE
bits : 6 - 5 (0 bit)
access : read-write
MPCE : desc MPCE
bits : 7 - 6 (0 bit)
access : read-write
desc SCSRWH
address_offset : 0xD8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUFEN : desc BUFEN
bits : 0 - 0 (1 bit)
access : read-write
EVTOS : desc EVTOS
bits : 2 - 3 (2 bit)
access : read-write
LMC : desc LMC
bits : 5 - 4 (0 bit)
access : read-write
EVTMS : desc EVTMS
bits : 8 - 7 (0 bit)
access : read-write
EVTDS : desc EVTDS
bits : 9 - 8 (0 bit)
access : read-write
DEN : desc DEN
bits : 12 - 11 (0 bit)
access : read-write
PEN : desc PEN
bits : 13 - 12 (0 bit)
access : read-write
UEN : desc UEN
bits : 14 - 13 (0 bit)
access : read-write
ZEN : desc ZEN
bits : 15 - 14 (0 bit)
access : read-write
desc SCMRWH
address_offset : 0xDA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AMC : desc AMC
bits : 0 - 2 (3 bit)
access : read-write
MZCE : desc MZCE
bits : 6 - 5 (0 bit)
access : read-write
MPCE : desc MPCE
bits : 7 - 6 (0 bit)
access : read-write
desc SCSRWL
address_offset : 0xDC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUFEN : desc BUFEN
bits : 0 - 0 (1 bit)
access : read-write
EVTOS : desc EVTOS
bits : 2 - 3 (2 bit)
access : read-write
LMC : desc LMC
bits : 5 - 4 (0 bit)
access : read-write
EVTMS : desc EVTMS
bits : 8 - 7 (0 bit)
access : read-write
EVTDS : desc EVTDS
bits : 9 - 8 (0 bit)
access : read-write
DEN : desc DEN
bits : 12 - 11 (0 bit)
access : read-write
PEN : desc PEN
bits : 13 - 12 (0 bit)
access : read-write
UEN : desc UEN
bits : 14 - 13 (0 bit)
access : read-write
ZEN : desc ZEN
bits : 15 - 14 (0 bit)
access : read-write
desc SCMRWL
address_offset : 0xDE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AMC : desc AMC
bits : 0 - 2 (3 bit)
access : read-write
MZCE : desc MZCE
bits : 6 - 5 (0 bit)
access : read-write
MPCE : desc MPCE
bits : 7 - 6 (0 bit)
access : read-write
desc OCCRVL
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
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