\n

ICG

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected

Registers

ICG0

ICG4

ICG5

ICG6

ICG7

ICG1

ICG2

ICG3


ICG0

desc ICG0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ICG0 ICG0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SWDTAUTS SWDTITS SWDTPERI SWDTCKS SWDTWDPT SWDTSLPOFF HRCREQS NMIFCLK NMIFEN NMITRG NMIEN NMIICGENA

SWDTAUTS : desc SWDTAUTS
bits : 0 - -1 (0 bit)
access : read-only

SWDTITS : desc SWDTITS
bits : 1 - 0 (0 bit)
access : read-only

SWDTPERI : desc SWDTPERI
bits : 2 - 2 (1 bit)
access : read-only

SWDTCKS : desc SWDTCKS
bits : 4 - 6 (3 bit)
access : read-only

SWDTWDPT : desc SWDTWDPT
bits : 8 - 10 (3 bit)
access : read-only

SWDTSLPOFF : desc SWDTSLPOFF
bits : 12 - 11 (0 bit)
access : read-only

HRCREQS : desc HRCREQS
bits : 16 - 18 (3 bit)
access : read-only

NMIFCLK : desc NMIFCLK
bits : 26 - 26 (1 bit)
access : read-only

NMIFEN : desc NMIFEN
bits : 28 - 27 (0 bit)
access : read-only

NMITRG : desc NMITRG
bits : 29 - 28 (0 bit)
access : read-only

NMIEN : desc NMIEN
bits : 30 - 29 (0 bit)
access : read-only

NMIICGENA : desc NMIICGENA
bits : 31 - 30 (0 bit)
access : read-only


ICG4

desc ICG4
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ICG4 ICG4 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ICG5

desc ICG5
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ICG5 ICG5 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ICG6

desc ICG6
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ICG6 ICG6 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ICG7

desc ICG7
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ICG7 ICG7 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ICG1

desc ICG1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ICG1 ICG1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DFS DFDIS LVDLVL NMIS IRS IRDIS LVDDIS

DFS : desc DFS
bits : 0 - 0 (1 bit)
access : read-only

DFDIS : desc DFDIS
bits : 2 - 1 (0 bit)
access : read-only

LVDLVL : desc LVDLVL
bits : 8 - 10 (3 bit)
access : read-only

NMIS : desc NMIS
bits : 12 - 11 (0 bit)
access : read-only

IRS : desc IRS
bits : 13 - 12 (0 bit)
access : read-only

IRDIS : desc IRDIS
bits : 14 - 13 (0 bit)
access : read-only

LVDDIS : desc LVDDIS
bits : 15 - 14 (0 bit)
access : read-only


ICG2

desc ICG2
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ICG2 ICG2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ICG3

desc ICG3
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ICG3 ICG3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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