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TMRA

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x200 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CNTER

CCONR1

CCONR2

PCONR1

PCONR2

PERAR

CMPAR1

CMPAR2

BCSTR

HCONR

HCUPR

HCDOR

ICONR

ECONR

FCONR

STFLR

BCONR


CNTER

desc CNTER
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CNTER CNTER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT

CNT : desc CNT
bits : 0 - 14 (15 bit)
access : read-write


CCONR1

desc CCONR1
address_offset : 0x100 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCONR1 CCONR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPMD HICP0 HICP1 HICP2 NOFIENCP NOFICKCP

CAPMD : desc CAPMD
bits : 0 - -1 (0 bit)
access : read-write

HICP0 : desc HICP0
bits : 4 - 3 (0 bit)
access : read-write

HICP1 : desc HICP1
bits : 5 - 4 (0 bit)
access : read-write

HICP2 : desc HICP2
bits : 6 - 5 (0 bit)
access : read-write

NOFIENCP : desc NOFIENCP
bits : 12 - 11 (0 bit)
access : read-write

NOFICKCP : desc NOFICKCP
bits : 13 - 13 (1 bit)
access : read-write


CCONR2

desc CCONR2
address_offset : 0x104 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCONR2 CCONR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPMD HICP0 HICP1 HICP2 NOFIENCP NOFICKCP

CAPMD : desc CAPMD
bits : 0 - -1 (0 bit)
access : read-write

HICP0 : desc HICP0
bits : 4 - 3 (0 bit)
access : read-write

HICP1 : desc HICP1
bits : 5 - 4 (0 bit)
access : read-write

HICP2 : desc HICP2
bits : 6 - 5 (0 bit)
access : read-write

NOFIENCP : desc NOFIENCP
bits : 12 - 11 (0 bit)
access : read-write

NOFICKCP : desc NOFICKCP
bits : 13 - 13 (1 bit)
access : read-write


PCONR1

desc PCONR1
address_offset : 0x140 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCONR1 PCONR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STAC STPC CMPC PERC FORC OUTEN

STAC : desc STAC
bits : 0 - 0 (1 bit)
access : read-write

STPC : desc STPC
bits : 2 - 2 (1 bit)
access : read-write

CMPC : desc CMPC
bits : 4 - 4 (1 bit)
access : read-write

PERC : desc PERC
bits : 6 - 6 (1 bit)
access : read-write

FORC : desc FORC
bits : 8 - 8 (1 bit)
access : read-write

OUTEN : desc OUTEN
bits : 12 - 11 (0 bit)
access : read-write


PCONR2

desc PCONR2
address_offset : 0x144 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCONR2 PCONR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STAC STPC CMPC PERC FORC OUTEN

STAC : desc STAC
bits : 0 - 0 (1 bit)
access : read-write

STPC : desc STPC
bits : 2 - 2 (1 bit)
access : read-write

CMPC : desc CMPC
bits : 4 - 4 (1 bit)
access : read-write

PERC : desc PERC
bits : 6 - 6 (1 bit)
access : read-write

FORC : desc FORC
bits : 8 - 8 (1 bit)
access : read-write

OUTEN : desc OUTEN
bits : 12 - 11 (0 bit)
access : read-write


PERAR

desc PERAR
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PERAR PERAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PER

PER : desc PER
bits : 0 - 14 (15 bit)
access : read-write


CMPAR1

desc CMPAR1
address_offset : 0x40 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPAR1 CMPAR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP

CMP : desc CMP
bits : 0 - 14 (15 bit)
access : read-write


CMPAR2

desc CMPAR2
address_offset : 0x44 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPAR2 CMPAR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP

CMP : desc CMP
bits : 0 - 14 (15 bit)
access : read-write


BCSTR

desc BCSTR
address_offset : 0x80 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BCSTR BCSTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 START DIR MODE CKDIV OVSTP INENOVF INENUDF OVFF UDFF

START : desc START
bits : 0 - -1 (0 bit)
access : read-write

DIR : desc DIR
bits : 1 - 0 (0 bit)
access : read-write

MODE : desc MODE
bits : 2 - 1 (0 bit)
access : read-write

CKDIV : desc CKDIV
bits : 4 - 6 (3 bit)
access : read-write

OVSTP : desc OVSTP
bits : 8 - 7 (0 bit)
access : read-write

INENOVF : desc INENOVF
bits : 12 - 11 (0 bit)
access : read-write

INENUDF : desc INENUDF
bits : 13 - 12 (0 bit)
access : read-write

OVFF : desc OVFF
bits : 14 - 13 (0 bit)
access : read-write

UDFF : desc UDFF
bits : 15 - 14 (0 bit)
access : read-write


HCONR

desc HCONR
address_offset : 0x84 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HCONR HCONR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HSTA0 HSTA1 HSTA2 HSTP0 HSTP1 HSTP2 HCLE0 HCLE1 HCLE2

HSTA0 : desc HSTA0
bits : 0 - -1 (0 bit)
access : read-write

HSTA1 : desc HSTA1
bits : 1 - 0 (0 bit)
access : read-write

HSTA2 : desc HSTA2
bits : 2 - 1 (0 bit)
access : read-write

HSTP0 : desc HSTP0
bits : 4 - 3 (0 bit)
access : read-write

HSTP1 : desc HSTP1
bits : 5 - 4 (0 bit)
access : read-write

HSTP2 : desc HSTP2
bits : 6 - 5 (0 bit)
access : read-write

HCLE0 : desc HCLE0
bits : 8 - 7 (0 bit)
access : read-write

HCLE1 : desc HCLE1
bits : 9 - 8 (0 bit)
access : read-write

HCLE2 : desc HCLE2
bits : 10 - 9 (0 bit)
access : read-write


HCUPR

desc HCUPR
address_offset : 0x88 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HCUPR HCUPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HCUP0 HCUP1 HCUP2 HCUP3 HCUP4 HCUP5 HCUP6 HCUP7 HCUP8 HCUP9 HCUP10

HCUP0 : desc HCUP0
bits : 0 - -1 (0 bit)
access : read-write

HCUP1 : desc HCUP1
bits : 1 - 0 (0 bit)
access : read-write

HCUP2 : desc HCUP2
bits : 2 - 1 (0 bit)
access : read-write

HCUP3 : desc HCUP3
bits : 3 - 2 (0 bit)
access : read-write

HCUP4 : desc HCUP4
bits : 4 - 3 (0 bit)
access : read-write

HCUP5 : desc HCUP5
bits : 5 - 4 (0 bit)
access : read-write

HCUP6 : desc HCUP6
bits : 6 - 5 (0 bit)
access : read-write

HCUP7 : desc HCUP7
bits : 7 - 6 (0 bit)
access : read-write

HCUP8 : desc HCUP8
bits : 8 - 7 (0 bit)
access : read-write

HCUP9 : desc HCUP9
bits : 9 - 8 (0 bit)
access : read-write

HCUP10 : desc HCUP10
bits : 10 - 9 (0 bit)
access : read-write


HCDOR

desc HCDOR
address_offset : 0x8C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HCDOR HCDOR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HCDO0 HCDO1 HCDO2 HCDO3 HCDO4 HCDO5 HCDO6 HCDO7 HCDO8 HCDO9 HCDO10

HCDO0 : desc HCDO0
bits : 0 - -1 (0 bit)
access : read-write

HCDO1 : desc HCDO1
bits : 1 - 0 (0 bit)
access : read-write

HCDO2 : desc HCDO2
bits : 2 - 1 (0 bit)
access : read-write

HCDO3 : desc HCDO3
bits : 3 - 2 (0 bit)
access : read-write

HCDO4 : desc HCDO4
bits : 4 - 3 (0 bit)
access : read-write

HCDO5 : desc HCDO5
bits : 5 - 4 (0 bit)
access : read-write

HCDO6 : desc HCDO6
bits : 6 - 5 (0 bit)
access : read-write

HCDO7 : desc HCDO7
bits : 7 - 6 (0 bit)
access : read-write

HCDO8 : desc HCDO8
bits : 8 - 7 (0 bit)
access : read-write

HCDO9 : desc HCDO9
bits : 9 - 8 (0 bit)
access : read-write

HCDO10 : desc HCDO10
bits : 10 - 9 (0 bit)
access : read-write


ICONR

desc ICONR
address_offset : 0x90 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICONR ICONR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ITEN1 ITEN2

ITEN1 : desc ITEN1
bits : 0 - -1 (0 bit)
access : read-write

ITEN2 : desc ITEN2
bits : 1 - 0 (0 bit)
access : read-write


ECONR

desc ECONR
address_offset : 0x94 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ECONR ECONR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ETEN1 ETEN2

ETEN1 : desc ETEN1
bits : 0 - -1 (0 bit)
access : read-write

ETEN2 : desc ETEN2
bits : 1 - 0 (0 bit)
access : read-write


FCONR

desc FCONR
address_offset : 0x98 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCONR FCONR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NOFIENTG NOFICKTG NOFIENCA NOFICKCA NOFIENCB NOFICKCB

NOFIENTG : desc NOFIENTG
bits : 0 - -1 (0 bit)
access : read-write

NOFICKTG : desc NOFICKTG
bits : 1 - 1 (1 bit)
access : read-write

NOFIENCA : desc NOFIENCA
bits : 8 - 7 (0 bit)
access : read-write

NOFICKCA : desc NOFICKCA
bits : 9 - 9 (1 bit)
access : read-write

NOFIENCB : desc NOFIENCB
bits : 12 - 11 (0 bit)
access : read-write

NOFICKCB : desc NOFICKCB
bits : 13 - 13 (1 bit)
access : read-write


STFLR

desc STFLR
address_offset : 0x9C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STFLR STFLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPF1 CMPF2

CMPF1 : desc CMPF1
bits : 0 - -1 (0 bit)
access : read-write

CMPF2 : desc CMPF2
bits : 1 - 0 (0 bit)
access : read-write


BCONR

desc BCONR
address_offset : 0xC0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BCONR BCONR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BEN BSE0 BSE1

BEN : desc BEN
bits : 0 - -1 (0 bit)
access : read-write

BSE0 : desc BSE0
bits : 1 - 0 (0 bit)
access : read-write

BSE1 : desc BSE1
bits : 2 - 1 (0 bit)
access : read-write



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