Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x50 byte (0x0)
mem_usage : registers
protection : not protected
ADC1 Control and Status Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PD_N : ADC1 Power Down Signal
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : POWER DOWN
ADC1 is powered down
0b1 : ACTIVE
ADC1 is switched on
End of enumeration elements list.
SOOC : ADC1 Start of Offset Calibration (software mode)
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
no offset calibration is started
0b1 : Enable
offset calibration is started
End of enumeration elements list.
SOS : ADC1 Start of Sampling/Conversion (software mode)
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
no conversion is started
0b1 : Enable
conversion is started
End of enumeration elements list.
READY : HVADC Ready bit
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : Not ready
Module in power down or in init phase
0b1 : Ready
set automatically 5 ADC clock cycles after module is enabled
End of enumeration elements list.
CAL_SIGN : Output of Comparator to Steer Gain / Offset calibration
bits : 5 - 4 (0 bit)
access : read-only
EOC : ADC1 End of Conversion (software mode)
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
0b0 : Pending
conversion still running
0b1 : Finished
conversion has finished
End of enumeration elements list.
SW_CH_SEL : Channel for software mode
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
0b0000 : CH0_EN
Channel 0 enable
0b0001 : CH1_EN
Channel 1 enable
0b0010 : CH2_EN
Channel 2 enable
0b0011 : CH3_EN
Channel 3 enable
0b0100 : CH4_EN
Channel 4 enable
0b0101 : CH5_EN
Channel 5 enable
0b0110 : CH6_EN
Channel 6 enable
0b0111 : CH7_EN
Channel 7 enable
0b1000 : CH8_EN
Channel 8 enable
0b1001 : CH9_EN
Channel 9 enable
0b1100 : CH12_EN
Channel 12 enable
0b1101 : CH13_EN
Channel 13 enable
End of enumeration elements list.
STRTUP_DIS : DPP1 Startup Disable
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b0 : Startup Enable
DPP1 Startup enabled
0b1 : Startup Disable
DPP1 Startup disable
End of enumeration elements list.
Maximum Time for Software Mode
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAX_TIME : Maximum Time in Software Mode
bits : 0 - 6 (7 bit)
access : read-write
Enumeration:
0x00 : min
Software mode is immediately left
0xFF : max
Software mode is active for 12.75 us
End of enumeration elements list.
ADC1 Interrupt Status 2 Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PP_CH0_LO_IS : ADC1 Post-Processing-Channel 0 Lower Threshold Interrupt Status
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
VS_LO_IS : ADC1 Post-Processing-Channel 1 Lower Threshold Interrupt Status
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH2_LO_IS : ADC1 Post-Processing-Channel 2 Lower Threshold Interrupt Status
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH3_LO_IS : ADC1 Post-Processing-Channel 3 Lower Threshold Interrupt Status
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH4_LO_IS : ADC1 Post-Processing-Channel 4 Lower Threshold Interrupt Status
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH5_LO_IS : ADC1 Post-Processing-Channel 5 Lower Threshold Interrupt Status
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH6_LO_IS : ADC1 Post-Processing-Channel 6 Lower Threshold Interrupt Status
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH7_LO_IS : ADC1 Post-Processing-Channel 7 Lower Threshold Interrupt Status
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH0_UP_IS : ADC1 Post-Processing-Channel 0 Upper Threshold Interrupt Status
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
VS_UP_IS : ADC1 Post-Processing-Channel 1 Upper Threshold Interrupt Status
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH2_UP_IS : ADC1 Post-Processing-Channel 2 Upper Threshold Interrupt Status
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH3_UP_IS : ADC1 Post-Processing-Channel 3 Upper Threshold Interrupt Status
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH4_UP_IS : ADC1 Post-Processing-Channel 4 Upper Threshold Interrupt Status
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH5_UP_IS : ADC1 Post-Processing-Channel 5 Upper Threshold Interrupt Status
bits : 21 - 20 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH6_UP_IS : ADC1 Post-Processing-Channel 6 Upper Threshold Interrupt Status
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
PP_CH7_UP_IS : ADC1 Post-Processing-Channel 7 Upper Threshold Interrupt Status
bits : 23 - 22 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
no interrupt has occurred
0b1 : ACTIVE
interrupt has occurred
End of enumeration elements list.
ADC1 Status 2 Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PP_CH0_LO_STS : ADC1 Post-Processing-Channel 0 Lower Threshold Status
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
VS_LO_STS : ADC1 Post-Processing-Channel 1 Lower Threshold Status
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH2_LO_STS : ADC1 Post-Processing-Channel 2 Lower Threshold Status
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH3_LO_STS : ADC1 Post-Processing-Channel 3 Lower Threshold Status
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH4_LO_STS : ADC1 Post-Processing-Channel 4 Lower Threshold Status
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH5_LO_STS : ADC1 Post-Processing-Channel 5 Lower Threshold Status
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH6_LO_STS : ADC1 Post-Processing-Channel 6 Lower Threshold Status
bits : 6 - 5 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH7_LO_STS : ADC1 Post-Processing-Channel 7 Lower Threshold Status
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH0_UP_STS : ADC1 Post-Processing-Channel 0 Upper Threshold Status
bits : 16 - 15 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
VS_UP_STS : ADC1 Post-Processing-Channel 1 Upper Threshold Status
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH2_UP_STS : ADC1 Post-Processing-Channel 2 Upper Threshold Status
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH3_UP_STS : ADC1 Post-Processing-Channel 3 Upper Threshold Status
bits : 19 - 18 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH4_UP_STS : ADC1 Post-Processing-Channel 4 Upper Threshold Status
bits : 20 - 19 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH5_UP_STS : ADC1 Post-Processing-Channel 5 Upper Threshold Status
bits : 21 - 20 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH6_UP_STS : ADC1 Post-Processing-Channel 6 Upper Threshold Status
bits : 22 - 21 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
PP_CH7_UP_STS : ADC1 Post-Processing-Channel 7 Upper Threshold Status
bits : 23 - 22 (0 bit)
access : read-only
Enumeration:
0b0 : Below limit
Status below upper threshold
0b1 : Above limit
Upper threshold exceeded
End of enumeration elements list.
ADC1 Interrupt Status Clear 2 Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PP_CH0_LO_ISC : ADC1 Post-Processing-Channel 0 Lower Threshold Interrupt Status Clear
bits : 0 - -1 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
VS_LO_ISC : ADC1 Post-Processing-Channel 1 Lower Threshold Interrupt Status Clear
bits : 1 - 0 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH2_LO_ISC : ADC1 Post-Processing-Channel 2 Lower Threshold Interrupt Status Clear
bits : 2 - 1 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH3_LO_ISC : ADC1 Post-Processing-Channel 3 Lower Threshold Interrupt Status Clear
bits : 3 - 2 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH4_LO_ISC : ADC1 Post-Processing-Channel 4 Lower Threshold Interrupt Status Clear
bits : 4 - 3 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH5_LO_ISC : ADC1 Post-Processing-Channel 5 Lower Threshold Interrupt Status Clear
bits : 5 - 4 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH6_LO_ISC : ADC1 Post-Processing-Channel 6 Lower Threshold Interrupt Status Clear
bits : 6 - 5 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH7_LO_ISC : ADC1 Post-Processing-Channel 7 Lower Threshold Interrupt Status Clear
bits : 7 - 6 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH0_UP_ISC : ADC1 Post-Processing-Channel 0 Upper Threshold Interrupt Status Clear
bits : 16 - 15 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
VS_UP_ISC : ADC1 Post-Processing-Channel 1 Upper Threshold Interrupt Status Clear
bits : 17 - 16 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH2_UP_ISC : ADC1 Post-Processing-Channel 2 Upper Threshold Interrupt Status Clear
bits : 18 - 17 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH3_UP_ISC : ADC1 Post-Processing-Channel 3 Upper Threshold Interrupt Status Clear
bits : 19 - 18 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH4_UP_ISC : ADC1 Post-Processing-Channel 4 Upper Threshold Interrupt Status Clear
bits : 20 - 19 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH5_UP_ISC : ADC1 Post-Processing-Channel 5 Upper Threshold Interrupt Status Clear
bits : 21 - 20 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH6_UP_ISC : ADC1 Post-Processing-Channel 6 Upper Threshold Interrupt Status Clear
bits : 22 - 21 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
PP_CH7_UP_ISC : ADC1 Post-Processing-Channel 7 Upper Threshold Interrupt Status Clear
bits : 23 - 22 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
ADC1 Interrupt Enable 2 Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PP_CH0_LO_IEN : ADC1 Post-Processing-Channel 0 Lower Threshold Interrupt Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
VS_LO_IEN : ADC1 Post-Processing-Channel 1 Lower Threshold Interrupt Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH2_LO_IEN : ADC1 Post-Processing-Channel 2 Lower Threshold Interrupt Enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH3_LO_IEN : ADC1 Post-Processing-Channel 3 Lower Threshold Interrupt Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH4_LO_IEN : ADC1 Post-Processing-Channel 4 Lower Threshold Interrupt Enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH5_LO_IEN : ADC1 Post-Processing-Channel 5 Lower Threshold Interrupt Enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH6_LO_IEN : ADC1 Post-Processing-Channel 6 Lower Threshold Interrupt Enable
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH7_LO_IEN : ADC1 Post-Processing-Channel 7 Lower Threshold Interrupt Enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH0_UP_IEN : ADC1 Post-Processing-Channel 0 Upper Threshold Interrupt Enable
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
VS_UP_IEN : ADC1 Post-Processing-Channel 1 Upper Threshold Interrupt Enable
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH2_UP_IEN : ADC1 Post-Processing-Channel 2 Upper Threshold Interrupt Enable
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH3_UP_IEN : ADC1 Post-Processing-Channel 3 Upper Threshold Interrupt Enable
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH4_UP_IEN : ADC1 Post-Processing-Channel 4 Upper Threshold Interrupt Enable
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH5_UP_IEN : ADC1 Post-Processing-Channel 5 Upper Threshold Interrupt Enable
bits : 21 - 20 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH6_UP_IEN : ADC1 Post-Processing-Channel 6 Upper Threshold Interrupt Enable
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
PP_CH7_UP_IEN : ADC1 Post-Processing-Channel 7 Upper Threshold Interrupt Enable
bits : 23 - 22 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
ADC1 or Filter Output Channel 12
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH12 : ADC or filter output value channel 12
bits : 0 - 10 (11 bit)
access : read-only
WFR12 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF12 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF12 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
Post-Processing Mapping Channel 0-3
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESET_PP_MAP0 : Post-Processing Reset for Mapped Post-Processing-Channel 0
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : Running
Post-Processing running
0b1 : Reset
Post-Processing reset
End of enumeration elements list.
EN_PP_MAP0 : Mapping Enable for Post-Processing-Channel 0
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : Disabled
Mapping Disabled
0b1 : Enabled
Mapping Enabled
End of enumeration elements list.
RESET_PP_MAP1 : Post-Processing Reset for Mapped Post-Processing-Channel 1
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
0b0 : Running
Post-Processing running
0b1 : Reset
Post-Processing reset
End of enumeration elements list.
EN_PP_MAP1 : Mapping Enable for Post-Processing-Channel 1
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
0b0 : Disabled
Mapping Disabled
0b1 : Enabled
Mapping Enabled
End of enumeration elements list.
PP_MAP2 : Mapping of Entry Channel to Post-Processing-Channel 2
bits : 16 - 18 (3 bit)
access : read-write
Enumeration:
0x0 : Ch0
Entry Channel 0
0xD : Ch13
Entry Channel 13
End of enumeration elements list.
RESET_PP_MAP2 : Post-Processing Reset for Mapped Post-Processing-Channel 2
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
0b0 : Running
Post-Processing running
0b1 : Reset
Post-Processing reset
End of enumeration elements list.
EN_PP_MAP2 : Mapping Enable for Post-Processing-Channel 2
bits : 23 - 22 (0 bit)
access : read-write
Enumeration:
0b0 : Disabled
Mapping Disabled
0b1 : Enabled
Mapping Enabled
End of enumeration elements list.
PP_MAP3 : Mapping of Entry Channel to Post-Processing-Channel 3
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
0x0 : Ch0
Entry Channel 0
0xD : Ch13
Entry Channel 13
End of enumeration elements list.
RESET_PP_MAP3 : Post-Processing Reset for Mapped Post-Processing-Channel 3
bits : 30 - 29 (0 bit)
access : read-write
Enumeration:
0b0 : Running
Post-Processing running
0b1 : Reset
Post-Processing reset
End of enumeration elements list.
EN_PP_MAP3 : Mapping Enable for Post-Processing-Channel 3
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
0b0 : Disabled
Mapping Disabled
0b1 : Enabled
Mapping Enabled
End of enumeration elements list.
Post-Processing Mapping Channel 4-7
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PP_MAP4 : Mapping of Entry Channel to Post-Processing-Channel 4
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0x0 : Ch0
Entry Channel 0
0xD : Ch13
Entry Channel 13
End of enumeration elements list.
RESET_PP_MAP4 : Post-Processing Reset for Mapped Post-Processing-Channel 4
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : Running
Post-Processing running
0b1 : Reset
Post-Processing reset
End of enumeration elements list.
EN_PP_MAP4 : Mapping Enable for Post-Processing-Channel 4
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : Disabled
Mapping Disabled
0b1 : Enabled
Mapping Enabled
End of enumeration elements list.
PP_MAP5 : Mapping of Entry Channel to Post-Processing-Channel 5
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
0x0 : Ch0
Entry Channel 0
0xD : Ch13
Entry Channel 13
End of enumeration elements list.
RESET_PP_MAP5 : Post-Processing Reset for Mapped Post-Processing-Channel 5
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
0b0 : Running
Post-Processing running
0b1 : Reset
Post-Processing reset
End of enumeration elements list.
EN_PP_MAP5 : Mapping Enable for Post-Processing-Channel 5
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
0b0 : Disabled
Mapping Disabled
0b1 : Enabled
Mapping Enabled
End of enumeration elements list.
PP_MAP6 : Mapping of Entry Channel to Post-Processing-Channel 6
bits : 16 - 18 (3 bit)
access : read-write
Enumeration:
0x0 : Ch0
Entry Channel 0
0xD : Ch13
Entry Channel 13
End of enumeration elements list.
RESET_PP_MAP6 : Post-Processing Reset for Mapped Post-Processing-Channel 6
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
0b0 : Running
Post-Processing running
0b1 : Reset
Post-Processing reset
End of enumeration elements list.
EN_PP_MAP6 : Mapping Enable for Post-Processing-Channel 6
bits : 23 - 22 (0 bit)
access : read-write
Enumeration:
0b0 : Disabled
Mapping Disabled
0b1 : Enabled
Mapping Enabled
End of enumeration elements list.
PP_MAP7 : Mapping of Entry Channel to Post-Processing-Channel 7
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
0x0 : Ch0
Entry Channel 0
0xD : Ch13
Entry Channel 13
End of enumeration elements list.
RESET_PP_MAP7 : Post-Processing Reset for Mapped Post-Processing-Channel 7
bits : 30 - 29 (0 bit)
access : read-write
Enumeration:
0b0 : Running
Post-Processing running
0b1 : Reset
Post-Processing reset
End of enumeration elements list.
EN_PP_MAP7 : Mapping Enable for Post-Processing-Channel 7
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
0b0 : Disabled
Mapping Disabled
0b1 : Enabled
Mapping Enabled
End of enumeration elements list.
ADC1 or Filter Output of EIM
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_EIM : ADC or filter output value for last EIM measurement
bits : 0 - 10 (11 bit)
access : read-only
WFR_EIM : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF_EIM : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF_EIM : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 Status 1Register
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DU1LO_STS : ADC1 Differential Unit 1 (DU1) lower Channel Status
bits : 24 - 23 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No DU lower Channel Status has occurred
0b1 : ACTIVE
DU lower Channel Status has occurred
End of enumeration elements list.
DU1UP_STS : ADC1 Differential Unit 1 (DU1) upper Channel Status
bits : 25 - 24 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No DU upper Channel Status has occurred
0b1 : ACTIVE
DU upper Channel Status has occurred
End of enumeration elements list.
ADC1 Status Clear 1 Register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DU1LO_SC : ADC1 Differential Unit 1 (DU1) lower Channel Status Clear
bits : 24 - 23 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
No DU lower Channel Status has occurred
0b1 : ACTIVE
DU lower Channel Status has occurred
End of enumeration elements list.
DU1UP_SC : ADC1 Differential Unit 1 (DU1) upper Channel Status Clear
bits : 25 - 24 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
No DU upper Channel Status has occurred
0b1 : ACTIVE
DU upper Channel Status has occurred
End of enumeration elements list.
Measurement Unit 1 Channel Enable Bits for Cycle 12-13
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ12 : Sequence 12 channel enable
bits : 0 - 12 (13 bit)
access : read-write
SQ13 : Sequence 13 channel enable
bits : 16 - 28 (13 bit)
access : read-write
Calibration for Channel 12 and 13
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALOFFS_CH12 : Offset Calibration for channel 12
bits : 0 - 3 (4 bit)
access : read-write
CALGAIN_CH12 : Gain Calibration for channel 12
bits : 8 - 14 (7 bit)
access : read-write
CALOFFS_CH13 : Offset Calibration for channel 13
bits : 16 - 19 (4 bit)
access : read-write
CALGAIN_CH13 : Gain Calibration for channel 13
bits : 24 - 30 (7 bit)
access : read-write
Measurement Unit 1 Control Register 2
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CAL_EN : Calibration Enable for Channels 0 to 13
bits : 0 - 12 (13 bit)
access : read-write
Enumeration:
0x0001 : CH0_EN
Channel 0 calibration enable
0x0002 : CH1_EN
Channel 1 calibration enable
0x0004 : CH2_EN
Channel 2 calibration enable
0x0008 : CH3_EN
Channel 3 calibration enable
0x0010 : CH4_EN
Channel 4 calibration enable
0x0020 : CH5_EN
Channel 5 calibration enable
0x0040 : CH6_EN
Channel 6 calibration enable
0x0080 : CH7_EN
Channel 7 calibration enable
0x0100 : CH8_EN
Channel 8 calibration enable
0x0200 : CH9_EN
Channel 9 calibration enable
0x0400 : CH10_EN
Channel 10 calibration enable
0x0800 : CH11_EN
Channel 11 calibration enable
0x1000 : CH12_EN
Channel 12 calibration enable
0x2000 : CH13_EN
Channel 13 calibration enable
End of enumeration elements list.
ADC1 or Filter Output Channel 13
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH13 : ADC or filter output value channel 13
bits : 0 - 10 (11 bit)
access : read-only
WFR13 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF13 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF13 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
Measurement Unit 1 Control Register 3
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCM_PD_N : Power Down Signal for MCM
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : MCM Disabled
Measurement Core Module Disabled
0b1 : MCM Enabled
Measurement Core Module Enabled
End of enumeration elements list.
SW_MODE : Flag to enter SW Mode
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Software Mode Disable
Sequencer running
0b1 : Software Mode Enabled
Sequencer stopped
End of enumeration elements list.
EoC_FAIL_CLR : Fail of ADC End of Conversion Signal Clear
bits : 4 - 3 (0 bit)
access : write-only
Enumeration:
0b0 : ADC EoC Fail not clear
no clear of EoC_FAIL flag
0b1 : ADC EoC Fail clear
Clear of EoC_FAIL flag
End of enumeration elements list.
EoC_FAIL : Fail of ADC End of Conversion Signal
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : ADC EoC available
End of Conversion Signal was sent properly by ADC
0b1 : ADC EoC not available
End of Conversion Signal was not sent properly by ADC
End of enumeration elements list.
MCM_RDY : Ready Signal for MCM after Power On or Reset
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
0b0 : MCM Not Ready
Measurement Core Module in startup phase
0b1 : MCM Ready
Measurement Core Module start-up phase finished
End of enumeration elements list.
SAMPLE_TIME_HVCH : Sample time of ADC1
bits : 8 - 11 (4 bit)
access : read-write
Enumeration:
0x00 : ADCCLK4
4 ADC_CLK clock periods
0x01 : ADCCLK6
6 ADC_CLK clock periods
0x02 : ADCCLK8
8 ADC_CLK clock periods
0x03 : ADCCLK10
10 ADC_CLK clock periods
0x04 : ADCCLK12
12 ADC_CLK clock periods
0x05 : ADCCLK14
14 ADC_CLK clock periods
0x06 : ADCCLK16
16 ADC_CLK clock periods
0x07 : ADCCLK18
18 ADC_CLK clock periods
0x08 : ADCCLK20
20 ADC_CLK clock periods
0x09 : ADCCLK22
22 ADC_CLK clock periods
0x0A : ADCCLK24
24 ADC_CLK clock periods (default)
0x0B : ADCCLK26
26 ADC_CLK clock periods
0x0C : ADCCLK28
28 ADC_CLK clock periods
0x0D : ADCCLK30
30 ADC_CLK clock periods
0x0E : ADCCLK32
32 ADC_CLK clock periods
0x0F : ADCCLK34
34 ADC_CLK clock periods
0x10 : ADCCLK36
36 ADC_CLK clock periods
0x11 : ADCCLK38
38 ADC_CLK clock periods
0x12 : ADCCLK40
40 ADC_CLK clock periods
0x13 : ADCCLK42
42 ADC_CLK clock periods
0x14 : ADCCLK44
44 ADC_CLK clock periods
0x15 : ADCCLK46
46 ADC_CLK clock periods
0x16 : ADCCLK48
48 ADC_CLK clock periods
0x17 : ADCCLK50
50 ADC_CLK clock periods
0x18 : ADCCLK52
52 ADC_CLK clock periods
0x19 : ADCCLK54
54 ADC_CLK clock periods
0x1A : ADCCLK56
56 ADC_CLK clock periods
0x1B : ADCCLK58
58 ADC_CLK clock periods
0x1C : ADCCLK60
60 ADC_CLK clock periods
0x1D : ADCCLK62
62 ADC_CLK clock periods
End of enumeration elements list.
SAMPLE_TIME_LVCH : Sample time of ADC1
bits : 16 - 18 (3 bit)
access : read-write
Enumeration:
0x0 : ADCCLK4
4 ADC_CLK clock periods
0x1 : ADCCLK6
6 ADC_CLK clock periods
0x2 : ADCCLK8
8 ADC_CLK clock periods(default)
0x3 : ADCCLK10
10 ADC_CLK clock periods
0x4 : ADCCLK12
12 ADC_CLK clock periods
0x5 : ADCCLK14
14 ADC_CLK clock periods
0x6 : ADCCLK16
16 ADC_CLK clock periods
0x7 : ADCCLK18
18 ADC_CLK clock periods
0x8 : ADCCLK20
20 ADC_CLK clock periods
0x9 : ADCCLK22
22 ADC_CLK clock periods
End of enumeration elements list.
Measurement Unit 1 Control Register 5
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_SEL_13_0 : Output Filter Selection for Channels 0 to 13
bits : 0 - 12 (13 bit)
access : read-write
Measurement Unit 1 Channel Enable Bits for Cycle 0-1
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ0 : Sequence 0 channel enable
bits : 0 - 12 (13 bit)
access : read-write
SQ1 : Sequence 1 channel enable
bits : 16 - 28 (13 bit)
access : read-write
Measurement Unit 1 Channel Enable Bits for Cycle 2-3
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ2 : Sequence 2 channel enable
bits : 0 - 12 (13 bit)
access : read-write
SQ3 : Sequence 3 channel enable
bits : 16 - 28 (13 bit)
access : read-write
Measurement Unit 1 Channel Enable Bits for Cycle 4-5
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ4 : Sequence 4 channel enable
bits : 0 - 12 (13 bit)
access : read-write
SQ5 : Sequence 5 channel enable
bits : 16 - 28 (13 bit)
access : read-write
Measurement Unit 1 Channel Enable Bits for Cycle 6-7
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ6 : Sequence 6 channel enable
bits : 0 - 12 (13 bit)
access : read-write
SQ7 : Sequence 7 channel enable
bits : 16 - 28 (13 bit)
access : read-write
Measurement Unit 1 Channel Enable Bits for Cycle 8-9
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ8 : Sequence 8 channel enable
bits : 0 - 12 (13 bit)
access : read-write
SQ9 : Sequence 9 channel enable
bits : 16 - 28 (13 bit)
access : read-write
Measurement Unit 1 Channel Enable Bits for Cycle 10-11
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ10 : Sequence 10 channel enable
bits : 0 - 12 (13 bit)
access : read-write
SQ11 : Sequence 11 channel enable
bits : 16 - 28 (13 bit)
access : read-write
ADC1 Channel Mapping for Sequencer
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ_CH5_MAP : ADC mapping to CH5
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : MON4
MON4 mapped to CH5
0b1 : MON5
MON5 mapped to CH5
End of enumeration elements list.
SQ_CH6_MAP : ADC mapping to CH6
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : P2.0
P2.0 mapped to CH6
0b1 : P2.8
P2.8 mapped to CH6
End of enumeration elements list.
SQ_CH12_MAP : ADC mapping to CH12
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
0b0 : P2.7
P2.7 mapped to CH12
0b1 : P2.4
P2.4 mapped to CH12
End of enumeration elements list.
ADC1 Offset Calibration Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OFFSET_SHIFT : Set the Value of the Offset Shift DAC
bits : 0 - 1 (2 bit)
access : read-write
OFFSET_DAC : Set the Value of the Offset Calibration DAC
bits : 8 - 11 (4 bit)
access : read-write
Sequencer Feedback Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ_FB : Current Sequence that caused software mode
bits : 0 - 3 (4 bit)
access : read-only
Enumeration:
0b00000 : SQ0
Sequence 0 enable
0b00001 : SQ1
Sequence 1 enable
0b00010 : SQ2
Sequence 2 enable
0b00011 : SQ3
Sequence 3 enable
0b00100 : SQ4
Sequence 4 enable
0b00101 : SQ5
Sequence 5 enable
0b00110 : SQ6
Sequence 6 enable
0b00111 : SQ7
Sequence 7 enable
0b01000 : SQ8
Sequence 8 enable
0b01001 : SQ9
Sequence 9 enable
0b01010 : SQ10
Sequence 10 enable
0b01011 : SQ11
Sequence 11 enable
0b01100 : SQ12
Sequence 12 enable
0b01101 : SQ13
Sequence 13 enable
0b11010 : ESM
ESM
0b11100 : SUSPEND
SW Mode per Flag
End of enumeration elements list.
SQ_STOP : ADC1 Sequencer Stop Signal for DPP
bits : 8 - 7 (0 bit)
access : read-only
Enumeration:
0b0 : DPP Running
Postprocessing Sequencer in running mode
0b1 : DPP Stopped
Postprocessing Sequencer stopped / Software Mode entered
End of enumeration elements list.
EIM_ACTIVE : ADC1 EIM active
bits : 9 - 8 (0 bit)
access : read-only
Enumeration:
0b0 : not active
EIM not active
0b1 : active
EIM active
End of enumeration elements list.
ESM_ACTIVE : ADC1 ESM active
bits : 10 - 9 (0 bit)
access : read-only
Enumeration:
0b0 : not active
ESM not active
0b1 : active
ESM active
End of enumeration elements list.
SQx : Current Active ADC1 Sequence
bits : 11 - 13 (3 bit)
access : read-only
Enumeration:
0b0000 : SQ0
Sequence 0 enable
0b0001 : SQ1
Sequence 1 enable
0b0010 : SQ2
Sequence 2 enable
0b0011 : SQ3
Sequence 3 enable
0b0100 : SQ4
Sequence 4 enable
0b0101 : SQ5
Sequence 5 enable
0b0110 : SQ6
Sequence 6 enable
0b0111 : SQ7
Sequence 7 enable
0b1000 : SQ8
Sequence 8 enable
0b1001 : SQ9
Sequence 9 enable
0b1010 : SQ10
Sequence 10 enable
0b1011 : SQ11
Sequence 11 enable
0b1100 : SQ12
Sequence 12 enable
0b1101 : SQ13
Sequence 13 enable
End of enumeration elements list.
CHx : Current ADC1 Channel
bits : 16 - 18 (3 bit)
access : read-only
Enumeration:
0b0000 : CH0
Channel 0 enable
0b0001 : CH1
Channel 1 enable
0b0010 : CH2
Channel 2 enable
0b0011 : CH3
Channel 3 enable
0b0100 : CH4
Channel 4 enable
0b0101 : CH5
Channel 5 enable
0b0110 : CH6
Channel 6 enable
0b0111 : CH7
Channel 7 enable
0b1000 : CH8
Channel 8 enable
0b1001 : CH9
Channel 9 enable
0b1010 : CH10
Channel 10 enable
0b1011 : CH11
Channel 11 enable
0b1100 : CH12
Channel 12 enable
0b1101 : CH13
Channel 13 enable
End of enumeration elements list.
Lower Comparator Trigger Level Post-Processing-Channel 0-3
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PP_CH0_LOW : Post-Processing-Channel 0 lower trigger level
bits : 0 - 6 (7 bit)
access : read-write
PP_CH1_LOW : Post-Processing-Channel 1 lower trigger level
bits : 8 - 14 (7 bit)
access : read-write
PP_CH2_LOW : Post-Processing-Channel 2 lower trigger level
bits : 16 - 22 (7 bit)
access : read-write
PP_CH3_LOW : Post-Processing-Channel 3 lower trigger level
bits : 24 - 30 (7 bit)
access : read-write
Lower Comparator Trigger Level Post-Processing-Channel 4-7
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PP_CH4_LOW : Post-Processing-Channel 4 lower trigger level
bits : 0 - 6 (7 bit)
access : read-write
PP_CH5_LOW : Post-Processing-Channel 5 lower trigger level
bits : 8 - 14 (7 bit)
access : read-write
PP_CH6_LOW : Post-Processing-Channel 6 lower trigger level
bits : 16 - 22 (7 bit)
access : read-write
PP_CH7_LOW : Post-Processing-Channel 7 lower trigger level
bits : 24 - 30 (7 bit)
access : read-write
Calibration for Channel 0 and 1
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALOFFS_CH0 : Offset Calibration for channel 0
bits : 0 - 3 (4 bit)
access : read-write
CALGAIN_CH0 : Gain Calibration for channel 0
bits : 8 - 14 (7 bit)
access : read-write
CALOFFS_CH1 : Offset Calibration for channel 1
bits : 16 - 19 (4 bit)
access : read-write
CALGAIN_CH1 : Gain Calibration for channel 1
bits : 24 - 30 (7 bit)
access : read-write
Calibration for Channel 2 and 3
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALOFFS_CH2 : Offset Calibration for channel 2
bits : 0 - 3 (4 bit)
access : read-write
CALGAIN_CH2 : Gain Calibration for channel 2
bits : 8 - 14 (7 bit)
access : read-write
CALOFFS_CH3 : Offset Calibration for channel 3
bits : 16 - 19 (4 bit)
access : read-write
CALGAIN_CH3 : Gain Calibration for channel 3
bits : 24 - 30 (7 bit)
access : read-write
Calibration for Channel 4 and 5
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALOFFS_CH4 : Offset Calibration for channel 4
bits : 0 - 3 (4 bit)
access : read-write
CALGAIN_CH4 : Gain Calibration for channel 4
bits : 8 - 14 (7 bit)
access : read-write
CALOFFS_CH5 : Offset Calibration for channel 5
bits : 16 - 19 (4 bit)
access : read-write
CALGAIN_CH5 : Gain Calibration for channel 5
bits : 24 - 30 (7 bit)
access : read-write
Calibration for Channel 6 and 7
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALOFFS_CH6 : Offset Calibration for channel 6
bits : 0 - 3 (4 bit)
access : read-write
CALGAIN_CH6 : Gain Calibration for channel 6
bits : 8 - 14 (7 bit)
access : read-write
CALOFFS_CH7 : Offset Calibration for channel 7
bits : 16 - 19 (4 bit)
access : read-write
CALGAIN_CH7 : Gain Calibration for channel 7
bits : 24 - 30 (7 bit)
access : read-write
Calibration for Channel 8 and 9
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALOFFS_CH8 : Offset Calibration for channel 8
bits : 0 - 3 (4 bit)
access : read-write
CALGAIN_CH8 : Gain Calibration for channel 8
bits : 8 - 14 (7 bit)
access : read-write
CALOFFS_CH9 : Offset Calibration for channel 9
bits : 16 - 19 (4 bit)
access : read-write
CALGAIN_CH9 : Gain Calibration for channel 9
bits : 24 - 30 (7 bit)
access : read-write
Calibration for Channel 10 and 11
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALOFFS_CH10 : Offset Calibration for channel 10
bits : 0 - 3 (4 bit)
access : read-write
CALGAIN_CH10 : Gain Calibration for channel 10
bits : 8 - 14 (7 bit)
access : read-write
CALOFFS_CH11 : Offset Calibration for channel 11
bits : 16 - 19 (4 bit)
access : read-write
CALGAIN_CH11 : Gain Calibration for channel 11
bits : 24 - 30 (7 bit)
access : read-write
Filter Coefficients Measurement Unit Channel 0-13
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0 : Filter Coefficients ADC channel 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH1 : Filter Coefficients ADC channel 1
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH2 : Filter Coefficients ADC channel 2
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH3 : Filter Coefficients ADC channel 3
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH4 : Filter Coefficients ADC channel 4
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH5 : Filter Coefficients ADC channel 5
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH6 : Filter Coefficients ADC channel 6
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH7 : Filter Coefficients ADC channel 7
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH8 : Filter Coefficients ADC channel 8
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH9 : Filter Coefficients ADC channel 9
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH10 : Filter Coefficients ADC channel 10
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH11 : Filter Coefficients ADC channel 11
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH12 : Filter Coefficients ADC channel 12
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
CH13 : Filter Coefficients ADC channel 13
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
ADC1 Interrupt Status 1 Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IIR_CH0_IS : ADC1 IIR-Filter-Channel 0 Interrupt Status
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 0 Interrupt has occurred
0b1 : ACTIVE
Channel 0 Interrupt has occurred
End of enumeration elements list.
VS_IS : ADC1 IIR-Filter-Channel 1 Interrupt Status
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 1 Interrupt has occurred
0b1 : ACTIVE
Channel 1 Interrupt has occurred
End of enumeration elements list.
IIR_CH2_IS : ADC1 IIR-Filter-Channel 2 Interrupt Status
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 2 Interrupt has occurred
0b1 : ACTIVE
Channel 2 Interrupt has occurred
End of enumeration elements list.
IIR_CH3_IS : ADC1 IIR-Filter-Channel 3 Interrupt Status
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 3 Interrupt has occurred
0b1 : ACTIVE
Channel 3 Interrupt has occurred
End of enumeration elements list.
IIR_CH4_IS : ADC1 IIR-Filter-Channel 4 Interrupt Status
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 4 Interrupt has occurred
0b1 : ACTIVE
Channel 4 Interrupt has occurred
End of enumeration elements list.
IIR_CH5_IS : ADC1 IIR-Filter-Channel 5 Interrupt Status
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 5 Interrupt has occurred
0b1 : ACTIVE
Channel 5 Interrupt has occurred
End of enumeration elements list.
IIR_CH6_IS : ADC1 IIR-Filter-Channel 6 Interrupt Status
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 6 Interrupt has occurred
0b1 : ACTIVE
Channel 6 Interrupt has occurred
End of enumeration elements list.
IIR_CH7_IS : ADC1 IIR-Filter-Channel 7 Interrupt Status
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 7 Interrupt has occurred
0b1 : ACTIVE
Channel 7 Interrupt has occurred
End of enumeration elements list.
IIR_CH8_IS : ADC1 IIR-Filter-Channel 8 Interrupt Status
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 8 Interrupt has occurred
0b1 : ACTIVE
Channel 8 Interrupt has occurred
End of enumeration elements list.
IIR_CH9_IS : ADC1 IIR-Filter-Channel 9 Interrupt Status
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 9 Interrupt has occurred
0b1 : ACTIVE
Channel 9 Interrupt has occurred
End of enumeration elements list.
IIR_CH10_IS : ADC1 IIR-Filter-Channel 10 Interrupt Status
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 10 Interrupt has occurred
0b1 : ACTIVE
Channel 10 Interrupt has occurred
End of enumeration elements list.
IIR_CH11_IS : ADC1 IIR-Filter-Channel 11 Interrupt Status
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 11 Interrupt has occurred
0b1 : ACTIVE
Channel 11 Interrupt has occurred
End of enumeration elements list.
IIR_CH12_IS : ADC1 IIR-Filter-Channel 12 Interrupt Status
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 12 Interrupt has occurred
0b1 : ACTIVE
Channel 12 Interrupt has occurred
End of enumeration elements list.
IIR_CH13_IS : ADC1 IIR-Filter-Channel 13 Interrupt Status
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No Channel 13 Interrupt has occurred
0b1 : ACTIVE
Channel 13 Interrupt has occurred
End of enumeration elements list.
EIM_IS : Exceptional Interrupt Measurement (EIM) Status
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No EIM occurred
0b1 : ACTIVE
EIM occurred
End of enumeration elements list.
ESM_IS : Exceptional Sequence Measurement (ESM) Status
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No ESM has occurred
0b1 : ACTIVE
ESM occurred
End of enumeration elements list.
DU1LO_IS : ADC1 Differential Unit 1 (DU1) lower Channel Interrupt Status
bits : 24 - 23 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No DU lower Channel Interrupt has occurred
0b1 : ACTIVE
DU lower Channel Interrupt has occurred
End of enumeration elements list.
DU1UP_IS : ADC1 Differential Unit 1 (DU1) upper Channel Interrupt Status
bits : 25 - 24 (0 bit)
access : read-write
Enumeration:
0b0 : INACTIVE
No DU upper Channel Interrupt has occurred
0b1 : ACTIVE
DU upper Channel Interrupt has occurred
End of enumeration elements list.
ADC1 Interrupt Enable 1 Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IIR_CH0_IEN : ADC1 IIR-Filter-Channel 0 Interrupt Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
VS_IEN : ADC1 IIR-Filter-Channel 1 Interrupt Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH2_IEN : ADC1 IIR-Filter-Channel 2 Interrupt Enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH3_IEN : ADC1 IIR-Filter-Channel 3 Interrupt Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH4_IEN : ADC1 IIR-Filter-Channel 4 Interrupt Enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH5_IEN : ADC1 IIR-Filter-Channel 5 Interrupt Enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH6_IEN : ADC1 IIR-Filter-Channel 6 Interrupt Enable
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH7_IEN : ADC1 IIR-Filter-Channel 7 Interrupt Enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH8_IEN : ADC1 IIR-Filter-Channel 8 Interrupt Enable
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH9_IEN : ADC1 IIR-Filter-Channel 9 Interrupt Enable
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH10_IEN : ADC1 IIR-Filter-Channel 10 Interrupt Enable
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH11_IEN : ADC1 IIR-Filter-Channel 11 Interrupt Enable
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH12_IEN : ADC1 IIR-Filter-Channel 12 Interrupt Enable
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
IIR_CH13_IEN : ADC1 IIR-Filter-Channel 13 Interrupt Enable
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
EIM_IEN : Exceptional Interrupt Measurement (EIM) Interrupt Enable
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
ESM_IEN : Exceptional Sequence Measurement (ESM) Interrupt Enable
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
DU1LO_IEN : Differential Unit 1 lower Interrupt Enable
bits : 24 - 23 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
DU1UP_IEN : Differential Unit 1 upper Interrupt Enable
bits : 25 - 24 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
Interrupt disabled
0b1 : ENABLED
Interrupt enabled
End of enumeration elements list.
ADC1 Interrupt Status Clear 1 Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IIR_CH0_ISC : ADC1 IIR-Filter-Channel 0 Interrupt Status Clear
bits : 0 - -1 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
VS_ISC : ADC1 IIR-Filter-Channel 1 Interrupt Status Clear
bits : 1 - 0 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH2_ISC : ADC1 IIR-Filter-Channel 2 Interrupt Status Clear
bits : 2 - 1 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH3_ISC : ADC1 IIR-Filter-Channel 3 Interrupt Status Clear
bits : 3 - 2 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH4_ISC : ADC1 IIR-Filter-Channel 4 Interrupt Status Clear
bits : 4 - 3 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH5_ISC : ADC1 IIR-Filter-Channel 5 Interrupt Status Clear
bits : 5 - 4 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH6_ISC : ADC1 IIR-Filter-Channel 6 Interrupt Status Clear
bits : 6 - 5 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH7_ISC : ADC1 IIR-Filter-Channel 7 Interrupt Status Clear
bits : 7 - 6 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH8_ISC : ADC1 IIR-Filter-Channel 8 Interrupt Status Clear
bits : 8 - 7 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH9_ISC : ADC1 IIR-Filter-Channel 9 Interrupt Status Clear
bits : 9 - 8 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH10_ISC : ADC1 IIR-Filter-Channel 10 Interrupt Status Clear
bits : 10 - 9 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH11_ISC : ADC1 IIR-Filter-Channel 11 Interrupt Status Clear
bits : 11 - 10 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH12_ISC : ADC1 IIR-Filter-Channel 12 Interrupt Status Clear
bits : 12 - 11 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
IIR_CH13_ISC : ADC1 IIR-Filter-Channel 13 Interrupt Status Clear
bits : 13 - 12 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
EIM_ISC : Exceptional Interrupt Measurement (EIM) Status Clear
bits : 16 - 15 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
No EIM cleared
0b1 : ACTIVE
EIM cleared
End of enumeration elements list.
ESM_ISC : Exceptional Sequence Measurement (ESM) Status Clear
bits : 17 - 16 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
No ESM has cleared
0b1 : ACTIVE
ESM cleared
End of enumeration elements list.
DU1LO_ISC : Differential Unit 1 lower Interrupt Status Clear
bits : 24 - 23 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
DU1UP_ISC : Differential Unit 1 lower Interrupt Status Clear
bits : 25 - 24 (0 bit)
access : write-only
Enumeration:
0b0 : INACTIVE
interrupt status is not cleared
0b1 : ACTIVE
interrupt status is cleared
End of enumeration elements list.
ADC1 or Filter Output Channel 0
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH0 : ADC or filter output value channel 0
bits : 0 - 10 (11 bit)
access : read-only
WFR0 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF0 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF0 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 or Filter Output Channel 1
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH1 : ADC or filter output value channel 1
bits : 0 - 10 (11 bit)
access : read-only
WFR1 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF1 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF1 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 or Filter Output Channel 2
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH2 : ADC or filter output value channel 2
bits : 0 - 10 (11 bit)
access : read-only
WFR2 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF2 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF2 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 or Filter Output Channel 3
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH3 : ADC or filter output value channel 3
bits : 0 - 10 (11 bit)
access : read-only
WFR3 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF3 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF3 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
Channel Setting Bits for Exceptional Interrupt Measurement
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EIM_CHx : Channel set for exceptional interrupt measurement (EIM)
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0b0000 : CH0_EN
Channel 0 enable
0b0001 : CH1_EN
Channel 1 enable
0b0010 : CH2_EN
Channel 2 enable
0b0011 : CH3_EN
Channel 3 enable
0b0100 : CH4_EN
Channel 4 enable
0b0101 : CH5_EN
Channel 5 enable
0b0110 : CH6_EN
Channel 6 enable
0b0111 : CH7_EN
Channel 7 enable
0b1000 : CH8_EN
Channel 8 enable
0b1001 : CH9_EN
Channel 9 enable
0b1100 : CH12_EN
Channel 12 enable
0b1101 : CH13_EN
Channel 13 enable
End of enumeration elements list.
EIM_REP : Repeat count for exceptional interrupt measurement (EIM)
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0b000 : 1
Continuous Mode
0b001 : 2
Measurements (2 SOC generated for ADC10)
0b010 : 4
Measurements (4 SOC generated for ADC10)
0b011 : 8
Measurements (8 SOC generated for ADC10)
0b100 : 16
Measurements (16 SOC generated for ADC10)
0b101 : 32
Measurements (32 SOC generated for ADC10)
0b110 : 64
Measurements (64 SOC generated for ADC10)
0b111 : 128
Measurements (128 SOC generated for ADC10)
End of enumeration elements list.
EIM_EN : Exceptional interrupt measurement (EIM) Trigger Event enable
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
start of EIM disabled
0b1 : ENABLE
start of IEM enabled
End of enumeration elements list.
ADC1_EIM_TRIG_SEL : Trigger selection for exceptional interrupt measurement (EIM)
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0b000 : NONE
None
0b001 : COUT63
None
0b010 : GPT12_T6OUT
None
0b011 : GPT12_T3OUT
None
0b100 : T2
t2_adc_trigger
0b101 : T21
t21_adc_trigger
End of enumeration elements list.
ADC1 or Filter Output Channel 4
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH4 : ADC or filter output value channel 4
bits : 0 - 10 (11 bit)
access : read-only
WFR4 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF4 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF4 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 or Filter Output Channel 5
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH5 : ADC or filter output value channel 5
bits : 0 - 10 (11 bit)
access : read-only
WFR5 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF5 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF5 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 or Filter Output Channel 6
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH6 : ADC or filter output value channel 6
bits : 0 - 10 (11 bit)
access : read-only
WFR6 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF6 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF6 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 or Filter Output Channel 7
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH7 : ADC or filter output value channel 7
bits : 0 - 10 (11 bit)
access : read-only
WFR7 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF7 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF7 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 or Filter Output Channel 8
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH8 : ADC or filter output value channel 8
bits : 0 - 10 (11 bit)
access : read-only
WFR8 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF8 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF8 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 or Filter Output Channel 9
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH9 : ADC or filter output value channel 9
bits : 0 - 10 (11 bit)
access : read-only
WFR9 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF9 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF9 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 or Filter Output Channel 10
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH10 : ADC or filter output value channel 10
bits : 0 - 10 (11 bit)
access : read-only
WFR10 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF10 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF10 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 or Filter Output Channel 11
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_CH11 : ADC or filter output value channel 11
bits : 0 - 10 (11 bit)
access : read-only
WFR11 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
VF11 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
OF11 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
ADC1 Differential Channel Output 1
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DCH1 : ADC differential output value 1
bits : 0 - 10 (11 bit)
access : read-only
DWFR1 : Wait for Read Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
overwrite mode
0b1 : ENABLE
wait for read mode enabled
End of enumeration elements list.
DVF1 : Valid Flag
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : NOT VALID
No new valid data available
0b1 : VALID
Result register contains valid data and has not yet been read
End of enumeration elements list.
DOF1 : Overrun Flag
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : NO OVERRUN
Result register not overwritten
0b1 : OVERRUN
Result register overwritten
End of enumeration elements list.
Upper And Lower Threshold Filter Enable
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUL_PP_CH0_EN : Upper and lower threshold IIR filter enable Post-Processing-Channel 0
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
FUL_PP_CH1_EN : Upper and lower threshold IIR filter enable Post-Processing-Channel 1
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
FUL_PP_CH2_EN : Upper and lower threshold IIR filter enable Post-Processing-Channel 2
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
FUL_PP_CH3_EN : Upper and lower threshold IIR filter enable Post-Processing-Channel 3
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
FUL_PP_CH4_EN : Upper and lower threshold IIR filter enable Post-Processing-Channel 4
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
FUL_PP_CH5_EN : Upper and lower threshold IIR filter enable Post-Processing-Channel 5
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
FUL_PP_CH6_EN : Upper and lower threshold IIR filter enable Post-Processing-Channel 6
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
FUL_PP_CH7_EN : Upper and lower threshold IIR filter enable Post-Processing-Channel 7
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
ADC1 Status Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAC_IN : Programs the 2-bit DAC for functional test
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0b000 : 0
added 0 LSB
0b001 : 1
added 1 LSB
0b010 : 2
added 2 LSB
0b011 : 3
added 3 LSB
End of enumeration elements list.
SOC_JITTER : Programs Soc Clock Jitter
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0b00 : 0n
None
0b01 : 3.5n
None
0b10 : 5.5n
None
0b11 : 8n
None
End of enumeration elements list.
SD_FEEDB_ON : Sigma Delta Feedback Loop
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
Channel Setting Bits for Exceptional Sequence Measurement
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ESM_0 : Channel Sequence for Exceptional Sequence Measurement (ESM)
bits : 0 - 12 (13 bit)
access : read-write
Enumeration:
0x0001 : CH0_EN
Channel 0 enable
0x0002 : CH1_EN
Channel 1 enable
0x0004 : CH2_EN
Channel 2 enable
0x0008 : CH3_EN
Channel 3 enable
0x0010 : CH4_EN
Channel 4 enable
0x0020 : CH5_EN
Channel 5 enable
0x0040 : CH6_EN
Channel 6 enable
0x0080 : CH7_EN
Channel 7 enable
0x0100 : CH8_EN
Channel 8 enable
0x0200 : CH9_EN
Channel 9 enable
0x0400 : CH10_EN
Channel 10 enable
0x0800 : CH11_EN
Channel 11 enable
0x1000 : CH12_EN
Channel 12 enable
0x2000 : CH13_EN
Channel 13 enable
End of enumeration elements list.
ADC1_ESM_TRIG_SEL : Trigger selection for exceptional interrupt measurement (ESM)
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0b000 : NONE
None
0b001 : COUT63
None
0b010 : GPT12_T6OUT
None
0b011 : GPT12_T3OUT
None
0b100 : T2
t2_adc_trigger
0b101 : T21
t21_adc_trigger
End of enumeration elements list.
ESM_EN : Enable for Exceptional Sequence Measurement Trigger Event
bits : 30 - 29 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
start of ESM disabled
0b1 : Enable
start of ESM enabled
End of enumeration elements list.
ESM_STS : Exceptional Sequence Measurement is finished
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
0b0 : not active
Exceptional Sequence Measurement not done
0b1 : done
Exceptional Sequence Measurement done
End of enumeration elements list.
Lower Comparator Trigger Level Differential Channel 1
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DCH1_LOW : Differential Channel 1 lower trigger level
bits : 0 - 6 (7 bit)
access : read-write
Upper Comparator Trigger Level Post-Processing-Channel 0-3
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PP_CH0_UP : Post-Processing-Channel 0 upper trigger level
bits : 0 - 6 (7 bit)
access : read-write
PP_CH1_UP : Post-Processing-Channel 1 upper trigger level
bits : 8 - 14 (7 bit)
access : read-write
PP_CH2_UP : Post-Processing-Channel 2 upper trigger level
bits : 16 - 22 (7 bit)
access : read-write
PP_CH3_UP : Post-Processing-Channel 3 upper trigger level
bits : 24 - 30 (7 bit)
access : read-write
Upper Comparator Trigger Level Post-Processing-Channel 4-7
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PP_CH4_UP : Post-Processing-Channel 4 upper trigger level
bits : 0 - 6 (7 bit)
access : read-write
PP_CH5_UP : Post-Processing-Channel 5 upper trigger level
bits : 8 - 14 (7 bit)
access : read-write
PP_CH6_UP : Post-Processing-Channel 6upper trigger level
bits : 16 - 22 (7 bit)
access : read-write
PP_CH7_UP : Post-Processing-Channel 7 upper trigger level
bits : 24 - 30 (7 bit)
access : read-write
Upper Comparator Trigger Level Differential Channel 1
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DCH1_UP : Differential Channel 1 upper trigger level
bits : 0 - 6 (7 bit)
access : read-write
Lower Counter Trigger Level Post-Processing-Channel 0-3
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_LO_PP0 : Lower timer trigger threshold Post-Processing-Channel 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_PP0 : Post-Processing-Channel 0 lower hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_PP1 : Lower timer trigger threshold Post-Processing-Channel 1
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_PP1 : Post-Processing-Channel 1 lower hysteresis
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_PP2 : Lower timer trigger threshold Post-Processing-Channel 2
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_PP2 : Post-Processing-Channel 2 lower hysteresis
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_PP3 : Lower timer trigger threshold Post-Processing-Channel 3
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_PP3 : Post-Processing-Channel 3 lower hysteresis
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Lower Counter Trigger Level Post-Processing-Channel 4-7
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_LO_PP4 : Lower timer trigger threshold Post-Processing-Channel 4
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_PP4 : Post-Processing-Channel 4 lower hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_PP5 : Lower timer trigger threshold Post-Processing-Channel 5
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_PP5 : Post-Processing-Channel 5 lower hysteresis
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_PP6 : Lower timer trigger threshold Post-Processing-Channel 6
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_PP6 : Channel 6 lower hysteresis
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_PP7 : Lower timer trigger threshold Post-Processing-Channel 7
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_PP7 : Post-Processing-Channel 7 lower hysteresis
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Lower Counter Trigger Level DifferentialChannel 1
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_LO_DCH1 : Lower timer trigger threshold Post-Processing-Channel 4
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_DCH1 : Post-Processing-Channel 4 lower hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Upper Counter Trigger Level Post-Processing-Channel 0-3
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_UP_PP0 : Upper timer trigger threshold Post-Processing-Channel 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_PP0 : Post-Processing-Channel 0 upper hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_PP1 : Upper timer trigger threshold Post-Processing-Channel 1
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_PP1 : Post-Processing-Channel 1 upper hysteresis
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_PP2 : Upper timer trigger threshold Post-Processing-Channel 2
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_PP2 : Post-Processing-Channel 2 upper hysteresis
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_PP3 : Upper timer trigger threshold Post-Processing-Channel 3
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_PP3 : Post-Processing-Channel 3 upper hysteresis
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Upper Counter Trigger Level Post-Processing-Channel 4-7
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_UP_PP4 : Upper timer trigger threshold Post-Processing-Channel 4
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_PP4 : Post-Processing-Channel 4 upper hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_PP5 : Upper timer trigger threshold Post-Processing-Channel 5
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_PP5 : Post-Processing-Channel 5 upper hysteresis
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_PP6 : Upper timer trigger threshold Post-Processing-Channel 6
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_PP6 : Post-Processing-Channel 6 upper hysteresis
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_PP7 : Upper timer trigger threshold Post-Processing-Channel 7
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_PP7 : Post-Processing-Channel 7 upper hysteresis
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Upper Counter Trigger Level DifferentialChannel 1
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_UP_DCH1 : Upper timer trigger threshold Post-Processing-Channel 4
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_DCH1 : Post-Processing-Channel 4 upper hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Overvoltage Measurement Mode of Post-Processing-Channel 0-7
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMODE_0 : Measurement mode Post-Processing-Channel 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MMODE_1 : Measurement mode Post-Processing-Channel 1
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MMODE_2 : Measurement mode Post-Processing-Channel 2
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MMODE_3 : Measurement mode Post-Processing-Channel 3
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MMODE_4 : Measurement mode Post-Processing-Channel 4
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MMODE_5 : Measurement mode Post-Processing-Channel 5
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MMODE_6 : Measurement mode Post-Processing-Channel 6
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MMODE_7 : Measurement mode Post-Processing-Channel 7
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MMODE_D1 : Measurement mode Differential Channel 1
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
Measurement Unit 1 - Differential Unit Input Selection Register
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DU1_EN : Differential Unit 1 enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : DU1 disable
Differential Unit 1 is disabled
0b1 : DU1 enable
Differential Unit 1 is enabled
End of enumeration elements list.
DU1RES_NEG : Differential Unit 1 result negative
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : DU1 Result positive
Differential Unit 1 result positive after calculation
0b1 : DU1 Result negative
Differential Unit 1 result negative after calculation
End of enumeration elements list.
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