Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected
ADC2 Control and Status Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PD_N : ADC2 Power Down Signal
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : POWER DOWN
ADC2 is powered down
0b1 : ACTIVE
ADC2 is switched on
End of enumeration elements list.
SOS : ADC2 Start of Sampling/Conversion (software mode)
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
no conversion is started
0b1 : Enable
conversion is started
End of enumeration elements list.
EOC : ADC2 End of Conversion in software mode
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
0b0 : Pending
conversion still running
0b1 : Finished
conversion has finished
End of enumeration elements list.
IN_MUX_SEL : Channel for software mode
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
0b0000 : CH0_EN
Channel 0 enable
0b0001 : CH1_EN
Channel 1 enable
0b0010 : CH2_EN
Channel 2 enable
0b0011 : CH3_EN
Channel 3 enable
0b0100 : CH4_EN
Channel 4 enable
0b0101 : CH5_EN
Channel 5 enable
0b0110 : CH6_EN
Channel 6 enable
0b0111 : CH7_EN
Channel 7 enable
0b1000 : CH8_EN
Channel 8 enable
End of enumeration elements list.
Maximum Time for Software Mode
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAX_TIME : Maximum Time in Software Mode
bits : 0 - 6 (7 bit)
access : read-write
Enumeration:
0x00 : min
Software mode is not entered
0x01 : 01
Software mode is active for 3 clock cycles
0xFF : max
Software mode is active for 257 clock cycles (typ. 12.85 us)
End of enumeration elements list.
Measurement Unit Control Register 1
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALIB_EN_8_0 : Calibration Enable for Channels 8 to 0
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
0b000000001 : CH0_EN
Channel 0 calibration enable
0b000000010 : CH1_EN
Channel 1 calibration enable
0b000000100 : CH2_EN
Channel 2 calibration enable
0b000001000 : CH3_EN
Channel 3 calibration enable
0b000010000 : CH4_EN
Channel 4 calibration enable
0b000100000 : CH5_EN
Channel 5 calibration enable
0b001000000 : CH6_EN
Channel 6 calibration enable
0b010000000 : CH7_EN
Channel 7 calibration enable
0b100000000 : CH8_EN
Channel 8 calibration enable
End of enumeration elements list.
Measurement Unit Control Register 2
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCM_PD_N : Power Down Signal for MCM
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : MCM Disabled
Measurement Core Module disabled
0b1 : MCM Enabled
Measurement Core Module enabled
End of enumeration elements list.
MCM_RDY : Ready Signal for MCM after Power On or Reset
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
0b0 : MCM Not Ready
Measurement Core Module in startup phase
0b1 : MCM Ready
Measurement Core Module start-up phase finished
End of enumeration elements list.
SAMPLE_TIME_int : Sample time of ADC2
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
0x0 : MICLK4
4 MI_CLK clock periods
0x1 : MICLK6
6 MI_CLK clock periods
0x2 : MICLK8
8 MI_CLK clock periods
0x3 : MICLK10
10 MI_CLK clock periods
0x4 : MICLK12
12 MI_CLK clock periods (default)
0x5 : MICLK14
14 MI_CLK clock periods
0x6 : MICLK16
16 MI_CLK clock periods
0x7 : MICLK18
18 MI_CLK clock periods
0x8 : MICLK20
20 MI_CLK clock periods
0x9 : MICLK22
22 MI_CLK clock periods
End of enumeration elements list.
Measurement Unit Control Register 4
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_OUT_SEL_8_0 : Output Filter Selection for Channels 0 to 8
bits : 0 - 7 (8 bit)
access : read-write
Measurement Channel Enable Bits for Sequence 0-1
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ0 : Sequence 0 channel enable
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
0b000000001 : CH0_EN
Channel 0 enable
0b000000010 : CH1_EN
Channel 1 enable
0b000000100 : CH2_EN
Channel 2 enable
0b000001000 : CH3_EN
Channel 3 enable
0b000010000 : CH4_EN
Channel 4 enable
0b000100000 : CH5_EN
Channel 5 enable
0b001000000 : CH6_EN
Channel 6 enable
0b010000000 : CH7_EN
Channel 7 enable
0b100000000 : CH8_EN
Channel 8 enable
End of enumeration elements list.
SQ1 : Sequence 1 channel enable
bits : 16 - 23 (8 bit)
access : read-write
Enumeration:
0b000000001 : CH0_EN
Channel 0 enable
0b000000010 : CH1_EN
Channel 1 enable
0b000000100 : CH2_EN
Channel 2 enable
0b000001000 : CH3_EN
Channel 3 enable
0b000010000 : CH4_EN
Channel 4 enable
0b000100000 : CH5_EN
Channel 5 enable
0b001000000 : CH6_EN
Channel 6 enable
0b010000000 : CH7_EN
Channel 7 enable
0b100000000 : CH8_EN
Channel 8 enable
End of enumeration elements list.
Measurement Channel Enable Bits for Sequence 4 - 5
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ4 : Sequence 4 channel enable
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
0b000000001 : CH0_EN
Channel 0 enable
0b000000010 : CH1_EN
Channel 1 enable
0b000000100 : CH2_EN
Channel 2 enable
0b000001000 : CH3_EN
Channel 3 enable
0b000010000 : CH4_EN
Channel 4 enable
0b000100000 : CH5_EN
Channel 5 enable
0b001000000 : CH6_EN
Channel 6 enable
0b010000000 : CH7_EN
Channel 7 enable
0b100000000 : CH8_EN
Channel 8 enable
End of enumeration elements list.
SQ5 : Sequence 5 channel enable
bits : 16 - 23 (8 bit)
access : read-write
Enumeration:
0b000000001 : CH0_EN
Channel 0 enable
0b000000010 : CH1_EN
Channel 1 enable
0b000000100 : CH2_EN
Channel 2 enable
0b000001000 : CH3_EN
Channel 3 enable
0b000010000 : CH4_EN
Channel 4 enable
0b000100000 : CH5_EN
Channel 5 enable
0b001000000 : CH6_EN
Channel 6 enable
0b010000000 : CH7_EN
Channel 7 enable
0b100000000 : CH8_EN
Channel 8 enable
End of enumeration elements list.
Measurement Channel Enable Bits for Sequence 2-3
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ2 : Sequence 2 channel enable
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
0b000000001 : CH0_EN
Channel 0 enable
0b000000010 : CH1_EN
Channel 1 enable
0b000000100 : CH2_EN
Channel 2 enable
0b000001000 : CH3_EN
Channel 3 enable
0b000010000 : CH4_EN
Channel 4 enable
0b000100000 : CH5_EN
Channel 5 enable
0b001000000 : CH6_EN
Channel 6 enable
0b010000000 : CH7_EN
Channel 7 enable
0b100000000 : CH8_EN
Channel 8 enable
End of enumeration elements list.
SQ3 : Sequence 3 channel enable
bits : 16 - 23 (8 bit)
access : read-write
Enumeration:
0b000000001 : CH0_EN
Channel 0 enable
0b000000010 : CH1_EN
Channel 1 enable
0b000000100 : CH2_EN
Channel 2 enable
0b000001000 : CH3_EN
Channel 3 enable
0b000010000 : CH4_EN
Channel 4 enable
0b000100000 : CH5_EN
Channel 5 enable
0b001000000 : CH6_EN
Channel 6 enable
0b010000000 : CH7_EN
Channel 7 enable
0b100000000 : CH8_EN
Channel 8 enable
End of enumeration elements list.
Measurement Channel Enable Bits for Sequence 6 - 7
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ6 : Sequence 6 channel enable
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
0b000000001 : CH0_EN
Channel 0 enable
0b000000010 : CH1_EN
Channel 1 enable
0b000000100 : CH2_EN
Channel 2 enable
0b000001000 : CH3_EN
Channel 3 enable
0b000010000 : CH4_EN
Channel 4 enable
0b000100000 : CH5_EN
Channel 5 enable
0b001000000 : CH6_EN
Channel 6 enable
0b010000000 : CH7_EN
Channel 7 enable
0b100000000 : CH8_EN
Channel 8 enable
End of enumeration elements list.
SQ7 : Sequence 7 channel enable
bits : 16 - 23 (8 bit)
access : read-write
Enumeration:
0b000000001 : CH0_EN
Channel 0 enable
0b000000010 : CH1_EN
Channel 1 enable
0b000000100 : CH2_EN
Channel 2 enable
0b000001000 : CH3_EN
Channel 3 enable
0b000010000 : CH4_EN
Channel 4 enable
0b000100000 : CH5_EN
Channel 5 enable
0b001000000 : CH6_EN
Channel 6 enable
0b010000000 : CH7_EN
Channel 7 enable
0b100000000 : CH8_EN
Channel 8 enable
End of enumeration elements list.
Measurement Channel Enable Bits for Sequence 8
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ8 : Sequence 8 channel enable
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
0b000000001 : CH0_EN
Channel 0 enable
0b000000010 : CH1_EN
Channel 1 enable
0b000000100 : CH2_EN
Channel 2 enable
0b000001000 : CH3_EN
Channel 3 enable
0b000010000 : CH4_EN
Channel 4 enable
0b000100000 : CH5_EN
Channel 5 enable
0b001000000 : CH6_EN
Channel 6 enable
0b010000000 : CH7_EN
Channel 7 enable
0b100000000 : CH8_EN
Channel 8 enable
End of enumeration elements list.
Calibration for Channel 0 and 1
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OFFS_CH0 : Offset Calibration for channel 0
bits : 0 - 3 (4 bit)
access : read-write
GAIN_CH0 : Gain Calibration for channel 0
bits : 8 - 14 (7 bit)
access : read-write
OFFS_CH1 : Offset Calibration for channel 1
bits : 16 - 19 (4 bit)
access : read-write
GAIN_CH1 : Gain Calibration for channel 1
bits : 24 - 30 (7 bit)
access : read-write
Calibration for Channel 2 and 3
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OFFS_CH2 : Offset Calibration for channel 2
bits : 0 - 3 (4 bit)
access : read-write
GAIN_CH2 : Gain Calibration for channel 2
bits : 8 - 14 (7 bit)
access : read-write
OFFS_CH3 : Offset Calibration for channel 3
bits : 16 - 19 (4 bit)
access : read-write
GAIN_CH3 : Gain Calibration for channel 3
bits : 24 - 30 (7 bit)
access : read-write
Calibration for Channel 4 and 5
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OFFS_CH4 : Offset Calibration for channel 4
bits : 0 - 3 (4 bit)
access : read-write
GAIN_CH4 : Gain Calibration for channel 4
bits : 8 - 14 (7 bit)
access : read-write
OFFS_CH5 : Offset Calibration for channel 5
bits : 16 - 19 (4 bit)
access : read-write
GAIN_CH5 : Gain Calibration for channel 5
bits : 24 - 30 (7 bit)
access : read-write
Sequencer Feedback Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SQ_FB : Current Sequence that caused software mode
bits : 0 - 2 (3 bit)
access : read-only
Enumeration:
0b0000 : SQ0
Sequence 0
0b0001 : SQ1
Sequence 1
0b0010 : SQ2
Sequence 2
0b0011 : SQ3
Sequence 3
0b0100 : SQ4
Sequence 4
0b0101 : SQ5
Sequence 5
0b0110 : SQ6
Sequence 6
0b0111 : SQ7
Sequence 7
0b1000 : SQ8
Sequence 8
0b1011 : CH_MASK
Sequence was 0 only after masking SWM not entered
0b1100 : SUSPEND
Debug Suspend Mode
End of enumeration elements list.
SQ_STOP : ADC2 Sequencer Stop Signal for DPP
bits : 8 - 7 (0 bit)
access : read-only
Enumeration:
0b0 : DPP Running
Postprocessing Sequencer in running mode
0b1 : DPP Stopped
Postprocessing Sequencer stopped / Software Mode entered
End of enumeration elements list.
EIM_ACTIVE : ADC2 EIM active
bits : 9 - 8 (0 bit)
access : read-only
Enumeration:
0b0 : not active
EIM not active
0b1 : active
EIM active
End of enumeration elements list.
SQx : Current active ADC2 Sequence (in normal mode)
bits : 11 - 13 (3 bit)
access : read-only
Enumeration:
0b0000 : SQ0
Sequence 0
0b0001 : SQ1
Sequence 1
0b0010 : SQ2
Sequence 2
0b0011 : SQ3
Sequence 3
0b0100 : SQ4
Sequence 4
0b0101 : SQ5
Sequence 5
0b0110 : SQ6
Sequence 6
0b0111 : SQ7
Sequence 7
0b1000 : SQ8
Sequence 8
0b1001 : SQ9
Startup sequence
End of enumeration elements list.
CHx : Current active ADC2 Channel (in normal mode)
bits : 16 - 18 (3 bit)
access : read-only
Enumeration:
0b0000 : CH0
Channel 0
0b0001 : CH1
Channel 1
0b0010 : CH2
Channel 2
0b0011 : CH3
Channel 3
0b0100 : CH4
Channel 4
0b0101 : CH5
Channel 5
0b0110 : CH6
Channel 6
0b0111 : CH7
Channel 7
0b1000 : CH8
Channel 8
End of enumeration elements list.
Calibration for Channel 6 and 7
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OFFS_CH6 : Offset Calibration for channel 6
bits : 0 - 3 (4 bit)
access : read-write
GAIN_CH6 : Gain Calibration for channel 6
bits : 8 - 14 (7 bit)
access : read-write
OFFS_CH7 : Offset Calibration for channel 7
bits : 16 - 19 (4 bit)
access : read-write
GAIN_CH7 : Gain Calibration for channel 7
bits : 24 - 30 (7 bit)
access : read-write
Calibration for Channel 8
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OFFS_CH8 : Offset Calibration for channel 8
bits : 0 - 3 (4 bit)
access : read-write
GAIN_CH8 : Gain Calibration for channel 8
bits : 8 - 14 (7 bit)
access : read-write
Filter Coefficients ADC Channel 0-8
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
A_CH0 : Filter Coefficient A for ADC channel 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
A_CH1 : Filter Coefficient A for ADC channel 1
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
A_CH2 : Filter Coefficient A for ADC channel 2
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
A_CH3 : Filter Coefficient A for ADC channel 3
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
A_CH4 : Filter Coefficient A for ADC channel 4
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
A_CH5 : Filter Coefficient A for ADC channel 5
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
A_CH6 : Filter Coefficient A for ADC channel 6
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
A_CH7 : Filter Coefficient A for ADC channel 7
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
A_CH8 : Filter Coefficient A for ADC channel 8
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0b00 : 1/2
weight of current sample
0b01 : 1/4
weight of current sample
0b10 : 1/8
weight of current sample
0b11 : 1/16
weight of current sample
End of enumeration elements list.
ADC or Filter Output Channel 0
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUT_CH0 : ADC or filter output value channel 0
bits : 0 - 8 (9 bit)
access : read-only
ADC or Filter Output Channel 1
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUT_CH1 : ADC or filter output value channel 1
bits : 0 - 8 (9 bit)
access : read-only
ADC or Filter Output Channel 2
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUT_CH2 : ADC or filter output value channel 2
bits : 0 - 8 (9 bit)
access : read-only
ADC or Filter Output Channel 3
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUT_CH3 : ADC or filter output value channel 3
bits : 0 - 8 (9 bit)
access : read-only
ADC or Filter Output Channel 4
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUT_CH4 : ADC or filter output value channel 4
bits : 0 - 8 (9 bit)
access : read-only
ADC or Filter Output Channel 5
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUT_CH5 : ADC or filter output value channel 5
bits : 0 - 8 (9 bit)
access : read-only
ADC or Filter Output Channel 6
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUT_CH6 : ADC or filter output value channel 6
bits : 0 - 8 (9 bit)
access : read-only
ADC or Filter Output Channel 7
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUT_CH7 : ADC or filter output value channel 7
bits : 0 - 8 (9 bit)
access : read-only
ADC or Filter Output Channel 8
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUT_CH8 : ADC or filter output value channel 8
bits : 0 - 8 (9 bit)
access : read-only
Upper and Lower Threshold Filter Enable
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UPLOEN_Ch0 : Upper and lower threshold IIR filter enable ch 0
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
UPLOEN_Ch1 : Upper and lower threshold IIR filter enable ch 1
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
UPLOEN_Ch2 : Upper and lower threshold IIR filter enable ch 2
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
UPLOEN_Ch3 : Upper and lower threshold IIR filter enable ch 3
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
UPLOEN_Ch4 : Upper and lower threshold IIR filter enable ch 4
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
UPLOEN_Ch5 : Upper and lower threshold IIR filter enable ch 5
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
UPLOEN_Ch6 : Upper and lower threshold IIR filter enable ch 6
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
UPLOEN_Ch7 : Upper and lower threshold IIR filter enable ch 7
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
UPLOEN_Ch8 : Upper and lower threshold IIR filter enable ch 8
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
Channel Settings Bits for Exceptional Interrupt Measurement
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHx_SEL : Channel set for exceptional interrupt measurement (EIM)
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0b0000 : CH0_EN
Channel 0 enable
0b0001 : CH1_EN
Channel 1 enable
0b0010 : CH2_EN
Channel 2 enable
0b0011 : CH3_EN
Channel 3 enable
0b0100 : CH4_EN
Channel 4 enable
0b0101 : CH5_EN
Channel 5 enable
0b0110 : CH6_EN
Channel 6 enable
0b0111 : CH7_EN
Channel 7 enable
0b1000 : CH8_EN
Channel 8 enable
End of enumeration elements list.
REP : Repeat count for exceptional interrupt measurement (EIM)
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0b000 : 1
Measurement (minimum or continuous measurement as long as trigger signals stays high, 1 / continuous SOC generated for ADC8)
0b001 : 2
Measurements (2 SOC generated for ADC8)
0b010 : 4
Measurements (4 SOC generated for ADC8)
0b011 : 8
Measurements (8 SOC generated for ADC8)
0b100 : 16
Measurements (16 SOC generated for ADC8)
0b101 : 32
Measurements (32 SOC generated for ADC8)
0b110 : 64
Measurements (64 SOC generated for ADC8)
0b111 : 128
Measurements (128 SOC generated for ADC8)
End of enumeration elements list.
EN : Exceptional interrupt measurement (EIM) Trigger Event enable
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
start of EIM disabled
0b1 : ENABLE
start of IEM enabled
End of enumeration elements list.
SEL : Exceptional interrupt measurement (EIM) Trigger select
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
0b0 : GPT12PISEL.T3_GPT12_SEL
Signal according to SCU_GPT12PISEL.T3_GPT12SEL setting
0b1 : CP_clk
Charge-pump clock
End of enumeration elements list.
Lower Comparator Trigger Level Channel 0 -3
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
THLO_CH0 : Channel 0 lower trigger level
bits : 0 - 6 (7 bit)
access : read-write
THLO_CH1 : Channel 1 lower trigger level
bits : 8 - 14 (7 bit)
access : read-write
THLO_CH2 : Channel 2 lower trigger level
bits : 16 - 22 (7 bit)
access : read-write
THLO_CH3 : Channel 3 lower trigger level
bits : 24 - 30 (7 bit)
access : read-write
Lower Comparator Trigger Level Channel 4 to 7
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
THLO_CH4 : Channel 4 lower trigger level
bits : 0 - 6 (7 bit)
access : read-write
THLO_CH5 : Channel 5 lower trigger level
bits : 8 - 14 (7 bit)
access : read-write
THLO_CH6 : Channel 6 lower trigger level
bits : 16 - 22 (7 bit)
access : read-write
THLO_CH7 : Channel 7 lower trigger level
bits : 24 - 30 (7 bit)
access : read-write
Lower Comparator Trigger Level Channel 8
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
THLO_CH8 : Channel 8 lower trigger level
bits : 0 - 6 (7 bit)
access : read-write
Upper Comparator Trigger Level Channel 0-3
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
THUP_CH0 : Channel 0 upper trigger level
bits : 0 - 6 (7 bit)
access : read-write
THUP_CH1 : Channel 1 upper trigger level
bits : 8 - 14 (7 bit)
access : read-write
THUP_CH2 : Channel 2 upper trigger level
bits : 16 - 22 (7 bit)
access : read-write
THUP_CH3 : Channel 3 upper trigger level
bits : 24 - 30 (7 bit)
access : read-write
Upper Comparator Trigger Level Channel 4 -7
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
THUP_CH4 : Channel 4 upper trigger level
bits : 0 - 6 (7 bit)
access : read-write
THUP_CH5 : Channel 5 upper trigger level
bits : 8 - 14 (7 bit)
access : read-write
THUP_CH6 : Channel 6 upper trigger level
bits : 16 - 22 (7 bit)
access : read-write
THUP_CH7 : Channel 7 upper trigger level
bits : 24 - 30 (7 bit)
access : read-write
Upper Comparator Trigger Level Channel 8
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
THUP_CH8 : Channel 8 upper trigger level
bits : 0 - 6 (7 bit)
access : read-write
Lower Counter Trigger Level Channel 0 - 3
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_LO_CH0 : Lower timer trigger threshold channel 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_CH0 : Channel 0 lower hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_CH1 : Lower timer trigger threshold channel 1
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_CH1 : Channel 1 lower hysteresis
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_CH2 : Lower timer trigger threshold channel 2
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_CH2 : Channel 2 lower hysteresis
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_CH3 : Lower timer trigger threshold channel 3
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_CH3 : Channel 3 lower hysteresis
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Lower Counter Trigger Level Channel 4 to 7
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_LO_CH4 : Lower timer trigger threshold channel 4
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_CH4 : Channel 4 lower hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_CH5 : Lower timer trigger threshold channel 5
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_CH5 : Channel 5 lower hysteresis
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_CH6 : Lower timer trigger threshold channel 6
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_CH6 : Channel 6 lower hysteresis
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_LO_CH7 : Lower timer trigger threshold channel 7
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_CH7 : Channel 7 lower hysteresis
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Lower Counter Trigger Level Channel 8
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_LO_CH8 : Lower timer trigger threshold channel 8
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_LO_CH8 : Channel 8 lower hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Upper Counter Trigger Level Channel 0 - 3
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_UP_CH0 : Upper timer trigger threshold channel 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_CH0 : Channel 0 upper hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_CH1 : Upper timer trigger threshold channel 1
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_CH1 : Channel 1 upper hysteresis
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_CH2 : Upper timer trigger threshold channel 2
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_CH2 : Channel 2 upper hysteresis
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_CH3 : Upper timer trigger threshold channel 3
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_CH3 : Channel 3 upper hysteresis
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Upper Counter Trigger Level Channel 4 to 7
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_UP_CH4 : Upper timer trigger threshold channel 4
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_CH4 : Channel 4 upper hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_CH5 : Upper timer trigger threshold channel 5
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_CH5 : Channel 5 upper hysteresis
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_CH6 : Upper timer trigger threshold channel 6
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_CH6 : Channel 6 upper hysteresis
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
CNT_UP_CH7 : Upper timer trigger threshold channel 7
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_CH7 : Channel 7 upper hysteresis
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Upper Counter Trigger Level Channel 8
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT_UP_CH8 : Upper timer trigger threshold channel 8
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0x0 : 1
1 measurement
0x1 : 2
2 measurements
0x2 : 4
4 measurements
0x3 : 7
7 measurements
End of enumeration elements list.
HYST_UP_CH8 : Channel 8 upper hysteresis
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : HYSTOFF
hysteresis switched off
0x1 : HYST4
hysteresis = 4
0x2 : HYST8
hysteresis = 8
0x3 : HYST16
hysteresis = 16
End of enumeration elements list.
Measurement Mode of Ch 0-8
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MSEL_Ch0 : Measurement mode ch 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MSEL_Ch1 : Measurement mode ch 1
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MSEL_Ch2 : Measurement mode ch 2
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MSEL_Ch3 : Measurement mode ch 3
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MSEL_Ch4 : Measurement mode ch 4
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MSEL_Ch5 : Measurement mode ch 5
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MSEL_Ch6 : Measurement mode ch 6
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MSEL_Ch7 : Measurement mode ch 7
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
MSEL_Ch8 : Measurement mode ch 8
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0b00 : MMODE0
upper and lower voltage/limit measurement
0b01 : MMODEUV
undervoltage/-limit measurement
0b10 : MMODEOV
overvoltage/-limit measurement
End of enumeration elements list.
ADC2 HV Status Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
READY : HVADC Ready bit
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
0b0 : Not ready
Module in power down or in init phase
0b1 : Ready
set automatically 5 ADC clock cycles after module is enabled
End of enumeration elements list.
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