Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
SysTick Control and Status Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
counter disabled.
0b1 : Enable
counter enabled.
End of enumeration elements list.
TICKINT : TICKINT
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : No Exception
counting down to 0 does not assert the SysTick exception request.
0b1 : Exception
counting down to 0 asserts the SysTick exception request.
End of enumeration elements list.
CLKSOURCE : CLK Source
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : External
external reference clock
0b1 : Processor
processor clock
End of enumeration elements list.
COUNTFLAG : Count Flag
bits : 16 - 15 (0 bit)
access : read-only
Interrupt Set-Enable
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Int_GPT1 : Interrupt Set for GPT1
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_GPT2 : Interrupt Set for GPT2
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_ADC2 : Interrupt Set for MU, ADC2
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_ADC1 : Interrupt Set for ADC1
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_CCU6SR0 : Interrupt Set for CCU6 SR0
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_CCU6SR1 : Interrupt Set for CCU6 SR1
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_CCU6SR2 : Interrupt Set for CCU6 SR2
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_CCU6SR3 : Interrupt Set for CCU6 SR3
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_SSC1 : Interrupt Set for SSC1
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_SSC2 : Interrupt Set for SSC2
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_UART1 : Interrupt Set for UART1
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_UART2 : Interrupt Set for UART2
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_EXINT0 : Interrupt Set for External Int 0
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_EXINT1 : Interrupt Set for External Int 1
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_WAKEUP : Interrupt Set for WAKEUP
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_MATHDIV : Interrupt Set for Math Divider
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_CP : Interrupt Set for Charge Pump
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_BDRV : Interrupt Set for Bridge Driver
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_HS : Interrupt Set for High-Side Switch
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_OPA : Interrupt Set for Current Sense Amplifier
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_DU : Interrupt Set for Differential Unit
bits : 21 - 20 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_MON : Interrupt Set for MON
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
Int_PORT2 : Interrupt Set for PORT2
bits : 23 - 22 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLED
no effect on write
0b1 : ENABLE
enables the associated interrupt
End of enumeration elements list.
SysTick Reload Value Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RELOAD : Reload
bits : 0 - 22 (23 bit)
access : read-write
SysTick Current Value Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CURRENT : Current
bits : 0 - 22 (23 bit)
access : read-write
Interrupt Clear-Enable
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Int_GPT1 : Interrupt Clear for GPT1
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_GPT2 : Interrupt Clear for GPT2
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_ADC2 : Interrupt Clear for MU, ADC2
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_ADC1 : Interrupt Clear for ADC1
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_CCU6SR0 : Interrupt Clear for CCU6 SR0
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_CCU6SR1 : Interrupt Clear for CCU6 SR1
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_CCU6SR2 : Interrupt Clear for CCU6 SR2
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_CCU6SR3 : Interrupt Clear for CCU6 SR3
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_SSC1 : Interrupt Clear for SSC1
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_SSC2 : Interrupt Clear for SSC2
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_UART1 : Interrupt Clear for UART1
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_UART2 : Interrupt Clear for UART2
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_EXINT0 : Interrupt Clear for External Int 0
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_EXINT1 : Interrupt Clear for External Int 1
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_WAKEUP : Interrupt Clear for WAKEUP
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_MATHDIV : Interrupt Clear for Math Divider
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_CP : Interrupt Clear for Charge Pump
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_BDRV : Interrupt Clear for Bridge Driver
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_HS : Interrupt Clear for High-Side Switch
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_OPA : Interrupt Clear for Current Sense Amplifier
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_DU : Interrupt Clear for Differential Unit
bits : 21 - 20 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_MON : Interrupt Clear for MON
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
Int_PORT2 : Interrupt Clear for PORT2
bits : 23 - 22 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
on reads the associated interrupt is disabled, no effect on write
0b1 : ENABLE
on reads the associated interrupt is enabled, on writes the associated interrupt is disabled
End of enumeration elements list.
SysTick Calibration Value Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TENMS : Tenms
bits : 0 - 22 (23 bit)
access : read-only
SKEW : Skew
bits : 30 - 29 (0 bit)
access : read-only
NOREF : No Reference Clock
bits : 31 - 30 (0 bit)
access : read-only
Interrupt Set-Pending
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Int_GPT1 : Interrupt Set Pending for GPT1
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_GPT2 : Interrupt Set Pending for GPT2
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_ADC2 : Interrupt Set Pending for MU, ADC2
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_ADC1 : Interrupt Set Pending for ADC1
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_CCU6SR0 : Interrupt Set Pending for CCU6 SR0
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_CCU6SR1 : Interrupt Set Pending for CCU6 SR1
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_CCU6SR2 : Interrupt Set Pending for CCU6 SR2
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_CCU6SR3 : Interrupt Set Pending for CCU6 SR3
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_SSC1 : Interrupt Set Pending for SSC1
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_SSC2 : Interrupt Set Pending for SSC2
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_UART1 : Interrupt Set Pending for UART1
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_UART2 : Interrupt Set Pending for UART2
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_EXINT0 : Interrupt Set Pending for External Int 0
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_EXINT1 : Interrupt Set Pending for External Int 1
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_WAKEUP : Interrupt Set Pending for WAKEUP
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_MATHDIV : Interrupt Set Pending for Math Divider
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_CP : Interrupt Set Pending for Charge Pump
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_BDRV : Interrupt Set Pending for Bridge Driver
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_HS : Interrupt Set Pending for High-Side Switch
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_OPA : Interrupt Set Pending for Current Sense Amplifier
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_DU : Interrupt Set Pending for Differential Unit
bits : 21 - 20 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_MON : Interrupt Set Pending for MON
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Int_PORT2 : Interrupt Set Pending for PORT2
bits : 23 - 22 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
the associated interrupt is pending
End of enumeration elements list.
Interrupt Clear-Pending
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Int_GPT1 : Interrupt Clear Pending for GPT1
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_GPT2 : Interrupt Clear Pending for GPT2
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_ADC2 : Interrupt Clear Pending for MU, ADC2
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_ADC1 : Interrupt Clear Pending for ADC1
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_CCU6SR0 : Interrupt Clear Pending for CCU6 SR0
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_CCU6SR1 : Interrupt Clear Pending for CCU6 SR1
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_CCU6SR2 : Interrupt Clear Pending for CCU6 SR2
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_CCU6SR3 : Interrupt Clear Pending for CCU6 SR3
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_SSC1 : Interrupt Clear Pending for SSC1
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_SSC2 : Interrupt Clear Pending for SSC2
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_UART1 : Interrupt Clear Pending for UART1
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_UART2 : Interrupt Clear Pending for UART2
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_EXINT0 : Interrupt Clear Pending for External Int 0
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_EXINT1 : Interrupt Clear Pending for External Int 1
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_WAKEUP : Interrupt Clear Pending for WAKEUP
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_MATHDIV : Interrupt Clear Pending for Math Divider
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_CP : Interrupt Clear Pending for Charge Pump
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_BDRV : Interrupt Clear Pending for Bridge Driver
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_HS : Interrupt Clear Pending for High-Side Switch
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_OPA : Interrupt Clear Pending for Current Sense Amplifier
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_DU : Interrupt Clear Pending for Differential Unit
bits : 21 - 20 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_MON : Interrupt Clear Pending for MON
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Int_PORT2 : Interrupt Clear Pending for PORT2
bits : 23 - 22 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on reads the associated interrupt is not pending, no effect on writes
0b1 : Pending
on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending
End of enumeration elements list.
Interrupt Priority
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_GPT1 : Priority for GPT1
bits : 6 - 6 (1 bit)
access : read-write
PRI_GPT2 : Priority for GPT2
bits : 14 - 14 (1 bit)
access : read-write
PRI_ADC2 : Priority for MU, ADC2
bits : 22 - 22 (1 bit)
access : read-write
PRI_ADC1 : Priority for ADC1
bits : 30 - 30 (1 bit)
access : read-write
Interrupt Priority
address_offset : 0x404 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_CCU6SR0 : Priority for CCU6 SR0
bits : 6 - 6 (1 bit)
access : read-write
PRI_CCU6SR1 : Priority for CCU6 SR1
bits : 14 - 14 (1 bit)
access : read-write
PRI_CCU6SR2 : Priority for CCU6 SR2
bits : 22 - 22 (1 bit)
access : read-write
PRI_CCU6SR3 : Priority for CCU6 SR3
bits : 30 - 30 (1 bit)
access : read-write
Interrupt Priority
address_offset : 0x408 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_SSC1 : Priority for SSC1
bits : 6 - 6 (1 bit)
access : read-write
PRI_SSC2 : Priority for SSC2
bits : 14 - 14 (1 bit)
access : read-write
PRI_UART1 : Priority for UART1
bits : 22 - 22 (1 bit)
access : read-write
PRI_UART2 : Priority for UART2
bits : 30 - 30 (1 bit)
access : read-write
Interrupt Priority
address_offset : 0x40C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_EXINT0 : Priority for External Int 0
bits : 6 - 6 (1 bit)
access : read-write
PRI_EXINT1 : Priority for External Int 1
bits : 14 - 14 (1 bit)
access : read-write
PRI_WAKEUP : Priority for WAKEUP
bits : 22 - 22 (1 bit)
access : read-write
PRI_MATHDIV : Priority for Math Divider
bits : 30 - 30 (1 bit)
access : read-write
Interrupt Priority
address_offset : 0x410 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_CP : Priority for Charge Pump
bits : 14 - 14 (1 bit)
access : read-write
PRI_BDRV : Priority for Bridge Driver
bits : 22 - 22 (1 bit)
access : read-write
PRI_HS : Priority for High-Side Switch
bits : 30 - 30 (1 bit)
access : read-write
Interrupt Priority
address_offset : 0x414 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_OPA : Priority for Current Sense Amplifier
bits : 6 - 6 (1 bit)
access : read-write
PRI_DU : Priority for Differential Unit
bits : 14 - 14 (1 bit)
access : read-write
PRI_MON : Priority for MON
bits : 22 - 22 (1 bit)
access : read-write
PRI_PORT2 : Priority for PORT2
bits : 30 - 30 (1 bit)
access : read-write
CPU ID Base Register
address_offset : 0xD00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REVISION : Revision Number
bits : 0 - 2 (3 bit)
access : read-only
PARTNO : Part Number
bits : 4 - 14 (11 bit)
access : read-only
CONSTANT : Constant
bits : 16 - 18 (3 bit)
access : read-only
VARIANT : Variant Number
bits : 20 - 22 (3 bit)
access : read-only
IMPLEMENTER : Implementer Code
bits : 24 - 30 (7 bit)
access : read-only
Interrupt Control and State Register
address_offset : 0xD04 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VECTACTIVE : VECTACTIVE
bits : 0 - 4 (5 bit)
access : read-only
Enumeration:
0b0 : Thread mode
None
End of enumeration elements list.
VECTPENDING : VECTPENDING
bits : 12 - 16 (5 bit)
access : read-only
Enumeration:
0b0 : no pending exceptions
None
End of enumeration elements list.
ISRPENDING : Interrupt Pending Flag
bits : 22 - 21 (0 bit)
access : read-only
Enumeration:
0b0 : Not Pending
interrupt not pending
0b1 : Pending
interrupt is pending
End of enumeration elements list.
PENDSTCLR : SysTick Exception Clear Pending
bits : 25 - 24 (0 bit)
access : write-only
Enumeration:
0b0 : No Clear
no effect
0b1 : Clear
removes the pending state from the SysTick exception
End of enumeration elements list.
PENDSTSET : SysTick Exception Set Pending
bits : 26 - 25 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on writes, has no effect. On reads, SysTick exception is not pending.
0b1 : Pending
on writes, changes SysTick exception state to pending. On reads, SysTick exception is pending.
End of enumeration elements list.
PENDSVCLR : PENDSV Clear Pending
bits : 27 - 26 (0 bit)
access : write-only
Enumeration:
0b0 : No Clear
no effect
0b1 : Clear
remove pending state from the PENDSV exception
End of enumeration elements list.
PENDSVSET : PENDSV Set Pending
bits : 28 - 27 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on writes, has no effect. On reads, PendSV exception is not pending.
0b1 : Pending
on writes, changes PendSV exception state to pending. On reads, PendSV is pending.
End of enumeration elements list.
NMIPENDSET : NMI Set Pending
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
on writes, has no effect. On reads, NMI exception is not pending.
0b1 : Pending
on writes, changes the NMI exception state to pending. On reads, NMI exception is pending.
End of enumeration elements list.
Application Interrupt/Reset Control Register
address_offset : 0xD0C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VECTCLRACTIVE : VECTCLRACTIVE
bits : 1 - 0 (0 bit)
access : write-only
SYSRESETREQ : System Reset Request
bits : 2 - 1 (0 bit)
access : write-only
Enumeration:
0b0 : No Reset
no effect
0b1 : Reset
request a system level reset
End of enumeration elements list.
ENDIANNESS : Data Endianness
bits : 15 - 14 (0 bit)
access : read-only
Enumeration:
0b0 : Little Endian
None
0b1 : Big Endian
None
End of enumeration elements list.
VECTKEY : Vector Key
bits : 16 - 30 (15 bit)
access : read-write
System Control Register
address_offset : 0xD10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEEPONEXIT : Sleep on Exit
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Do Not Sleep
do not sleep when returning to Thread mode
0b1 : Enter Sleep
enter sleep, or deep sleep, on return from an ISR to Thread mode
End of enumeration elements list.
SLEEPDEEP : Sleep Deep
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : sleep
None
0b1 : deep sleep
None
End of enumeration elements list.
SEVONPEND : SEVONPEND
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : Enabled
only enabled interrupts or events can wake-up the processor, disabled interrupts are excluded
0b1 : All
enabled events and all interrupts, including disabled interrupts, can wake-up the processor
End of enumeration elements list.
Configuration Control Register
address_offset : 0xD14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UNALIGN_TRP : UNALIGN_TRP
bits : 3 - 2 (0 bit)
access : read-only
STKALIGN : STKALIGN
bits : 9 - 8 (0 bit)
access : read-only
System Handler Priority Register 2
address_offset : 0xD1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_11 : Priority of System Handler 11, SVCall
bits : 30 - 30 (1 bit)
access : read-write
System Handler Priority Register 3
address_offset : 0xD20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_14 : Priority of System Handler 14, PendSV
bits : 22 - 22 (1 bit)
access : read-write
PRI_15 : Priority of System Handler 15, SysTick
bits : 30 - 30 (1 bit)
access : read-write
System Handler Control and State Register
address_offset : 0xD24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SVCALLPENDED : SVCALLPENDED
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
0b0 : Not Pending
SVCall is not pending
0b1 : Pending
SVCall is pending
End of enumeration elements list.
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