\n

MF

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x50 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CSA_CTRL

REF1_STS


CSA_CTRL

Current Sense Amplifier Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSA_CTRL CSA_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSA_EN CSA_GAIN CSA_MI_EN CSA_VZERO

CSA_EN : CSA Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

0b0 : DISABLE

OPA switched off

0b1 : ENABLE

OPA switched on

End of enumeration elements list.

CSA_GAIN : Operational Amplifier Gain Setting
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0b00 : 10

Gain Factor 10

0b01 : 20

Gain Factor 20

0b10 : 40

Gain Factor 40

0b11 : 60

Gain Factor 60

End of enumeration elements list.

CSA_MI_EN : Enable Module Isolation Testmode
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

0b0 : DISABLE

None

0b1 : ENABLE

None

End of enumeration elements list.

CSA_VZERO : Current Sense Output Selection
bits : 8 - 7 (0 bit)
access : read-write

Enumeration:

0b0 : VOUT

CSA output connected to ADC1 Ch13

0b1 : VZERO

voltage reference connected to ADC1 Ch13

End of enumeration elements list.


REF1_STS

Reference 1 Status Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

REF1_STS REF1_STS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VREF1V2_LOTHWARN_STS VREF1V2_UPTHWARN_STS

VREF1V2_LOTHWARN_STS : Status for Undervoltage Threshold Measurement of internal VAREF
bits : 4 - 3 (0 bit)
access : read-only

Enumeration:

0b0 : UPPER_TRIG_RESET

write clears status

0b1 : UPPER_TRIG_SET

trigger status set

End of enumeration elements list.

VREF1V2_UPTHWARN_STS : Status for Overvoltage Threshold Measurement of internal VAREF
bits : 5 - 4 (0 bit)
access : read-only

Enumeration:

0b0 : UPPER_TRIG_RESET

write clears status

0b1 : UPPER_TRIG_SET

trigger status set

End of enumeration elements list.



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