Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
Main wake status register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LIN_WAKE : Wake-up via LIN- Message
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
0b0 : No Wake-up occurred
None
0b1 : Wake-up occurred
None
End of enumeration elements list.
MON : Wake-up via MON which is a logical OR combination of all Wake_STS_MON bits
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
0b0 : No Wake-up occurred
None
0b1 : Wake-up occurred
None
End of enumeration elements list.
GPIO0 : Wake-up via GPIO0 which is a logical OR combination of all Wake_STS_GPIO0 bits
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
0b0 : No Wake-up occurred
None
0b1 : Wake-up occurred
None
End of enumeration elements list.
GPIO1 : Wake-up via GPIO1 which is a logical OR combination of all Wake_STS_GPIO1 bits
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
0b0 : No Wake-up occurred
None
0b1 : Wake-up occurred
None
End of enumeration elements list.
CYC_WAKE : Wake-up caused by Cyclic Wake
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : No Wake-up occurred
None
0b1 : Wake-up occurred
None
End of enumeration elements list.
FAIL : Wake-up after any Fail, which is a logical OR combination of PMU_OT, VDDEXT_OT, VDDEXT_UV
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
0b0 : No Wake-up occurred
None
0b1 : Wake-up occurred
None
End of enumeration elements list.
GPIO2 : Wake-up via GPIO2 which is a logical OR combination of all Wake_STS_GPIO2 bits
bits : 6 - 5 (0 bit)
access : read-only
Enumeration:
0b0 : No Wake-up occurred
None
0b1 : Wake-up occurred
None
End of enumeration elements list.
MON1_WAKE_STS : Status of MON1
bits : 8 - 7 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
MON2_WAKE_STS : Status of MON2
bits : 9 - 8 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
MON3_WAKE_STS : Status of MON3
bits : 10 - 9 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
MON4_WAKE_STS : Status of MON4
bits : 11 - 10 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
MON5_WAKE_STS : Status of MON5
bits : 12 - 11 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
PMU_OT : Wake PMU Overtemperature
bits : 16 - 15 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
VDDEXT_OT : Wake VDDEXT Overtemperature
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
VDDEXT_UV : Wake VDDEXT Undervoltage
bits : 18 - 17 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
Reset Status Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYS_FAIL : Flag which indicates a reset caused by a System Fail reported in the corresponding Fail Register
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
No reset caused by System Fail executed
0b1 : Reset
Reset caused by System Fail executed
End of enumeration elements list.
PMU_WAKE : Flag which indicates a reset caused by Stop-Exit
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
No reset caused by Stop-Exit executed
0b1 : Reset
Reset caused by Stop-Exit executed
End of enumeration elements list.
PMU_SleepEX : Flag which indicates a reset caused by Sleep-Exit
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
No reset caused by Sleep-Exit executed
0b1 : Reset
Reset caused by Sleep-Exit executed
End of enumeration elements list.
PMU_LPR : Low Priority Resets (see PMU_RST_STS2)
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
No Low Priority reset executed
0b1 : Reset
Low Priority reset executed
End of enumeration elements list.
PMU_ClkWDT : Clock Watchdog (CLKWDT) Reset Flag
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
No Clock Watchdog reset executed
0b1 : Reset
Clock Watchdog reset executed
End of enumeration elements list.
PMU_ExtWDT : External Watchdog (WDT1) Reset Flag
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
No External Watchdog reset executed
0b1 : Reset
External Watchdog reset executed
End of enumeration elements list.
PMU_PIN : PIN-Reset Flag
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
No PIN-Reset executed
0b1 : Reset
PIN-Reset executed
End of enumeration elements list.
PMU_VS_POR : Power-On Reset Flag
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
No Power-On reset executed
0b1 : Reset
Power-On reset executed
End of enumeration elements list.
PMU_IntWDT : Internal Watchdog Reset Flag
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
No Internal Watchdog reset executed
0b1 : Reset
Internal Watchdog reset executed
End of enumeration elements list.
PMU_SOFT : Soft-Reset Flag
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
No Soft-Reset executed
0b1 : Reset
Soft-Reset executed
End of enumeration elements list.
LOCKUP : Lockup-Reset Flag
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
No Lockup-Reset executed
0b1 : Reset
Lockup-Reset executed
End of enumeration elements list.
PMU Sleep Behavior Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WAKE_W_RST : Wake-up with reset execution
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : No Reset
Stop-Exit without reset execution
0b1 : Reset
Stop-Exit with reset execution
End of enumeration elements list.
EN_0V9_N : Enables the reduction of the VDDC regulator output to 0.9 V during Stop-Mode
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Enable
Output voltage reduction enabled
0b1 : Disable
Output voltage reduction disabled
End of enumeration elements list.
CYC_WAKE_EN : Enabling Cyclic Wake
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Cyclic Wake disabled
0b1 : Enable
Cyclic Wake enabled
End of enumeration elements list.
CYC_SENSE_EN : Enabling Cyclic Sense
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Cyclic Sense disabled
0b1 : Enable
Cyclic Sense enabled
End of enumeration elements list.
CYC_SENSE_M03 : Mantissa
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
0b0000 : 1
Mantissa value is 1
0b1111 : 16
Mantissa value is 16
End of enumeration elements list.
CYC_SENSE_E01 : Exponent
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
0b00 : 0
Exponent value is 0
0b01 : 1
Exponent value is 1
0b10 : 2
Exponent value is 2
0b11 : 3
Exponent value is 3
End of enumeration elements list.
CYC_WAKE_M03 : Mantissa
bits : 16 - 18 (3 bit)
access : read-write
Enumeration:
0b0000 : 1
Mantissa value is 1
0b1111 : 16
Mantissa value is 16
End of enumeration elements list.
CYC_WAKE_E01 : Exponent
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0b00 : 0
Exponent value is 0
0b01 : 1
Exponent value is 1
0b10 : 2
Exponent value is 2
0b11 : 3
Exponent value is 3
End of enumeration elements list.
CYC_SENSE_S_DEL : Sample Delay in Cyclic Sense
bits : 24 - 25 (2 bit)
access : read-write
Enumeration:
0b000 : 0
10 us typ.
0b001 : 1
20 us typ.
0b010 : 2
30 us typ.
0b011 : 3
40 us typ.
0b100 : 4
60 us typ.
0b101 : 5
80 us typ.
0b110 : 6
100 us typ.
0b111 : 7
150 us typ.
End of enumeration elements list.
PMU Bridge Driver Control
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GL1_CYC_ON : GL1 Cyclic On
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
GL1_HOLD_ON : GL1 Hold Mode On
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
GL2_CYC_ON : GL2 Cyclic On
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
GL2_HOLD_ON : GL2 Hold Mode On
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
CNF_ON : CNF_ON Function
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0b00 : 50 us
None
0b01 : 100 us
None
0b10 : 200 us
None
0b11 : 400 us
None
End of enumeration elements list.
CNF_OFF : CNF_OFF Function
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0b00 : 400 us
None
0b01 : 800 us
None
0b10 : 2000 us
None
0b11 : 4000 us
None
End of enumeration elements list.
Settings Monitor
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MON1_EN : MON1 Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
MON1 disabled
0b1 : Enable
MON1 enabled
End of enumeration elements list.
MON1_FALL : MON1 Wake-up on Falling Edge Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Wake-up disabled
0b1 : Enable
Wake-up enabled
End of enumeration elements list.
MON1_RISE : MON1 Wake-up on Rising Edge Enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Wake-up disabled
0b1 : Enable
Wake-up enabled
End of enumeration elements list.
MON1_CYC : MON1 for Cycle Sense Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Cycle Sense disabled
0b1 : Enable
Cycle Sense enabled
End of enumeration elements list.
MON1_PD : Pull-Down Current Source for MON1 Input Enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Pull-down source disabled
0b1 : Enable
Pull-down source enabled
End of enumeration elements list.
MON1_PU : Pull-Up Current Source for MON1 Input Enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Pull-up source disabled
0b1 : Enable
Pull-up source enabled
End of enumeration elements list.
MON1_NSLEEP_SPARE : MON1 Sleep Bit
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : Sleep Mode
internal MON output forced to 0
0b1 : Active Mode
internal MON output not forced to 0
End of enumeration elements list.
MON1_STS : MON1 Status Input
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
0b0 : Low
MON input has low status
0b1 : High
MON input has high status
End of enumeration elements list.
MON2_EN : MON2 Enable
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
MON2 disabled
0b1 : Enable
MON2 enabled
End of enumeration elements list.
MON2_FALL : MON2 Wake-up on Falling Edge Enable
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Wake-up disabled
0b1 : Enable
Wake-up enabled
End of enumeration elements list.
MON2_RISE : MON2 Wake-up on Rising Edge Enable
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Wake-up disabled
0b1 : Enable
Wake-up enabled
End of enumeration elements list.
MON2_CYC : MON2 for Cycle Sense Enable
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Cycle Sense disabled
0b1 : Enable
Cycle Sense enabled
End of enumeration elements list.
MON2_PD : Pull-Down Current Source for MON2 Input Enable
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Pull-down source disabled
0b1 : Enable
Pull-down source enabled
End of enumeration elements list.
MON2_PU : Pull-Up Current Source for MON2 Input Enable
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Pull-up source disabled
0b1 : Enable
Pull-up source enabled
End of enumeration elements list.
MON2_NSLEEP_SPARE : MON2 Sleep Bit
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
0b0 : Sleep Mode
internal MON output forced to 0
0b1 : Active Mode
internal MON output not forced to 0
End of enumeration elements list.
MON2_STS : MON2 Status Input
bits : 15 - 14 (0 bit)
access : read-only
Enumeration:
0b0 : Low
MON input has low status
0b1 : High
MON input has high status
End of enumeration elements list.
MON3_EN : MON3 Enable
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
MON3 disabled
0b1 : Enable
MON3 enabled
End of enumeration elements list.
MON3_FALL : MON3 Wake-up on Falling Edge Enable
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Wake-up disabled
0b1 : Enable
Wake-up enabled
End of enumeration elements list.
MON3_RISE : MON3 Wake-up on Rising Edge Enable
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Wake-up disabled
0b1 : Enable
Wake-up enabled
End of enumeration elements list.
MON3_CYC : MON3 for Cycle Sense Enable
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Cycle Sense disabled
0b1 : Enable
Cycle Sense enabled
End of enumeration elements list.
MON3_PD : Pull-Down Current Source for MON3 Input Enable
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Pull-down source disabled
0b1 : Enable
Pull-down source enabled
End of enumeration elements list.
MON3_PU : Pull-Up Current Source for MON3 Input Enable
bits : 21 - 20 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Pull-up source disabled
0b1 : Enable
Pull-up source enabled
End of enumeration elements list.
MON3_NSLEEP_SPARE : MON3 Sleep Bit
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
0b0 : Sleep Mode
internal MON output forced to 0
0b1 : Active Mode
internal MON output not forced to 0
End of enumeration elements list.
MON3_STS : MON3 Status Input
bits : 23 - 22 (0 bit)
access : read-only
Enumeration:
0b0 : Low
MON input has low status
0b1 : High
MON input has high status
End of enumeration elements list.
MON4_EN : MON4 Enable
bits : 24 - 23 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
MON4 disabled
0b1 : Enable
MON4 enabled
End of enumeration elements list.
MON4_FALL : MON4 Wake-up on Falling Edge Enable
bits : 25 - 24 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Wake-up disabled
0b1 : Enable
Wake-up enabled
End of enumeration elements list.
MON4_RISE : MON4 Wake-up on Rising Edge Enable
bits : 26 - 25 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Wake-up disabled
0b1 : Enable
Wake-up enabled
End of enumeration elements list.
MON4_CYC : MON4 for Cycle Sense Enable
bits : 27 - 26 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Cycle Sense disabled
0b1 : Enable
Cycle Sense enabled
End of enumeration elements list.
MON4_PD : Pull-Down Current Source for MON4 Input Enable
bits : 28 - 27 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Pull-down source disabled
0b1 : Enable
Pull-down source enabled
End of enumeration elements list.
MON4_PU : Pull-Up Current Source for MON4 Input Enable
bits : 29 - 28 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Pull-up source disabled
0b1 : Enable
Pull-up source enabled
End of enumeration elements list.
MON4_NSLEEP_SPARE : MON4 Sleep Bit
bits : 30 - 29 (0 bit)
access : read-write
Enumeration:
0b0 : Sleep Mode
internal MON output forced to 0
0b1 : Active Mode
internal MON output not forced to 0
End of enumeration elements list.
MON4_STS : MON4 Status Input
bits : 31 - 30 (0 bit)
access : read-only
Enumeration:
0b0 : Low
MON input has low status
0b1 : High
MON input has high status
End of enumeration elements list.
Settings Monitor
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MON5_EN : MON5 Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
MON5 disabled
0b1 : Enable
MON5 enabled
End of enumeration elements list.
MON5_FALL : MON5 Wake-up on Falling Edge Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Wake-up disabled
0b1 : Enable
Wake-up enabled
End of enumeration elements list.
MON5_RISE : MON5 Wake-up on Rising Edge Enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Wake-up disabled
0b1 : Enable
Wake-up enabled
End of enumeration elements list.
MON5_CYC : MON5 for Cycle Sense Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Cycle Sense disabled
0b1 : Enable
Cycle Sense enabled
End of enumeration elements list.
MON5_PD : Pull-Down Current Source for MON5 Input Enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Pull-down source disabled
0b1 : Enable
Pull-down source enabled
End of enumeration elements list.
MON5_PU : Pull-Up Current Source for MON5 Input Enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Pull-up source disabled
0b1 : Enable
Pull-up source enabled
End of enumeration elements list.
MON5_NSLEEP_SPARE : MON5 Sleep Bit
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : Sleep Mode
internal MON output forced to 0
0b1 : Active Mode
internal MON output not forced to 0
End of enumeration elements list.
MON5_STS : MON5 Status Input
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
0b0 : Low
MON input has low status
0b1 : High
MON input has high status
End of enumeration elements list.
GPIO Port wake status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_STS_0 : Status of GPIO0_0
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
GPIO0_STS_1 : Status of GPIO0_1
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
GPIO0_STS_2 : Status of GPIO0_2
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
GPIO0_STS_3 : Status of GPIO0_3
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
GPIO0_STS_4 : Status of GPIO0_4
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
GPIO0_STS_5 : Status of GPIO0_5
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
GPIO1_STS_0 : Wake GPIO1_0
bits : 8 - 7 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
GPIO1_STS_1 : Wake GPIO1_1
bits : 9 - 8 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
GPIO1_STS_2 : Wake GPIO1_2
bits : 10 - 9 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
GPIO1_STS_4 : Wake GPIO1_4
bits : 12 - 11 (0 bit)
access : read-only
Enumeration:
0b0 : No wake-up detected
None
0b1 : wake-up detected
None
End of enumeration elements list.
LIN Wake Enable
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LIN_WAKE_EN : Lin Wake enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : Wake Disabled
None
0b1 : Wake enabled
None
End of enumeration elements list.
Overtemperature Control Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PMU_OT_TH_CNF : PMU Overtemperature threshold
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0b0000 : 0
131 degree C
0b0001 : 1
136 degree C
0b0010 : 2
141 degree C
0b0011 : 3
146 degree C
0b0100 : 4
152 degree C
0b0101 : 5
157 degree C
0b0110 : 6
163 degree C
0b0111 : 7
169 degree C
0b1000 : 8
175 degree C
0b1001 : 9
181 degree C
0b1010 : 10
187 degree C
0b1011 : 11
193 degree C
0b1100 : 12
200 degree C
0b1101 : 13
206 degree C
0b1110 : 14
214 degree C
0b1111 : 15
221 degree C
End of enumeration elements list.
PMU_OT_INT_EN : PMU Overtemperature Interrupt Enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : No Interrupt
Interrupt on OT disabled
0b1 : Interrupt
Interrupt on OT enabled
End of enumeration elements list.
PMU_OT_WAKE_EN : PMU Wake On Overtemperature Enable
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
no Wake-Up on OT condition
0b1 : Enable
Wake-Up on OT condition
End of enumeration elements list.
PMU_OT_EN : PMU Overtemperature Detection Enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
Overtemperature detection disabled
0b1 : Enable
Overtemperature detection enabled
End of enumeration elements list.
Highside Control Register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HS1_CYC_EN : High-Side 1 switch enable for cyclic sense
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
None
0b1 : Enable
None
End of enumeration elements list.
SPARE : Spare
bits : 10 - 9 (0 bit)
access : read-write
Reset Blind Time Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RST_TFB : Reset Pin Blind Time Selection Bits
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0b00 : RST_TFB_0
0.5 us typ.
0b01 : RST_TFB_1
1 us typ.
0b10 : RST_TFB_2
5 us typ.
0b11 : RST_TFB_3
31 us typ.
End of enumeration elements list.
WFS System Fail Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUPP_SHORT : Supply Short
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
0b0 : Main Supply ok
VDDP or VDDC are in expected range
0b1 : Main Supply short
VDDP or VDDC are in short circuit condition
End of enumeration elements list.
SUPP_TMOUT : Supply Time Out
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
0b0 : Main Supply ok
VDDP or VDDC are in expected range
0b1 : Main Supply fail
VDDP or VDDC do not have stable operating point
End of enumeration elements list.
PMU_1V5_OVL : VDDC Overload Flag
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
0b0 : No Overload
VDDC ok
0b1 : Overload
Hall VDDC Overload
End of enumeration elements list.
PMU_5V_OVL : VDDP Overload Flag
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
0b0 : No Overload
VDDP ok
0b1 : Overload
VDDP Overload
End of enumeration elements list.
SYS_CLK_WDT : System Clock (fsys)Watchdog Fail
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : No System Clock Fail
fsys ok
0b1 : System Clock Fail
fsys failed
End of enumeration elements list.
SYS_OT : System Overtemperature Indication Flag
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
0b0 : No Overtemperature
System ok
0b1 : Overtemperature
System Overtemperature
End of enumeration elements list.
WDT1_SEQ_FAIL : External Watchdog (WDT1) Sequential Fail
bits : 6 - 5 (0 bit)
access : read-only
Enumeration:
0b0 : No Fail
System working properly
0b1 : Sequential Watchdog Fail
5 consecutive watchdog fails
End of enumeration elements list.
LP_CLKWD : LP_CLKWD
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
0b0 : ok
None
0b1 : fail
None
End of enumeration elements list.
PMU_OT_FAIL : PMU Overtemperature Indication Flag
bits : 8 - 7 (0 bit)
access : read-only
Enumeration:
0b0 : No Overtemperature
PMU ok
0b1 : Overtemperature
PMU Overtemperature
End of enumeration elements list.
Voltage Reg Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PMU_1V5_OVERVOLT : Overvoltage at VDDC regulator
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
0b0 : No overvoltage
None
0b1 : Overvoltage
None
End of enumeration elements list.
PMU_1V5_OVERLOAD : Overload at VDDC regulator
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
0b0 : No overload
None
0b1 : Overload
None
End of enumeration elements list.
PMU_1V5_FAIL_EN : Enabling of VDDC status information as interrupt source
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
No interrupts are generated
0b1 : Enable
Interrupts are generated
End of enumeration elements list.
PMU_OVERTEMP : PMU Overtemperature
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
0b0 : No overtemperature
None
0b1 : Overtemperature
None
End of enumeration elements list.
PMU_5V_OVERVOLT : Overvoltage at VDDP regulator
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : No overvoltage
None
0b1 : Overvoltage
None
End of enumeration elements list.
PMU_5V_OVERLOAD : Overload at VDDP regulator
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
0b0 : No overload
None
0b1 : Overload
None
End of enumeration elements list.
PMU_5V_FAIL_EN : Enabling of VDDP status information as interrupt source
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
No interrupts are generated
0b1 : Enable
Interrupts are generated
End of enumeration elements list.
PMU_1V5_OVERVOLT_SC : Overvoltage at VDDC regulator Status clear
bits : 8 - 7 (0 bit)
access : write-only
Enumeration:
0b0 : No Clear
Overvoltage status not cleared
0b1 : Clear
Overvoltage status cleared
End of enumeration elements list.
PMU_1V5_OVERLOAD_SC : Overload at VDDC regulator Status clear
bits : 9 - 8 (0 bit)
access : write-only
Enumeration:
0b0 : No Clear
Overload status not cleared
0b1 : Clear
Overload status cleared
End of enumeration elements list.
PMU_OVERTEMP_SC : Overtemperature Status clear
bits : 11 - 10 (0 bit)
access : write-only
Enumeration:
0b0 : No Clear
Overtemperature status not cleared
0b1 : Clear
Overtemperature status cleared
End of enumeration elements list.
PMU_5V_OVERVOLT_SC : Overvoltage at VDDP regulator Status clear
bits : 12 - 11 (0 bit)
access : write-only
Enumeration:
0b0 : No Clear
Overvoltage status not cleared
0b1 : Clear
Overvoltage status cleared
End of enumeration elements list.
PMU_5V_OVERLOAD_SC : Overload at VDDP regulator Status clear
bits : 13 - 12 (0 bit)
access : write-only
Enumeration:
0b0 : No Clear
Overload status not cleared
0b1 : Clear
Overload status cleared
End of enumeration elements list.
PMU Wake-up Timing Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNF_LIN_FT : Wake-up Filter time for LIN WAKE
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : 50_us
50 us filter time
0b1 : 30_us
30 us filter time
End of enumeration elements list.
CNF_MON_FT : Wake-up Filter time for Monitoring Inputs
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : 20_us
20 us filter time
0b1 : 40_us
40 us filter time
End of enumeration elements list.
CNF_GPIO_FT : Wake-up Filter time for General Purpose IO
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0b00 : 10_us
10 us filter time
0b01 : 20_us
20 us filter time
0b10 : 40_us
40 us filter time
0b11 : 5_us
5 us filter time
End of enumeration elements list.
POR Reset Configuration Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNF_FILT : Configuration for reset filter
bits : 0 - 0 (1 bit)
access : read-write
Wake Configuration GPIO Port 0 Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RI_0 : Port 0_0 Wake-up on Rising Edge enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
RI_1 : Port 0_1 Wake-up on Rising Edge enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
RI_2 : Port 0_2 Wake-up on Rising Edge enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
RI_3 : Port 0_3 Wake-up on Rising Edge enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
RI_4 : Port 0_4 Wake-up on Rising Edge enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
RI_5 : Port 0_5 Wake-up on Rising Edge enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
FA_0 : Port 0_0 Wake-up on Falling Edge enable
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
FA_1 : Port 0_1 Wake-up on Falling Edge enable
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
FA_2 : Port 0_2 Wake-up on Falling Edge enable
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
FA_3 : Port 0_3 Wake-up on Falling Edge enable
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
FA_4 : Port 0_4 Wake-up on Falling Edge enable
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
FA_5 : Port 0_5 Wake-up on Falling Edge enable
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
CYC_0 : GPIO0_0 input for cycle sense enable
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
CYC_1 : GPIO0_1 input for cycle sense enable
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
CYC_2 : GPIO0_2 input for cycle sense enable
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
CYC_3 : GPIO0_3 input for cycle sense enable
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
CYC_4 : GPIO0_4 input for cycle sense enable
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
CYC_5 : GPIO0_5 input for cycle sense enable
bits : 21 - 20 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
VDDEXT Control
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VDDEXT_ENABLE : VDDEXT Supply Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
VDDEXT Supply disable
0b1 : Enable
VDDEXT supply enable
End of enumeration elements list.
VDDEXT_CYC_EN : VDDEXT Supply for Cyclic Sense Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
VDDEXT for cyclic sense disable
0b1 : Enable
VDDEXT for cyclic sense enable
End of enumeration elements list.
VDDEXT_FAIL_EN : Enabling of VDDEXT Supply status information as interrupt source
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
VDDEXT fail interrupts are disable
0b1 : Enable
VDDEXT fail Interrupts are enable
End of enumeration elements list.
VDDEXT_OT_IS : VDDEXT Supply OverTemperature Interrupt Status
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
0b0 : VDDEXT no overtemperature condition
None
0b1 : VDDEXT overtemperature condition
None
End of enumeration elements list.
VDDEXT_UV_IS : VDDEXT Supply Undervoltage Interrupt Status
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : VDDEXT not in undervoltage condition
None
0b1 : VDDEXT in undervoltage condition
None
End of enumeration elements list.
VDDEXT_OT_STS : VDDEXT Supply Overtemperature Status
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
0b0 : VDDEXT not in overtemperature condition
None
0b1 : VDDEXT in overtemperature condition
None
End of enumeration elements list.
VDDEXT_OT : VDDEXT Supply Overtemperature
bits : 6 - 5 (0 bit)
access : read-only
Enumeration:
0b0 : VDDEXT not in overtemperature condition
None
0b1 : VDDEXT in overtemperature condition
None
End of enumeration elements list.
VDDEXT_STABLE : VDDEXT Supply Stable
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
0b0 : VDDEXT not in stable condition
None
0b1 : VDDEXT in stable condition
None
End of enumeration elements list.
VDDEXT_OT_ISC : VDDEXT Supply Overtemperature Interrupt Status clear
bits : 11 - 10 (0 bit)
access : write-only
Enumeration:
0b1 : No Clear
VDDEXT OverTemperature not cleared
0b0 : Clear
VDDEXT OverTemperature cleared
End of enumeration elements list.
VDDEXT_UV_ISC : VDDEXT Supply Undervoltage Interrupt Status clear
bits : 12 - 11 (0 bit)
access : write-only
Enumeration:
0b1 : No Clear
VDDEXT Undervoltage not cleared
0b0 : Clear
VDDEXT Undervoltage cleared
End of enumeration elements list.
VDDEXT_OT_SC : VDDEXT Supply Overtemperature Status clear
bits : 13 - 12 (0 bit)
access : write-only
Enumeration:
0b1 : No Clear
VDDEXT Overtemperature status not cleared
0b0 : Clear
VDDEXT Overtemperature status cleared
End of enumeration elements list.
General Purpose User DATA0to3
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : DATA0 Storage Byte
bits : 0 - 6 (7 bit)
access : read-write
DATA1 : DATA1 Storage Byte
bits : 8 - 14 (7 bit)
access : read-write
DATA2 : DATA2 Storage Byte
bits : 16 - 22 (7 bit)
access : read-write
DATA3 : DATA3 Storage Byte
bits : 24 - 30 (7 bit)
access : read-write
General Purpose User DATA4to7
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA4 : DATA4 Storage Byte
bits : 0 - 6 (7 bit)
access : read-write
DATA5 : DATA5 Storage Byte
bits : 8 - 14 (7 bit)
access : read-write
DATA6 : DATA6 Storage Byte
bits : 16 - 22 (7 bit)
access : read-write
DATA7 : DATA7 Storage Byte
bits : 24 - 30 (7 bit)
access : read-write
General Purpose User DATA8to11
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA8 : DATA8 Storage Byte
bits : 0 - 6 (7 bit)
access : read-write
DATA9 : DATA9 Storage Byte
bits : 8 - 14 (7 bit)
access : read-write
DATA10 : DATA10 Storage Byte
bits : 16 - 22 (7 bit)
access : read-write
DATA11 : DATA11 Storage Byte
bits : 24 - 30 (7 bit)
access : read-write
Wake Configuration GPIO Port 1 Register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RI_0 : Port 1_0 Wake-up on Rising Edge enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
RI_1 : Port 1_1 Wake-up on Rising Edge enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
RI_2 : Port 1_2 Wake-up on Rising Edge enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
RI_4 : Port 1_4 Wake-up on Rising Edge enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
FA_0 : Port 1_0 Wake-up on Falling Edge enable
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
FA_1 : Port 1_1 Wake-up on Falling Edge enable
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
FA_2 : Port 1_2 Wake-up on Falling Edge enable
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
FA_4 : Port 1_4 Wake-up on Falling Edge enable
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
CYC_0 : GPIO1_0 input for cycle sense enable
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
CYC_1 : GPIO1_1 input for cycle sense enable
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
CYC_2 : GPIO1_2 input for cycle sense enable
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
CYC_4 : GPIO1_4 input for cycle sense enable
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
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