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TIMER21

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CON

CNT

ICLR

CON1

MOD

RC


CON

Timer 2 Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CON CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP_RL2 C_T2 TR2 EXEN2 EXF2 TF2

CP_RL2 : Capture/Reload Select
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

0b0 : Reload

upon overflow or upon negative/positive transition at pin T2EX (when EXEN2 = 1).

0b1 : Capture

Timer 2 data register contents on the negative/positive transition at pin T2EX, provided EXEN2 = 1.The negative or positive transition at Pin T2EX is selected by bit EDGESEL.

End of enumeration elements list.

C_T2 : Timer or Counter Select
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

0b0 : Timer

function selected.

0b1 : Count

upon negative edge at pin T2.

End of enumeration elements list.

TR2 : Timer 2 Start/Stop Control
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

0b0 : STOP

Timer 2.

0b1 : START

Timer 2.

End of enumeration elements list.

EXEN2 : Timer 2 External Enable Control
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

0b0 : DISABLED

External events are disabled.

0b1 : ENABLED

External events are enabled in Capture/Reload Mode.

End of enumeration elements list.

EXF2 : Timer 2 External Flag
bits : 6 - 5 (0 bit)
access : read-only

TF2 : Timer 2 Overflow/Underflow Flag
bits : 7 - 6 (0 bit)
access : read-only


CNT

Timer 2 Count Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CNT CNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T2L T2H

T2L : Timer 2 Value
bits : 0 - 6 (7 bit)
access : read-write

T2H : Timer 2 Value
bits : 8 - 14 (7 bit)
access : read-write


ICLR

Timer 2 Interrupt Clear Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICLR ICLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXF2CLR TF2CLR

EXF2CLR : External Interrupt Clear Flag
bits : 6 - 5 (0 bit)
access : write-only

Enumeration:

0b0 : N/A

External interrupt is not cleared.

0b1 : Clear

External interrupt

End of enumeration elements list.

TF2CLR : Overflow/Underflow Interrupt Clear Flag
bits : 7 - 6 (0 bit)
access : write-only

Enumeration:

0b0 : N/A

Overflow/underflow interrupt is not cleared.

0b1 : Clear

Overflow/underflow interrupt

End of enumeration elements list.


CON1

Timer 2 Control Register 1
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CON1 CON1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXF2EN TF2EN

EXF2EN : External Interrupt Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

0b0 : DISABLE

External interrupt.

0b1 : ENABLE

External interrupt

End of enumeration elements list.

TF2EN : Overflow/Underflow Interrupt Enable
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

0b0 : DISABLE

Overflow/underflow interrupt.

0b1 : ENABLE

Overflow/underflow interrupt.

End of enumeration elements list.


MOD

Timer 2 Mode Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MOD MOD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCEN T2PRE PREN EDGESEL T2RHEN T2REGS

DCEN : Up/Down Counter Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

0b0 : DISABLED

Up/Down Counter function is disabled

0b1 : ENABLED

Up/Down Counter function is enabled and controlled by pin T2EX (Up = 1, Down = 0)

End of enumeration elements list.

T2PRE : Timer 2 Prescaler Bit
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0b000 : DIV1

fT2 = fsys

0b001 : DIV2

fT2 = fsys / 2

0b010 : DIV4

DfT2 = fsys / 4

0b011 : DIV8

fT2 = fsys / 8

0b100 : DIV16

fT2 = fsys / 16

0b101 : DIV32

fT2 = fsys / 32

0b110 : DIV64

fT2 = fsys / 64

0b111 : DIV128

fT2 = fsys / 128

End of enumeration elements list.

PREN : Prescaler Enable
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

0b0 : DISABLED

Prescaler is disabled and the 2 or 12 divider takes effect.

0b1 : ENABLED

Prescaler is enabled (see T2PRE bit) and the 2 or 12 divider is bypassed.

End of enumeration elements list.

EDGESEL : Edge Select in Capture Mode/Reload Mode
bits : 5 - 4 (0 bit)
access : read-write

Enumeration:

0b0 : FALLING

The falling edge at Pin T2EX is selected.

0b1 : RISING

The rising edge at Pin T2EX is selected.

End of enumeration elements list.

T2RHEN : Timer 2 External Start Enable
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

0b0 : DISABLED

Timer 2 External Start is disabled.

0b1 : ENABLED

Timer 2 External Start is enabled.

End of enumeration elements list.

T2REGS : Edge Select for Timer 2 External Start
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

0b0 : FALLING

The falling edge at Pin T2EX is selected.

0b1 : RISING

The rising edge at Pin T2EX is selected.

End of enumeration elements list.


RC

Timer 2 Reload/Capture Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RC RC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCL2 RCH2

RCL2 : Reload/Capture Value
bits : 0 - 6 (7 bit)
access : read-write

RCH2 : Reload/Capture Value
bits : 8 - 14 (7 bit)
access : read-write



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