Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x100 byte (0x0)
mem_usage : registers
protection : not protected
Clock Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FDIV : Fractional Divider Selection
bits : 0 - 6 (7 bit)
access : read-write
IDIV : Divider Selection
bits : 8 - 14 (7 bit)
access : read-write
Enumeration:
0x00 : value1
Divider is bypassed.
0x01 : value2
1; MCLK = 32 MHz
0x02 : value3
2; MCLK = 16 MHz
0x03 : value4
3; MCLK = 10.67 MHz
0x04 : value5
4; MCLK = 8 MHz
0xFE : value6
254; MCLK = 126 kHz
0xFF : value7
255; MCLK = 125.5 kHz
End of enumeration elements list.
PCLKSEL : PCLK Clock Select
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : value1
PCLK = MCLK
#1 : value2
PCLK = 2 x MCLK
End of enumeration elements list.
RTCCLKSEL : RTC Clock Select
bits : 17 - 18 (2 bit)
access : read-write
CNTADJ : Counter Adjustment
bits : 20 - 28 (9 bit)
access : read-write
Enumeration:
0x000 : value1
1 clock cycles of the DCO1, 64MHz clock
0x001 : value2
2 clock cycles of the DCO1, 64MHz clock
0x002 : value3
3 clock cycles of the DCO1, 64MHz clock
0x003 : value4
4 clock cycles of the DCO1, 64MHz clock
0x004 : value5
5 clock cycles of the DCO1, 64MHz clock
0x3FE : value6
1023 clock cycles of the DCO1, 64MHz clock
0x3FF : value7
1024 clock cycles of the DCO1, 64MHz clock
End of enumeration elements list.
VDDC2LOW : VDDC too low
bits : 30 - 29 (0 bit)
access : read-only
Enumeration:
#0 : value1
VDDC is not too low and the fractional divider input clock is running at the targeted frequency
#1 : value2
VDDC is too low and the fractional divider input clock is not running at the targeted frequency
End of enumeration elements list.
VDDC2HIGH : VDDC too high
bits : 31 - 30 (0 bit)
access : read-only
Enumeration:
#0 : value1
VDDC is not too high
#1 : value2
VDDC is too high
End of enumeration elements list.
Peripheral 0 Clock Gating Clear
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VADC : VADC and SHS Gating Clear
bits : 0 - -1 (0 bit)
access : write-only
Enumeration:
#0 : value1
no effect
#1 : value2
disable gating
End of enumeration elements list.
CCU40 : CCU40 Gating Clear
bits : 2 - 1 (0 bit)
access : write-only
Enumeration:
#0 : value1
no effect
#1 : value2
disable gating
End of enumeration elements list.
USIC0 : USIC0 Gating Clear
bits : 3 - 2 (0 bit)
access : write-only
Enumeration:
#0 : value1
no effect
#1 : value2
disable gating
End of enumeration elements list.
WDT : WDT Gating Clear
bits : 9 - 8 (0 bit)
access : write-only
Enumeration:
#0 : value1
no effect
#1 : value2
disable gating
End of enumeration elements list.
RTC : RTC Gating Clear
bits : 10 - 9 (0 bit)
access : write-only
Enumeration:
#0 : value1
no effect
#1 : value2
disable gating
End of enumeration elements list.
Oscillator Control and Status Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OSC2L : Oscillator Valid Low Status Bit
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
#0 : value1
The OSC frequency is usable
#1 : value2
The OSC frequency is not usable. Frequency is too low.
End of enumeration elements list.
OSC2H : Oscillator Valid High Status Bit
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : value1
The OSC frequency is usable
#1 : value2
The OSC frequency is not usable. Frequency is too high.
End of enumeration elements list.
OWDRES : Oscillator Watchdog Reset
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : value1
The Oscillator Watchdog is not cleared and remains active
#1 : value2
The Oscillator Watchdog is cleared and restarted. The OSC2L and OSC2H flag will be held in the last value until it is updated after 3 standby clock cycles.
End of enumeration elements list.
OWDEN : Oscillator Watchdog Enable
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
#0 : value1
The Oscillator Watchdog is disabled
#1 : value2
The Oscillator Watchdog is enabled
End of enumeration elements list.
Power Save Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FPD : Flash Power Down
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
no effect
#1 : value2
Flash power down when entering power save mode. Upon wake-up, CPU is able to fetch code from flash.
End of enumeration elements list.
Peripheral 0 Clock Gating Status
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VADC : VADC and SHS Gating Status
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
#0 : value1
gating de-asserted
#1 : value2
gating asserted
End of enumeration elements list.
CCU40 : CCU40 Gating Status
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
#0 : value1
gating de-asserted
#1 : value2
gating asserted
End of enumeration elements list.
USIC0 : USIC0 Gating Status
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
#0 : value1
gating de-asserted
#1 : value2
gating asserted
End of enumeration elements list.
WDT : WDT Gating Status
bits : 9 - 8 (0 bit)
access : read-only
Enumeration:
#0 : value1
gating de-asserted
#1 : value2
gating asserted
End of enumeration elements list.
RTC : RTC Gating Status
bits : 10 - 9 (0 bit)
access : read-only
Enumeration:
#0 : value1
gating de-asserted
#1 : value2
gating asserted
End of enumeration elements list.
Peripheral 0 Clock Gating Set
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VADC : VADC and SHS Gating Set
bits : 0 - -1 (0 bit)
access : write-only
Enumeration:
#0 : value1
no effect
#1 : value2
enable gating
End of enumeration elements list.
CCU40 : CCU40 Gating Set
bits : 2 - 1 (0 bit)
access : write-only
Enumeration:
#0 : value1
no effect
#1 : value2
enable gating
End of enumeration elements list.
USIC0 : USIC0 Gating Set
bits : 3 - 2 (0 bit)
access : write-only
Enumeration:
#0 : value1
no effect
#1 : value2
enable gating
End of enumeration elements list.
WDT : WDT Gating Set
bits : 9 - 8 (0 bit)
access : write-only
Enumeration:
#0 : value1
no effect
#1 : value2
enable gating
End of enumeration elements list.
RTC : RTC Gating Set
bits : 10 - 9 (0 bit)
access : write-only
Enumeration:
#0 : value1
no effect
#1 : value2
enable gating
End of enumeration elements list.
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