\n

PAU

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x10000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

AVAIL0

ROMSIZE

FLSIZE

RAM0SIZE

AVAIL1

AVAIL2

PRIVDIS0

PRIVDIS1

PRIVDIS2


AVAIL0

Peripheral Availability Register 0
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AVAIL0 AVAIL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AVAIL5 AVAIL6 AVAIL7 AVAIL20 AVAIL21 AVAIL22 AVAIL23 AVAIL24 AVAIL25 AVAIL26

AVAIL5 : RAM Block 1 Availability Flag
bits : 5 - 4 (0 bit)
access : read-only

Enumeration:

#0 : value1

RAM block 1 is not available.

#1 : value2

RAM block 1 is available.

End of enumeration elements list.

AVAIL6 : RAM Block 2 Availability Flag
bits : 6 - 5 (0 bit)
access : read-only

Enumeration:

#0 : value1

RAM block 2 is not available.

#1 : value2

RAM block 2 is available.

End of enumeration elements list.

AVAIL7 : RAM Block 3 Availability Flag
bits : 7 - 6 (0 bit)
access : read-only

Enumeration:

#0 : value1

RAM block 3 is not available.

#1 : value2

RAM block 3 is available.

End of enumeration elements list.

AVAIL20 : MATH Global SFRs and Divider Availability Flag
bits : 20 - 19 (0 bit)
access : read-only

Enumeration:

#0 : value1

MATH Global SFRs and Divider are not available.

#1 : value2

MATH Global SFRs and Divider are available.

End of enumeration elements list.

AVAIL21 : MATH CORDIC Availability Flag
bits : 21 - 20 (0 bit)
access : read-only

Enumeration:

#0 : value1

MATH CORDIC is not available.

#1 : value2

MATH CORDIC is available.

End of enumeration elements list.

AVAIL22 : Port 0 Availability Flag
bits : 22 - 21 (0 bit)
access : read-only

Enumeration:

#0 : value1

Port 0 is not available.

#1 : value2

Port 0 is available.

End of enumeration elements list.

AVAIL23 : Port 1 Availability Flag
bits : 23 - 22 (0 bit)
access : read-only

Enumeration:

#0 : value1

Port 1 is not available.

#1 : value2

Port 1 is available.

End of enumeration elements list.

AVAIL24 : Port 2 Availability Flag
bits : 24 - 23 (0 bit)
access : read-only

Enumeration:

#0 : value1

Port 2 is not available.

#1 : value2

Port 2 is available.

End of enumeration elements list.

AVAIL25 : Port 3 Availability Flag
bits : 25 - 24 (0 bit)
access : read-only

Enumeration:

#0 : value1

Port 3 is not available.

#1 : value2

Port 3 is available.

End of enumeration elements list.

AVAIL26 : Port 4 Availability Flag
bits : 26 - 25 (0 bit)
access : read-only

Enumeration:

#0 : value1

Port 4 is not available.

#1 : value2

Port 4 is available.

End of enumeration elements list.


ROMSIZE

ROM Size Register
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ROMSIZE ROMSIZE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : ROM Size
bits : 8 - 12 (5 bit)
access : read-only


FLSIZE

Flash Size Register
address_offset : 0x404 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLSIZE FLSIZE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : Flash Size
bits : 12 - 16 (5 bit)
access : read-only


RAM0SIZE

RAM0 Size Register
address_offset : 0x410 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RAM0SIZE RAM0SIZE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : RAM0 Size
bits : 8 - 11 (4 bit)
access : read-only


AVAIL1

Peripheral Availability Register 1
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AVAIL1 AVAIL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AVAIL0 AVAIL1 AVAIL4 AVAIL5 AVAIL6 AVAIL7 AVAIL8 AVAIL9 AVAIL10 AVAIL11 AVAIL12 AVAIL16 AVAIL17 AVAIL25 AVAIL26 AVAIL27 AVAIL28

AVAIL0 : USIC0 Channel 0 Availability Flag
bits : 0 - -1 (0 bit)
access : read-only

Enumeration:

#0 : value1

USIC0 Channel 0 is not available.

#1 : value2

USIC0 Channel 0 is available.

End of enumeration elements list.

AVAIL1 : USIC0 Channel 1 Availability Flag
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : value1

USIC0 Channel 1 is not available.

#1 : value2

USIC0 Channel 1 is available.

End of enumeration elements list.

AVAIL4 : PRNG Availability Flag
bits : 4 - 3 (0 bit)
access : read-only

Enumeration:

#0 : value1

PRNG is not available.

#1 : value2

PRNG is available.

End of enumeration elements list.

AVAIL5 : VADC0 Basic SFRs Availability Flag
bits : 5 - 4 (0 bit)
access : read-only

Enumeration:

#0 : value1

VADC0 Basic SFRs are not available.

#1 : value2

VADC0 Basic SFRs are available.

End of enumeration elements list.

AVAIL6 : VADC0 Group 0 SFRs Availability Flag
bits : 6 - 5 (0 bit)
access : read-only

Enumeration:

#0 : value1

VADC0 Group 0 SFRs are not available.

#1 : value2

VADC0 Group 0 SFRs are available.

End of enumeration elements list.

AVAIL7 : VADC0 Group 1 SFRs Availability Flag
bits : 7 - 6 (0 bit)
access : read-only

Enumeration:

#0 : value1

VADC0 Group 1 SFRs are not available.

#1 : value2

VADC0 Group 1 SFRs are available.

End of enumeration elements list.

AVAIL8 : SHS0 Availability Flag
bits : 8 - 7 (0 bit)
access : read-only

Enumeration:

#0 : value1

SHS0 is not available.

#1 : value2

SHS0 is available.

End of enumeration elements list.

AVAIL9 : CCU40 kernel SFRs and CC40 Availability Flag
bits : 9 - 8 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU40 kernel SFRs and CC40 is not available.

#1 : value2

CCU40 kernel SFRs and CC40 is available.

End of enumeration elements list.

AVAIL10 : CCU40 CC41 Availability Flag
bits : 10 - 9 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU40 CC41 is not available.

#1 : value2

CCU40 CC41 is available.

End of enumeration elements list.

AVAIL11 : CCU40 CC42 Availability Flag
bits : 11 - 10 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU40 CC42 is not available.

#1 : value2

CCU40 CC42 is available.

End of enumeration elements list.

AVAIL12 : CCU40 CC43 Availability Flag
bits : 12 - 11 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU40 CC43 is not available.

#1 : value2

CCU40 CC43 is available.

End of enumeration elements list.

AVAIL16 : USIC1 Channel 0 Availability Flag
bits : 16 - 15 (0 bit)
access : read-only

Enumeration:

#0 : value1

USIC1 Channel 0 is not available.

#1 : value2

USIC1 Channel 0 is available.

End of enumeration elements list.

AVAIL17 : USIC1 Channel 1 Availability Flag
bits : 17 - 16 (0 bit)
access : read-only

Enumeration:

#0 : value1

USIC1 Channel 1 is not available.

#1 : value2

USIC1 Channel 1 is available.

End of enumeration elements list.

AVAIL25 : CCU41 kernel SFRs and CC40 Availability Flag
bits : 25 - 24 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU41 kernel SFRs and CC40 is not available.

#1 : value2

CCU41 kernel SFRs and CC40 is available.

End of enumeration elements list.

AVAIL26 : CCU41 CC41 Availability Flag
bits : 26 - 25 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU41 CC41 is not available.

#1 : value2

CCU41 CC41 is available.

End of enumeration elements list.

AVAIL27 : CCU41 CC42 Availability Flag
bits : 27 - 26 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU41 CC42 is not available.

#1 : value2

CCU41 CC42 is available.

End of enumeration elements list.

AVAIL28 : CCU41 CC43 Availability Flag
bits : 28 - 27 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU41 CC43 is not available.

#1 : value2

CCU41 CC43 is available.

End of enumeration elements list.


AVAIL2

Peripheral Availability Register 2
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AVAIL2 AVAIL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AVAIL0 AVAIL1 AVAIL2 AVAIL3 AVAIL12 AVAIL15 AVAIL16 AVAIL17 AVAIL18 AVAIL19 AVAIL20 AVAIL21 AVAIL23 AVAIL28 AVAIL29

AVAIL0 : CCU80 kernel SFRs and CC80 Availability Flag
bits : 0 - -1 (0 bit)
access : read-only

Enumeration:

#0 : value1

CC80 and CCU80 kernel SFRs are not available.

#1 : value2

CC80 and CCU80 kernel SFRs are available.

End of enumeration elements list.

AVAIL1 : CCU80 CC81 Availability Flag
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU80 CC81 is not available.

#1 : value2

CCU80 CC81 is available.

End of enumeration elements list.

AVAIL2 : CCU80 CC82 Availability Flag
bits : 2 - 1 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU80 CC82 is not available.

#1 : value2

CCU80 CC82 is available.

End of enumeration elements list.

AVAIL3 : CCU80 CC83 Availability Flag
bits : 3 - 2 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU80 CC83 is not available.

#1 : value2

CCU80 CC83 is available.

End of enumeration elements list.

AVAIL12 : POSIF0 Availability Flag
bits : 12 - 11 (0 bit)
access : read-only

Enumeration:

#0 : value1

POSIF0 is not available.

#1 : value2

POSIF0 is available.

End of enumeration elements list.

AVAIL15 : BCCU0 Availability Flag
bits : 15 - 14 (0 bit)
access : read-only

Enumeration:

#0 : value1

BCCU0 is not available.

#1 : value2

BCCU0 is available.

End of enumeration elements list.

AVAIL16 : CCU81 kernel SFRs and CC80 Availability Flag
bits : 16 - 15 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU81 kernel SFRs and CC80 are not available.

#1 : value2

CCU81 kernel SFRs and CC80 are available.

End of enumeration elements list.

AVAIL17 : CCU81 CC81 Availability Flag
bits : 17 - 16 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU81 CC81 is not available.

#1 : value2

CCU81 CC81 is available.

End of enumeration elements list.

AVAIL18 : CCU81 CC82 Availability Flag
bits : 18 - 17 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU81 CC82 is not available.

#1 : value2

CCU81 CC82 is available.

End of enumeration elements list.

AVAIL19 : CCU81 CC83 Availability Flag
bits : 19 - 18 (0 bit)
access : read-only

Enumeration:

#0 : value1

CCU81 CC83 is not available.

#1 : value2

CCU81 CC83 is available.

End of enumeration elements list.

AVAIL20 : MultiCAN Node 0 and Global SFRs Availability Flag
bits : 20 - 19 (0 bit)
access : read-only

Enumeration:

#0 : value1

MultiCAN node 0 and Global SFRs are not available.

#1 : value2

MultiCAN node 0 and Global SFRs are available.

End of enumeration elements list.

AVAIL21 : MultiCAN Node 1 Availability Flag
bits : 21 - 20 (0 bit)
access : read-only

Enumeration:

#0 : value1

MultiCAN node 1 is not available.

#1 : value2

MultiCAN node 1 is available.

End of enumeration elements list.

AVAIL23 : MultiCAN Message Object SFRs Availability Flag
bits : 23 - 22 (0 bit)
access : read-only

Enumeration:

#0 : value1

MultiCAN message object SFRs are not available.

#1 : value2

MultiCAN message object SFRs are available.

End of enumeration elements list.

AVAIL28 : POSIF1 Availability Flag
bits : 28 - 27 (0 bit)
access : read-only

Enumeration:

#0 : value1

POSIF1 is not available.

#1 : value2

POSIF1 is available.

End of enumeration elements list.

AVAIL29 : LEDTS2 Availability Flag
bits : 29 - 28 (0 bit)
access : read-only

Enumeration:

#0 : value1

LEDTS2 is not available.

#1 : value2

LEDTS2 is available.

End of enumeration elements list.


PRIVDIS0

Peripheral Privilege Access Register 0
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRIVDIS0 PRIVDIS0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PDIS2 PDIS5 PDIS6 PDIS7 PDIS19 PDIS20 PDIS21 PDIS22 PDIS23 PDIS24 PDIS25 PDIS26

PDIS2 : Flash SFRs Privilege Disable Flag
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : value1

Flash SFRs are accessible.

#1 : value2

Flash SFRs are not accessible.

End of enumeration elements list.

PDIS5 : RAM Block 1 Privilege Disable Flag
bits : 5 - 4 (0 bit)
access : read-write

Enumeration:

#0 : value1

RAM Block 1 is accessible.

#1 : value2

RAM Block 1 is not accessible.

End of enumeration elements list.

PDIS6 : RAM Block 2 Privilege Disable Flag
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : value1

RAM Block 2 is accessible.

#1 : value2

RAM Block 2 is not accessible.

End of enumeration elements list.

PDIS7 : RAM Block 3 Privilege Disable Flag
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : value1

RAM Block 3 is accessible.

#1 : value2

RAM Block 3 is not accessible.

End of enumeration elements list.

PDIS19 : WDT Privilege Disable Flag
bits : 19 - 18 (0 bit)
access : read-write

Enumeration:

#0 : value1

WDT is accessible.

#1 : value2

WDT is not accessible.

End of enumeration elements list.

PDIS20 : MATH Global SFRs and Divider Privilege Disable Flag
bits : 20 - 19 (0 bit)
access : read-write

Enumeration:

#0 : value1

MATH Global SFRs and Divider are accessible.

#1 : value2

MATH Global SFRs and Divider are not accessible.

End of enumeration elements list.

PDIS21 : MATH CORDIC Privilege Disable Flag
bits : 21 - 20 (0 bit)
access : read-write

Enumeration:

#0 : value1

MATH CORDIC is accessible.

#1 : value2

MATH CORDIC is not accessible.

End of enumeration elements list.

PDIS22 : Port 0 Privilege Disable Flag
bits : 22 - 21 (0 bit)
access : read-write

Enumeration:

#0 : value1

Port 0 is accessible.

#1 : value2

Port 0 is not accessible.

End of enumeration elements list.

PDIS23 : Port 1 Privilege Disable Flag
bits : 23 - 22 (0 bit)
access : read-write

Enumeration:

#0 : value1

Port 1 is accessible.

#1 : value2

Port 1 is not accessible.

End of enumeration elements list.

PDIS24 : Port 2 Privilege Disable Flag
bits : 24 - 23 (0 bit)
access : read-write

Enumeration:

#0 : value1

Port 2 is accessible.

#1 : value2

Port 2 is not accessible.

End of enumeration elements list.

PDIS25 : Port 3 Privilege Disable Flag
bits : 25 - 24 (0 bit)
access : read-write

Enumeration:

#0 : value1

Port 3 is accessible.

#1 : value2

Port 3 is not accessible.

End of enumeration elements list.

PDIS26 : Port 4 Privilege Disable Flag
bits : 26 - 25 (0 bit)
access : read-write

Enumeration:

#0 : value1

Port 4 is accessible.

#1 : value2

Port 4 is not accessible.

End of enumeration elements list.


PRIVDIS1

Peripheral Privilege Access Register 1
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRIVDIS1 PRIVDIS1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PDIS0 PDIS1 PDIS5 PDIS6 PDIS7 PDIS8 PDIS9 PDIS10 PDIS11 PDIS12 PDIS16 PDIS17 PDIS25 PDIS26 PDIS27 PDIS28

PDIS0 : USIC0 Channel 0 Privilege Disable Flag
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : value1

USIC0 Channel 0 is accessible.

#1 : value2

USIC0 Channel 0 is not accessible.

End of enumeration elements list.

PDIS1 : USIC0 Channel 1 Privilege Disable Flag
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : value1

USIC0 Channel 1 is accessible.

#1 : value2

USIC0 Channel 1 is not accessible.

End of enumeration elements list.

PDIS5 : VADC0 Basic SFRs Privilege Disable Flag
bits : 5 - 4 (0 bit)
access : read-write

Enumeration:

#0 : value1

VADC0 Basic SFRs are accessible.

#1 : value2

VADC0 Basic SFRs are not accessible.

End of enumeration elements list.

PDIS6 : VADC0 Group 0 SFRs Privilege Disable Flag
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : value1

VADC0 Group 0 SFRs are accessible.

#1 : value2

VADC0 Group 0 SFRs are not accessible.

End of enumeration elements list.

PDIS7 : VADC0 Group 1 SFRs Privilege Disable Flag
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : value1

VADC0 Group 1 SFRs are accessible.

#1 : value2

VADC0 Group 1 SFRs are not accessible.

End of enumeration elements list.

PDIS8 : SHS0 Privilege Disable Flag
bits : 8 - 7 (0 bit)
access : read-write

Enumeration:

#0 : value1

SHS0 is accessible.

#1 : value2

SHS0 is not accessible.

End of enumeration elements list.

PDIS9 : CC40 and CCU40 Kernel SFRs Privilege Disable Flag
bits : 9 - 8 (0 bit)
access : read-write

Enumeration:

#0 : value1

CC40 and CCU40 Kernel SFRs are accessible.

#1 : value2

CC40 and CCU40 Kernel SFRs are not accessible.

End of enumeration elements list.

PDIS10 : CCU40 CC41 Privilege Disable Flag
bits : 10 - 9 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU40 CC41 is accessible.

#1 : value2

CCU40 CC41 is not accessible.

End of enumeration elements list.

PDIS11 : CCU40 CC42 Privilege Disable Flag
bits : 11 - 10 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU40 CC42 is accessible.

#1 : value2

CCU40 CC42 is not accessible.

End of enumeration elements list.

PDIS12 : CCU40 CC43 Privilege Disable Flag
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU40 CC43 is accessible.

#1 : value2

CCU40 CC43 is not accessible.

End of enumeration elements list.

PDIS16 : USIC1 Channel 0 Privilege Disable Flag
bits : 16 - 15 (0 bit)
access : read-write

Enumeration:

#0 : value1

USIC1 Channel 0 is accessible.

#1 : value2

USIC1 Channel 0 is not accessible.

End of enumeration elements list.

PDIS17 : USIC1 Channel 1 Privilege Disable Flag
bits : 17 - 16 (0 bit)
access : read-write

Enumeration:

#0 : value1

USIC1 Channel 1 is accessible.

#1 : value2

USIC1 Channel 1 is not accessible.

End of enumeration elements list.

PDIS25 : CCU41 Kernel SFRs and CC40 Privilege Disable Flag
bits : 25 - 24 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU41 Kernel SFRs and CC40 are accessible.

#1 : value2

CCU41 Kernel SFRs and CC40 are not accessible.

End of enumeration elements list.

PDIS26 : CCU41 CC41 Privilege Disable Flag
bits : 26 - 25 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU41 CC41 is accessible.

#1 : value2

CCU41 CC41 is not accessible.

End of enumeration elements list.

PDIS27 : CCU41 CC42 Privilege Disable Flag
bits : 27 - 26 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU41 CC42 is accessible.

#1 : value2

CCU41 CC42 is not accessible.

End of enumeration elements list.

PDIS28 : CCU41 CC43 Privilege Disable Flag
bits : 28 - 27 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU41 CC43 is accessible.

#1 : value2

CCU41 CC43 is not accessible.

End of enumeration elements list.


PRIVDIS2

Peripheral Privilege Access Register 2
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRIVDIS2 PRIVDIS2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PDIS0 PDIS1 PDIS2 PDIS3 PDIS12 PDIS13 PDIS14 PDIS15 PDIS16 PDIS17 PDIS18 PDIS19 PDIS20 PDIS21 PDIS23 PDIS28 PDIS29

PDIS0 : CC80 and CCU80 Kernel SFRs Privilege Disable Flag
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : value1

CC80 and CCU80 Kernel SFRs are accessible.

#1 : value2

CC80 and CCU80 Kernel SFRs are not accessible.

End of enumeration elements list.

PDIS1 : CCU80 CC81 Privilege Disable Flag
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU80 CC81 is accessible.

#1 : value2

CCU80 CC81 is not accessible.

End of enumeration elements list.

PDIS2 : CCU80 CC82 Privilege Disable Flag
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU80 CC82 is accessible.

#1 : value2

CCU80 CC82 is not accessible.

End of enumeration elements list.

PDIS3 : CCU80 CC83 Privilege Disable Flag
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU80 CC83 is accessible.

#1 : value2

CCU80 CC83 is not accessible.

End of enumeration elements list.

PDIS12 : POSIF0 Privilege Disable Flag
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

#0 : value1

POSIF0 is accessible.

#1 : value2

POSIF0 is not accessible.

End of enumeration elements list.

PDIS13 : LEDTS0 Privilege Disable Flag
bits : 13 - 12 (0 bit)
access : read-write

Enumeration:

#0 : value1

LEDTS0 is accessible.

#1 : value2

LEDTS0 is not accessible.

End of enumeration elements list.

PDIS14 : LEDTS1 Privilege Disable Flag
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : value1

LEDTS1 is accessible.

#1 : value2

LEDTS1 is not accessible.

End of enumeration elements list.

PDIS15 : BCCU0 Privilege Disable Flag
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : value1

BCCU0 is accessible.

#1 : value2

BCCU0 is not accessible.

End of enumeration elements list.

PDIS16 : CCU81 Kernel SFRs and CC80 Privilege Disable Flag
bits : 16 - 15 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU81 Kernel SFRs and CC80 are accessible.

#1 : value2

CCU81 Kernel SFRs and CC80 are not accessible.

End of enumeration elements list.

PDIS17 : CCU81 CC81 Privilege Disable Flag
bits : 17 - 16 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU81 CC81 is accessible.

#1 : value2

CCU81 CC81 is not accessible.

End of enumeration elements list.

PDIS18 : CCU81 CC82 Privilege Disable Flag
bits : 18 - 17 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU81 CC82 is accessible.

#1 : value2

CCU81 CC82 is not accessible.

End of enumeration elements list.

PDIS19 : CCU81 CC83 Privilege Disable Flag
bits : 19 - 18 (0 bit)
access : read-write

Enumeration:

#0 : value1

CCU81 CC83 is accessible.

#1 : value2

CCU81 CC83 is not accessible.

End of enumeration elements list.

PDIS20 : MultiCAN Node 0 and Global SFRs Privilege Disable Flag
bits : 20 - 19 (0 bit)
access : read-write

Enumeration:

#0 : value1

MultiCAN node 0 and global SFRs are accessible.

#1 : value2

MultiCAN node 0 and global SFRs are not accessible.

End of enumeration elements list.

PDIS21 : MultiCAN Node 1 Privilege Disable Flag
bits : 21 - 20 (0 bit)
access : read-write

Enumeration:

#0 : value1

MultiCAN node 1 is accessible.

#1 : value2

MultiCAN node 1 is not accessible.

End of enumeration elements list.

PDIS23 : MultiCAN Message Object SFRs Privilege Disable Flag
bits : 23 - 22 (0 bit)
access : read-write

Enumeration:

#0 : value1

MultiCAN message object SFRs are accessible.

#1 : value2

MultiCAN message object SFRs are not accessible.

End of enumeration elements list.

PDIS28 : POSIF1 Privilege Disable Flag
bits : 28 - 27 (0 bit)
access : read-write

Enumeration:

#0 : value1

POSIF1 is accessible.

#1 : value2

POSIF1 is not accessible.

End of enumeration elements list.

PDIS29 : LEDTS2 Privilege Disable Flag
bits : 29 - 28 (0 bit)
access : read-write

Enumeration:

#0 : value1

LEDTS2 is accessible.

#1 : value2

LEDTS2 is not accessible.

End of enumeration elements list.



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.