\n

SCU

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x100 byte (0x0)
mem_usage : registers
protection : not protected

Registers

PWRSTAT

EVRSTAT

EVRVADCSTAT

PWRMON

PWRSET

PWRCLR


PWRSTAT

PCU Status Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRSTAT PWRSTAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HIBEN USBPHYPDQ USBPUWQ

HIBEN : Hibernate Domain Enable Status
bits : 0 - -1 (0 bit)
access : read-only

Enumeration:

#0 : value1

Inactive

#1 : value2

Active

End of enumeration elements list.

USBPHYPDQ : USB PHY Transceiver State
bits : 16 - 15 (0 bit)
access : read-only

Enumeration:

#0 : value1

Power-down

#1 : value2

Active

End of enumeration elements list.

USBPUWQ : USB Weak Pull-Up at PADN State
bits : 18 - 17 (0 bit)
access : read-only

Enumeration:

#0 : value1

Pull-up active

#1 : value2

Pull-up not active

End of enumeration elements list.


EVRSTAT

EVR Status Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVRSTAT EVRSTAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OV13

OV13 : Regulator Overvoltage for 1.3 V
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : value1

No overvoltage condition

#1 : value2

Regulator is in overvoltage

End of enumeration elements list.


EVRVADCSTAT

EVR VADC Status Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVRVADCSTAT EVRVADCSTAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VADC13V VADC33V

VADC13V : VADC 1.3 V Conversion Result
bits : 0 - 6 (7 bit)
access : read-only

VADC33V : VADC 3.3 V Conversion Result
bits : 8 - 14 (7 bit)
access : read-only


PWRMON

Power Monitor Control
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRMON PWRMON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRS INTV ENB

THRS : Threshold
bits : 0 - 6 (7 bit)
access : read-write

INTV : Interval
bits : 8 - 14 (7 bit)
access : read-write

ENB : Enable
bits : 16 - 15 (0 bit)
access : read-write


PWRSET

PCU Set Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRSET PWRSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HIB USBPHYPDQ USBPUWQ

HIB : Set Hibernate Domain Enable
bits : 0 - -1 (0 bit)
access : write-only

Enumeration:

#0 : value1

No effect

#1 : value2

Enable Hibernate domain

End of enumeration elements list.

USBPHYPDQ : Set USB PHY Transceiver Disable
bits : 16 - 15 (0 bit)
access : write-only

Enumeration:

#0 : value1

No effect

#1 : value2

Active

End of enumeration elements list.

USBPUWQ : Set USB Weak Pull-Up at PADN Enable
bits : 18 - 17 (0 bit)
access : write-only

Enumeration:

#0 : value1

No effect

#1 : value2

Pull-up not active

End of enumeration elements list.


PWRCLR

PCU Clear Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCLR PWRCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HIB USBPHYPDQ USBPUWQ

HIB : Clear Disable Hibernate Domain
bits : 0 - -1 (0 bit)
access : write-only

Enumeration:

#0 : value1

No effect

#1 : value2

Disable Hibernate domain

End of enumeration elements list.

USBPHYPDQ : Clear USB PHY Transceiver Disable
bits : 16 - 15 (0 bit)
access : write-only

Enumeration:

#0 : value1

No effect

#1 : value2

Power-down

End of enumeration elements list.

USBPUWQ : Clear USB Weak Pull-Up at PADN Enable
bits : 18 - 17 (0 bit)
access : write-only

Enumeration:

#0 : value1

No effect

#1 : value2

Pull-up active

End of enumeration elements list.



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