\n
address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
Ethernet 0 Port Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXD0 : MAC Receive Input 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#00 : value1
Data input RXD0A is selected
#01 : value2
Data input RXD0B is selected
#10 : value3
Data input RXD0C is selected
#11 : value4
Data input RXD0D is selected
End of enumeration elements list.
RXD1 : MAC Receive Input 1
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#00 : value1
Data input RXD1A is selected
#01 : value2
Data input RXD1B is selected
#10 : value3
Data input RXD1C is selected
#11 : value4
Data input RXD1D is selected
End of enumeration elements list.
RXD2 : MAC Receive Input 2
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#00 : value1
Data input RXD2A is selected
#01 : value2
Data input RXD2B is selected
#10 : value3
Data input RXD2C is selected
#11 : value4
Data input RXD2D is selected
End of enumeration elements list.
RXD3 : MAC Receive Input 3
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#00 : value1
Data input RXD3A is selected
#01 : value2
Data input RXD3B is selected
#10 : value3
Data input RXD3C is selected
#11 : value4
Data input RXD3D is selected
End of enumeration elements list.
CLK_RMII : RMII clock input
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#00 : value1
Data input RMIIA is selected
#01 : value2
Data input RMIIB is selected
#10 : value3
Data input RMIIC is selected
#11 : value4
Data input RMIID is selected
End of enumeration elements list.
CRS_DV : CRS_DV input
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : value1
Data input CRS_DVA is selected
#01 : value2
Data input CRS_DVB is selected
#10 : value3
Data input CRS_DVC is selected
#11 : value4
Data input CRS_DVD is selected
End of enumeration elements list.
CRS : CRS input
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#00 : value1
Data input CRSA
#01 : value2
Data input CRSB
#10 : value3
Data input CRSC
#11 : value4
Data input CRSD
End of enumeration elements list.
RXER : RXER Input
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#00 : value1
Data input RXERA is selected
#01 : value2
Data input RXERB is selected
#10 : value3
Data input RXERC is selected
#11 : value4
Data input RXERD is selected
End of enumeration elements list.
COL : COL input
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#00 : value1
Data input COLA is selected
#01 : value2
Data input COLB is selected
#10 : value3
Data input COLC is selected
#11 : value4
Data input COLD is selected
End of enumeration elements list.
CLK_TX : CLK_TX input
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#00 : value1
Data input CLK_TXA is selected
#01 : value2
Data input CLK_TXB is selected
#10 : value3
Data input CLK_TXC is selected
#11 : value4
Data input CLK_TXD is selected
End of enumeration elements list.
MDIO : MDIO Input Select
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#00 : value1
Data input MDIA is selected
#01 : value2
Data input MDIB is selected
#10 : value3
Data input MDIC is selected
#11 : value4
Data input MDID is selected
End of enumeration elements list.
INFSEL : Ethernet MAC Interface Selection
bits : 26 - 25 (0 bit)
access : read-write
Enumeration:
#0 : value1
MII
#1 : value2
RMII
End of enumeration elements list.
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