Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x100 byte (0x0)
mem_usage : registers
protection : not protected
Clock Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DISR : Module Disable Request Bit
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
On request: enable the module clock
#1 : value2
Off request: stop the module clock
End of enumeration elements list.
DISS : Module Disable Status Bit
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : value1
Module clock is enabled
#1 : value2
Off: module is not clocked
End of enumeration elements list.
EDIS : Sleep Mode Enable Control
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : value1
Sleep mode request is enabled and functional
#1 : value2
Module disregards the sleep mode control signal
End of enumeration elements list.
OCDS Control and Status Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUS : OCDS Suspend Control
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Will not suspend
#0001 : value2
Hard suspend: Clock is switched off immediately.
#0010 : value3
Soft suspend channel 0
#0011 : value4
Soft suspend channel 1
#0101 : value5
Soft suspend channel 3
End of enumeration elements list.
SUS_P : SUS Write Protection
bits : 28 - 27 (0 bit)
access : write-only
SUSSTA : Suspend State
bits : 29 - 28 (0 bit)
access : read-only
Enumeration:
#0 : value1
Module is not (yet) suspended
#1 : value2
Module is suspended
End of enumeration elements list.
Module Identification Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MOD_REV : Module Revision
bits : 0 - 6 (7 bit)
access : read-only
MOD_TYPE : Module Type
bits : 8 - 14 (7 bit)
access : read-only
MOD_NUMBER : Module Number
bits : 16 - 30 (15 bit)
access : read-only
Global Configuration Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCSEL : Modulator Clock Select
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
#000 : value1
Internal clock off, no source selected
#001 : value2
fDSD
End of enumeration elements list.
Global Run Control Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0RUN : Channel 0 Run Control
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
Stop channel x
#1 : value2
Demodulator channel x is enabled and runs
End of enumeration elements list.
CH1RUN : Channel 1 Run Control
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : value1
Stop channel x
#1 : value2
Demodulator channel x is enabled and runs
End of enumeration elements list.
CH2RUN : Channel 2 Run Control
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : value1
Stop channel x
#1 : value2
Demodulator channel x is enabled and runs
End of enumeration elements list.
CH3RUN : Channel 3 Run Control
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : value1
Stop channel x
#1 : value2
Demodulator channel x is enabled and runs
End of enumeration elements list.
Carrier Generator Configuration Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CGMOD : Carrier Generator Operating Mode
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#00 : value1
Stopped
#01 : value2
Square wave
#10 : value3
Triangle
#11 : value4
Sine wave
End of enumeration elements list.
BREV : Bit-Reverse PWM Generation
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : value1
Normal mode
#1 : value2
Bit-reverse mode
End of enumeration elements list.
SIGPOL : Signal Polarity
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : value1
Normal: carrier signal begins with +1
#1 : value2
Inverted: carrier signal begins with -1
End of enumeration elements list.
DIVCG : Divider Factor for the PWM Pattern Signal Generator
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
0x0 : value1
fCG = fCLK / 2
0x1 : value2
fCG = fCLK / 4
0x2 : value3
fCG = fCLK / 6
0xF : value4
fCG = fCLK / 32
End of enumeration elements list.
RUN : Run Indicator
bits : 15 - 14 (0 bit)
access : read-only
Enumeration:
#0 : value1
Stopped (cleared at the end of a period)
#1 : value2
Running
End of enumeration elements list.
BITCOUNT : Bit Counter
bits : 16 - 19 (4 bit)
access : read-only
STEPCOUNT : Step Counter
bits : 24 - 26 (3 bit)
access : read-only
STEPS : Step Counter Sign
bits : 28 - 27 (0 bit)
access : read-only
Enumeration:
#0 : value1
Step counter value is positive
#1 : value2
Step counter value is negative
End of enumeration elements list.
STEPD : Step Counter Direction
bits : 29 - 28 (0 bit)
access : read-only
Enumeration:
#0 : value1
Step counter is counting up
#1 : value2
Step counter is counting down
End of enumeration elements list.
SGNCG : Sign Signal from Carrier Generator
bits : 30 - 29 (0 bit)
access : read-only
Enumeration:
#0 : value1
Positive values
#1 : value2
Negative values
End of enumeration elements list.
Event Flag Register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESEV0 : Result Event
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
No result event
#1 : value2
A new result has been stored in register RESMx
End of enumeration elements list.
RESEV1 : Result Event
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : value1
No result event
#1 : value2
A new result has been stored in register RESMx
End of enumeration elements list.
RESEV2 : Result Event
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : value1
No result event
#1 : value2
A new result has been stored in register RESMx
End of enumeration elements list.
RESEV3 : Result Event
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : value1
No result event
#1 : value2
A new result has been stored in register RESMx
End of enumeration elements list.
ALEV0 : Alarm Event
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : value1
No alarm event
#1 : value2
An alarm event has occurred
End of enumeration elements list.
ALEV1 : Alarm Event
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
#0 : value1
No alarm event
#1 : value2
An alarm event has occurred
End of enumeration elements list.
ALEV2 : Alarm Event
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
#0 : value1
No alarm event
#1 : value2
An alarm event has occurred
End of enumeration elements list.
ALEV3 : Alarm Event
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
#0 : value1
No alarm event
#1 : value2
An alarm event has occurred
End of enumeration elements list.
ALEV4 : Alarm Event
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
#0 : value1
No alarm event
#1 : value2
An alarm event has occurred
End of enumeration elements list.
ALEV5 : Alarm Event
bits : 21 - 20 (0 bit)
access : read-write
Enumeration:
#0 : value1
No alarm event
#1 : value2
An alarm event has occurred
End of enumeration elements list.
ALEV6 : Alarm Event
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
#0 : value1
No alarm event
#1 : value2
An alarm event has occurred
End of enumeration elements list.
ALEV7 : Alarm Event
bits : 23 - 22 (0 bit)
access : read-write
Enumeration:
#0 : value1
No alarm event
#1 : value2
An alarm event has occurred
End of enumeration elements list.
ALEV8 : Alarm Event
bits : 24 - 23 (0 bit)
access : read-write
Enumeration:
#0 : value1
No alarm event
#1 : value2
An alarm event has occurred
End of enumeration elements list.
ALEV9 : Alarm Event
bits : 25 - 24 (0 bit)
access : read-write
Enumeration:
#0 : value1
No alarm event
#1 : value2
An alarm event has occurred
End of enumeration elements list.
Event Flag Clear Register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESEC0 : Result Event Clear
bits : 0 - -1 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Clear bit RESEVx
End of enumeration elements list.
RESEC1 : Result Event Clear
bits : 1 - 0 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Clear bit RESEVx
End of enumeration elements list.
RESEC2 : Result Event Clear
bits : 2 - 1 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Clear bit RESEVx
End of enumeration elements list.
RESEC3 : Result Event Clear
bits : 3 - 2 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Clear bit RESEVx
End of enumeration elements list.
ALEC0 : Alarm Event Clear
bits : 16 - 15 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Clear bit ALEVx
End of enumeration elements list.
ALEC1 : Alarm Event Clear
bits : 17 - 16 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Clear bit ALEVx
End of enumeration elements list.
ALEC2 : Alarm Event Clear
bits : 18 - 17 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Clear bit ALEVx
End of enumeration elements list.
ALEC3 : Alarm Event Clear
bits : 19 - 18 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Clear bit ALEVx
End of enumeration elements list.
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