\n

PREF

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

Registers

PCON


PCON

Prefetch Configuration Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCON PCON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBYP IINV DBYP

IBYP : Instruction Prefetch Buffer Bypass
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : value1

Instruction prefetch buffer not bypassed.

#1 : value2

Instruction prefetch buffer bypassed.

End of enumeration elements list.

IINV : Instruction Prefetch Buffer Invalidate
bits : 1 - 0 (0 bit)
access : write-only

Enumeration:

#0 : value1

No effect.

#1 : value2

Initiate invalidation of entire instruction cache.

End of enumeration elements list.

DBYP : Data Buffer Bypass
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : value1

Prefetch Data buffer not bypassed.

#1 : value2

Prefetch Data buffer bypassed.

End of enumeration elements list.



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.