Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x38 byte (0x0)
mem_usage : registers
protection : not protected
PLL Status Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VCOBYST : VCO Bypass Status
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
#0 : value1
Free-running / Normal Mode is entered
#1 : value2
Prescaler Mode is entered
End of enumeration elements list.
PWDSTAT : PLL Power-saving Mode Status
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : value1
PLL Power-saving Mode was not entered
#1 : value2
PLL Power-saving Mode was entered
End of enumeration elements list.
VCOLOCK : PLL LOCK Status
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
#0 : value1
PLL not locked
#1 : value2
PLL locked
End of enumeration elements list.
K1RDY : K1 Divider Ready Status
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
#0 : value1
K1-Divider does not operate with the new value
#1 : value2
K1-Divider operate with the new value
End of enumeration elements list.
K2RDY : K2 Divider Ready Status
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
#0 : value1
K2-Divider does not operate with the new value
#1 : value2
K2-Divider operate with the new value
End of enumeration elements list.
BY : Bypass Mode Status
bits : 6 - 5 (0 bit)
access : read-only
Enumeration:
#0 : value1
Bypass Mode is not entered
#1 : value2
Bypass Mode is entered. Input fOSC is selected as output fPLL.
End of enumeration elements list.
PLLLV : Oscillator for PLL Valid Low Status Bit
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
#0 : value1
The OSC frequency is not usable. Frequency fREF is too low.
#1 : value2
The OSC frequency is usable
End of enumeration elements list.
PLLHV : Oscillator for PLL Valid High Status Bit
bits : 8 - 7 (0 bit)
access : read-only
Enumeration:
#0 : value1
The OSC frequency is not usable. Frequency fOSC is too high.
#1 : value2
The OSC frequency is usable
End of enumeration elements list.
PLLSP : Oscillator for PLL Valid Spike Status Bit
bits : 9 - 8 (0 bit)
access : read-only
Enumeration:
#0 : value1
The OSC frequency is not usable. Spikes are detected that disturb a locked operation
#1 : value2
The OSC frequency is usable
End of enumeration elements list.
USB PLL Status Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VCOBYST : VCO Bypass Status
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
#0 : value1
Normal Mode is entered
#1 : value2
Prescaler Mode is entered
End of enumeration elements list.
PWDSTAT : PLL Power-saving Mode Status
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : value1
PLL Power-saving Mode was not entered
#1 : value2
PLL Power-saving Mode was entered
End of enumeration elements list.
VCOLOCK : PLL VCO Lock Status
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
#0 : value1
The frequency difference of fREF and fDIV is greater than allowed. The VCO part of the PLL can not lock on a target frequency.
#1 : value2
The frequency difference of fREF and fDIV is small enough to enable a stable VCO operation
End of enumeration elements list.
BY : Bypass Mode Status
bits : 6 - 5 (0 bit)
access : read-only
Enumeration:
#0 : value1
Bypass Mode is not entered
#1 : value2
Bypass Mode is entered. Input fOSC is selected as output fPLL.
End of enumeration elements list.
VCOLOCKED : PLL LOCK Status
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
#0 : value1
PLL not locked
#1 : value2
PLL locked
End of enumeration elements list.
USB PLL Configuration Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VCOBYP : VCO Bypass
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
Normal operation, VCO is not bypassed
#1 : value2
Prescaler Mode, VCO is bypassed
End of enumeration elements list.
VCOPWD : VCO Power Saving Mode
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : value1
Normal behavior
#1 : value2
The VCO is put into a Power Saving Mode
End of enumeration elements list.
VCOTR : VCO Trim Control
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : value1
VCO bandwidth is operating in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz.
#1 : value2
VCO bandwidth is operating in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz.
End of enumeration elements list.
FINDIS : Disconnect Oscillator from VCO
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : value1
Connect oscillator to the VCO part
#1 : value2
Disconnect oscillator from the VCO part.
End of enumeration elements list.
OSCDISCDIS : Oscillator Disconnect Disable
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : value1
In case of a PLL loss-of-lock bit FINDIS is set
#1 : value2
In case of a PLL loss-of-lock bit FINDIS is cleared
End of enumeration elements list.
NDIV : N-Divider Value
bits : 8 - 13 (6 bit)
access : read-write
PLLPWD : PLL Power Saving Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : value1
Normal behavior
#1 : value2
The complete PLL block is put into a Power Saving Mode. Only the Bypass Mode is active if previously selected.
End of enumeration elements list.
RESLD : Restart VCO Lock Detection
bits : 18 - 17 (0 bit)
access : write-only
PDIV : P-Divider Value
bits : 24 - 26 (3 bit)
access : read-write
Clock Multiplexing Status Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYSCLKMUX : Status of System Clock Multiplexing Upon Source Switching
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
#01 : value1
fOFI clock active
#10 : value2
fPLL clock active
End of enumeration elements list.
PLL Configuration 0 Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VCOBYP : VCO Bypass
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
Normal operation, VCO is not bypassed
#1 : value2
Prescaler Mode, VCO is bypassed
End of enumeration elements list.
VCOPWD : VCO Power Saving Mode
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : value1
Normal behavior
#1 : value2
The VCO is put into a Power Saving Mode and can no longer be used. Only the Bypass and Prescaler Mode are active if previously selected.
End of enumeration elements list.
VCOTR : VCO Trim Control
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : value1
VCO bandwidth is operation in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz.
#1 : value2
VCO bandwidth is operation in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz.
End of enumeration elements list.
FINDIS : Disconnect Oscillator from VCO
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : value1
connect oscillator to the VCO part
#1 : value2
disconnect oscillator from the VCO part.
End of enumeration elements list.
OSCDISCDIS : Oscillator Disconnect Disable
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : value1
In case of a PLL loss-of-lock bit FINDIS is set
#1 : value2
In case of a PLL loss-of-lock bit FINDIS is cleared
End of enumeration elements list.
PLLPWD : PLL Power Saving Mode
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : value1
Normal behavior
#1 : value2
The complete PLL block is put into a Power Saving Mode and can no longer be used. Only the Bypass Mode is active if previously selected.
End of enumeration elements list.
OSCRES : Oscillator Watchdog Reset
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
#0 : value1
The Oscillator Watchdog of the PLL is not cleared and remains active
#1 : value2
The Oscillator Watchdog of the PLL is cleared and restarted
End of enumeration elements list.
RESLD : Restart VCO Lock Detection
bits : 18 - 17 (0 bit)
access : write-only
AOTREN : Automatic Oscillator Calibration Enable
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
#0 : value1
Disable
#1 : value2
Enable
End of enumeration elements list.
FOTR : Factory Oscillator Calibration
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
#0 : value1
No effect
#1 : value2
Force fixed-value trimming
End of enumeration elements list.
PLL Configuration 1 Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
K1DIV : K1-Divider Value
bits : 0 - 5 (6 bit)
access : read-write
NDIV : N-Divider Value
bits : 8 - 13 (6 bit)
access : read-write
K2DIV : K2-Divider Value
bits : 16 - 21 (6 bit)
access : read-write
PDIV : P-Divider Value
bits : 24 - 26 (3 bit)
access : read-write
PLL Configuration 2 Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PINSEL : P-Divider Input Selection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
PLL external oscillator selected
#1 : value2
Backup clock fofi selected
End of enumeration elements list.
K1INSEL : K1-Divider Input Selection
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : value1
PLL external oscillator selected
#1 : value2
Backup clock fofi selected
End of enumeration elements list.
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