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USB

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

DIEPCTL0

DIEPTSIZ0

DIEPDMA0

DTXFSTS0

DIEPDMAB0

DOEPCTL0

DOEPINT0

DOEPTSIZ0

DOEPDMA0

DOEPDMAB0

DIEPINT0


DIEPCTL0

Device Control IN Endpoint Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPCTL0 DIEPCTL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPS USBActEP NAKSts EPType Stall TxFNum CNAK SNAK EPDis EPEna

MPS : Maximum Packet Size
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#00 : value1

64 bytes

#01 : value2

32 bytes

#10 : value3

16 bytes

#11 : value4

8 bytes

End of enumeration elements list.

USBActEP : USB Active Endpoint
bits : 15 - 14 (0 bit)
access : read-only

NAKSts : NAK Status
bits : 17 - 16 (0 bit)
access : read-only

Enumeration:

#0 : value1

The core is transmitting non-NAK handshakes based on the FIFO status

#1 : value2

The core is transmitting NAK handshakes on this endpoint.

End of enumeration elements list.

EPType : Endpoint Type
bits : 18 - 18 (1 bit)
access : read-only

Stall : STALL Handshake
bits : 21 - 20 (0 bit)
access : read-write

TxFNum : TxFIFO Number
bits : 22 - 24 (3 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 25 (0 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 26 (0 bit)
access : write-only

EPDis : Endpoint Disable
bits : 30 - 29 (0 bit)
access : read-write

EPEna : Endpoint Enable
bits : 31 - 30 (0 bit)
access : read-write


DIEPTSIZ0

Device IN Endpoint Transfer Size Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPTSIZ0 DIEPTSIZ0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XferSize PktCnt

XferSize : Transfer Size
bits : 0 - 5 (6 bit)
access : read-write

PktCnt : Packet Count
bits : 19 - 19 (1 bit)
access : read-write


DIEPDMA0

Device Endpoint DMA Address Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPDMA0 DIEPDMA0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAAddr

DMAAddr : DMA Address
bits : 0 - 30 (31 bit)
access : read-write


DTXFSTS0

Device IN Endpoint Transmit FIFO Status Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DTXFSTS0 DTXFSTS0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INEPTxFSpcAvail

INEPTxFSpcAvail : IN Endpoint TxFIFO Space Avail
bits : 0 - 14 (15 bit)
access : read-only

Enumeration:

0x0 : value1

Endpoint TxFIFO is full

0x1 : value2

1 word available

0x2 : value3

2 words available

End of enumeration elements list.


DIEPDMAB0

Device Endpoint DMA Buffer Address Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPDMAB0 DIEPDMAB0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMABufferAddr

DMABufferAddr : DMA Buffer Address
bits : 0 - 30 (31 bit)
access : read-only


DOEPCTL0

Device Control OUT Endpoint Control Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEPCTL0 DOEPCTL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPS USBActEP NAKSts EPType Snp Stall CNAK SNAK EPDis EPEna

MPS : Maximum Packet Size
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

#00 : value1

64 bytes

#01 : value2

32 bytes

#10 : value3

16 bytes

#11 : value4

8 bytes

End of enumeration elements list.

USBActEP : USB Active Endpoint
bits : 15 - 14 (0 bit)
access : read-only

NAKSts : NAK Status
bits : 17 - 16 (0 bit)
access : read-only

Enumeration:

#0 : value1

The core is transmitting non-NAK handshakes based on the FIFO status.

#1 : value2

The core is transmitting NAK handshakes on this endpoint.

End of enumeration elements list.

EPType : Endpoint Type
bits : 18 - 18 (1 bit)
access : read-only

Snp : Snoop Mode
bits : 20 - 19 (0 bit)
access : read-write

Stall : STALL Handshake
bits : 21 - 20 (0 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 25 (0 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 26 (0 bit)
access : write-only

EPDis : Endpoint Disable
bits : 30 - 29 (0 bit)
access : read-only

EPEna : Endpoint Enable
bits : 31 - 30 (0 bit)
access : read-write


DOEPINT0

Device Endpoint Interrupt Register
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEPINT0 DOEPINT0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XferCompl EPDisbld AHBErr SetUp OUTTknEPdis StsPhseRcvd Back2BackSETup BNAIntr PktDrpSts BbleErrIntrpt NAKIntrpt NYETIntrpt

XferCompl : Transfer Completed Interrupt
bits : 0 - -1 (0 bit)
access : read-write

EPDisbld : Endpoint Disabled Interrupt
bits : 1 - 0 (0 bit)
access : read-write

AHBErr : AHB Error
bits : 2 - 1 (0 bit)
access : read-write

SetUp : SETUP Phase Done
bits : 3 - 2 (0 bit)
access : read-write

OUTTknEPdis : OUT Token Received When Endpoint Disabled
bits : 4 - 3 (0 bit)
access : read-write

StsPhseRcvd : Status Phase Received For Control Write
bits : 5 - 4 (0 bit)
access : read-write

Back2BackSETup : Back-to-Back SETUP Packets Received
bits : 6 - 5 (0 bit)
access : read-write

BNAIntr : BNA (Buffer Not Available) Interrupt
bits : 9 - 8 (0 bit)
access : read-write

PktDrpSts : Packet Dropped Status
bits : 11 - 10 (0 bit)
access : read-write

BbleErrIntrpt : BbleErr (Babble Error) interrupt
bits : 12 - 11 (0 bit)
access : read-write

NAKIntrpt : NAK interrupt
bits : 13 - 12 (0 bit)
access : read-write

NYETIntrpt : NYET interrupt
bits : 14 - 13 (0 bit)
access : read-write


DOEPTSIZ0

Device OUT Endpoint Transfer Size Register
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEPTSIZ0 DOEPTSIZ0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XferSize PktCnt SUPCnt

XferSize : Transfer Size
bits : 0 - 5 (6 bit)
access : read-write

PktCnt : Packet Count
bits : 19 - 19 (1 bit)
access : read-write

SUPCnt : SETUP Packet Count
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

#01 : value1

1 packet

#10 : value2

2 packets

#11 : value3

3 packets

End of enumeration elements list.


DOEPDMA0

Device Endpoint DMA Address Register
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEPDMA0 DOEPDMA0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAAddr

DMAAddr : DMA Address
bits : 0 - 30 (31 bit)
access : read-write


DOEPDMAB0

Device Endpoint DMA Buffer Address Register
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEPDMAB0 DOEPDMAB0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMABufferAddr

DMABufferAddr : DMA Buffer Address
bits : 0 - 30 (31 bit)
access : read-only


DIEPINT0

Device Endpoint Interrupt Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPINT0 DIEPINT0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XferCompl EPDisbld AHBErr TimeOUT INTknTXFEmp INEPNakEff TxFEmp BNAIntr

XferCompl : Transfer Completed Interrupt
bits : 0 - -1 (0 bit)
access : read-write

EPDisbld : Endpoint Disabled Interrupt
bits : 1 - 0 (0 bit)
access : read-write

AHBErr : AHB Error
bits : 2 - 1 (0 bit)
access : read-write

TimeOUT : Timeout Condition
bits : 3 - 2 (0 bit)
access : read-write

INTknTXFEmp : IN Token Received When TxFIFO is Empty
bits : 4 - 3 (0 bit)
access : read-write

INEPNakEff : IN Endpoint NAK Effective
bits : 6 - 5 (0 bit)
access : read-write

TxFEmp : Transmit FIFO Empty
bits : 7 - 6 (0 bit)
access : read-only

BNAIntr : BNA (Buffer Not Available) Interrupt
bits : 9 - 8 (0 bit)
access : read-write



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