\n
address_offset : 0x0 Bytes (0x0)
size : 0x50 byte (0x0)
mem_usage : registers
protection : not protected
H-Bridge Driver Control 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LS1_EN : Low Side Driver 1 Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
Driver circuit power off
0b1 : ENABLE
Driver circuit power on
End of enumeration elements list.
LS1_PWM : Low Side Driver 1 PWM Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
disables control by PWM input
0b1 : ENABLE
enables control by PWM input
End of enumeration elements list.
LS1_ON : Low Side Driver 1 On
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : OFF
Driver off
0b1 : ON
Driver on
End of enumeration elements list.
LS1_DCS_EN : Low Side Driver 1 Diagnosis Current Source Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0x0 : DISABLE
disable current source
0x1 : ENABLE
enable current source short diagnosis can be performed by evaluating the LSx/HSx_SD_STS Flag
End of enumeration elements list.
LS1_DS_STS : Low Side Driver 1 Drain Source Monitoring Status in OFF-State
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : no_short_on_external_FET
no short detected.
0b1 : short_on_external_FET_detected
short detected write clear status.
End of enumeration elements list.
LS1_SUPERR_STS : Low Side Driver 1 Supply Error Status
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
0b0 : NORMAL
supply is in required range.
0b1 : SUPPLY_ERROR
detected this flag is an OR of the VDS_x_STS and VCP_x_STS flags.
End of enumeration elements list.
LS1_OC_STS : External Low Side 1 FET Over-current Status
bits : 6 - 5 (0 bit)
access : read-only
Enumeration:
0b0 : no_Overcurrent
no over-current Condition occurred.
0b1 : Overcurrent
over-current occurred switch is automatically shutdown write clear status.
End of enumeration elements list.
LS1_OC_DIS : Low Side Driver 1 Overcurrent Shutdown Disable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0x0 : ENABLE
enable overcurrent shutdown of driver
0x1 : DISABLE
disable overcurrent shutdown of driver
End of enumeration elements list.
LS2_EN : Low Side Driver 2 Enable
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
Driver circuit power off
0b1 : ENABLE
Driver circuit power on
End of enumeration elements list.
LS2_PWM : Low Side Driver 2 PWM Enable
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
disables control by PWM input
0b1 : ENABLE
enables control by PWM input
End of enumeration elements list.
LS2_ON : Low Side Driver 2 On
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b0 : OFF
Driver off
0b1 : ON
Driver on
End of enumeration elements list.
LS2_DCS_EN : Low Side Driver 2 Diagnosis Current Source Enable
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0x0 : DISABLE
disable current source
0x1 : ENABLE
enable current source short diagnosis can be performed by evaluating the LSx/HSx_SD_STS Flag
End of enumeration elements list.
LS2_DS_STS : Low Side Driver 2 Drain Source Monitoring Status in OFF-State
bits : 12 - 11 (0 bit)
access : read-only
Enumeration:
0b0 : no_short_on_external_FET
no short detected.
0b1 : short_on_external_FET_detected
short detected write clear status.
End of enumeration elements list.
LS2_SUPERR_STS : Low Side Driver 2 Supply Error Status
bits : 13 - 12 (0 bit)
access : read-only
Enumeration:
0b0 : NORMAL
supply is in required range.
0b1 : SUPPLY_ERROR
detected this flag is an OR of the VDS_x_STS and VCP_x_STS flags.
End of enumeration elements list.
LS2_OC_STS : External Low Side 2 FET Over-current Status
bits : 14 - 13 (0 bit)
access : read-only
Enumeration:
0b0 : no_Overcurrent
no over-current Condition occurred.
0b1 : Overcurrent
over-current occurred switch is automatically shutdown write clear status.
End of enumeration elements list.
LS2_OC_DIS : Low Side Driver Overcurrent Shutdown Disable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
0x0 : ENABLE
enable overcurrent shutdown of driver
0x1 : DISABLE
disable overcurrent shutdown of driver
End of enumeration elements list.
HS1_EN : High Side Driver 1 Enable
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
Driver circuit power off
0b1 : ENABLE
Driver circuit power on
End of enumeration elements list.
HS1_PWM : High Side Driver 1 PWM Enable
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
disables control by PWM input
0b1 : ENABLE
enables control by PWM input
End of enumeration elements list.
HS1_ON : High Side Driver 1 On
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b0 : OFF
Driver off
0b1 : ON
Driver on
End of enumeration elements list.
HS1_DCS_EN : High Side Driver 1 Diagnosis Current Source Enable
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
0x0 : DISABLE
disable current source
0x1 : ENABLE
enable current source short diagnosis can be performed by evaluating the LSx/HSx_SD_STS Flag
End of enumeration elements list.
HS1_DS_STS : High Side Driver 1 Drain Source Monitoring Status in OFF-State
bits : 20 - 19 (0 bit)
access : read-only
Enumeration:
0b0 : no_short_on_external_FET
no short detected.
0b1 : short_on_external_FET_detected
short detected write clear status.
End of enumeration elements list.
HS1_SUPERR_STS : High Side Driver 1 Supply Error Status
bits : 21 - 20 (0 bit)
access : read-only
Enumeration:
0b0 : NORMAL
supply is in required range.
0b1 : SUPPLY_ERROR
detected this flag is an OR of the VDS_x_STS and VCP_x_STS flags.
End of enumeration elements list.
HS1_OC_STS : External High Side 1 FET Over-current Status
bits : 22 - 21 (0 bit)
access : read-only
Enumeration:
0b0 : no_Overcurrent
no over-current Condition occurred.
0b1 : Overcurrent
over-current occurred switch is automatically shutdown write clear status.
End of enumeration elements list.
HS1_OC_DIS : High Side Driver Overcurrent Shutdown Disable
bits : 23 - 22 (0 bit)
access : read-write
Enumeration:
0x0 : ENABLE
enable overcurrent shutdown of driver
0x1 : DISABLE
disable overcurrent shutdown of driver
End of enumeration elements list.
HS2_EN : High Side Driver 2 Enable
bits : 24 - 23 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
Driver circuit power off
0b1 : ENABLE
Driver circuit power on
End of enumeration elements list.
HS2_PWM : High Side Driver 2 PWM Enable
bits : 25 - 24 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
disables control by PWM input
0b1 : ENABLE
enables control by PWM input
End of enumeration elements list.
HS2_ON : High Side Driver 2 On
bits : 26 - 25 (0 bit)
access : read-write
Enumeration:
0b0 : OFF
Driver off
0b1 : ON
Driver on
End of enumeration elements list.
HS2_DCS_EN : High Side Driver 2 Diagnosis Current Source Enable
bits : 27 - 26 (0 bit)
access : read-write
Enumeration:
0x0 : DISABLE
disable current source
0x1 : ENABLE
enable current source short diagnosis can be performed by evaluating the LSx/HSx_DS_STS Flag
End of enumeration elements list.
HS2_DS_STS : High Side Driver 2 Drain Source Monitoring Status in OFF-State
bits : 28 - 27 (0 bit)
access : read-only
Enumeration:
0b0 : no_short_on_external_FET
no short detected.
0b1 : short_on_external_FET_detected
short detected write clear status.
End of enumeration elements list.
HS2_SUPERR_STS : High Side Driver 2 Supply Error Status
bits : 29 - 28 (0 bit)
access : read-only
Enumeration:
0b0 : NORMAL
supply is in required range.
0b1 : SUPPLY_ERROR
detected this flag is an OR of the VDS_x_STS and VCP_x_STS flags.
End of enumeration elements list.
HS2_OC_STS : External High Side 2 FET Over-current Status
bits : 30 - 29 (0 bit)
access : read-only
Enumeration:
0b0 : no_Overcurrent
no over-current Condition occurred.
0b1 : Overcurrent
over-current occurred switch is automatically shutdown write clear status.
End of enumeration elements list.
HS2_OC_DIS : High Side Driver Overcurrent Shutdown Disable
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
0x0 : ENABLE
enable overcurrent shutdown of driver
0x1 : DISABLE
disable overcurrent shutdown of driver
End of enumeration elements list.
Turn on Slewrate Sequencer Control
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DRV_OFF_t_4 : Slew rate sequencer off phase 4 time
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0x0 : 50ns
50ns phase duration
0x7 : 400ns
400ns phase duration
End of enumeration elements list.
DRV_OFF_I_4 : Slew rate sequencer off phase 4 current
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0x0 : Disabled
Slew Rate Control is disabled
0x1f : Maximum
maximum output discharge current
End of enumeration elements list.
DRV_OFF_t_3 : Slew rate sequencer off phase 3 time
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0x0 : 50ns
50ns phase duration
0x7 : 400ns
400ns phase duration
End of enumeration elements list.
DRV_OFF_I_3 : Slew rate sequencer off phase 3 current
bits : 11 - 14 (4 bit)
access : read-write
Enumeration:
0x0 : Disabled
Slew Rate Control is disabled
0x1f : Maximum
maximum output discharge current
End of enumeration elements list.
DRV_OFF_t_2 : Slew rate sequencer off phase 2 time
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0x0 : 50ns
50ns phase duration
0x7 : 400ns
400ns phase duration
End of enumeration elements list.
DRV_OFF_I_2 : Slew rate sequencer off phase 2 current
bits : 19 - 22 (4 bit)
access : read-write
Enumeration:
0x0 : Disabled
Slew Rate Control is disabled
0x1f : Maximum
maximum output discharge current
End of enumeration elements list.
DRV_OFF_t_1 : Slew rate sequencer off phase 1 time
bits : 24 - 25 (2 bit)
access : read-write
Enumeration:
0x0 : 50ns
50ns phase duration
0x7 : 400ns
400ns phase duration
End of enumeration elements list.
DRV_OFF_I_1 : Slew rate sequencer off phase 1 current
bits : 27 - 30 (4 bit)
access : read-write
Enumeration:
0x0 : Disabled
Slew Rate Control is disabled
0x1f : Maximum
maximum output discharge current
End of enumeration elements list.
Turn off Slewrate Sequencer Control
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DRV_ON_t_4 : Slew rate sequencer on phase 4 time
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0x0 : 50ns
50ns phase duration
0x7 : 400ns
400ns phase duration
End of enumeration elements list.
DRV_ON_I_4 : Slew rate sequencer on phase 4 current
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0x0 : Disabled
Slew Rate Control is disabled
0x1f : Maximum
maximum output discharge current
End of enumeration elements list.
DRV_ON_t_3 : Slew rate sequencer on phase 3 time
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0x0 : 50ns
50ns phase duration
0x7 : 400ns
400ns phase duration
End of enumeration elements list.
DRV_ON_I_3 : Slew rate sequencer on phase 3 current
bits : 11 - 14 (4 bit)
access : read-write
Enumeration:
0x0 : Disabled
Slew Rate Control is disabled
0x1f : Maximum
maximum output discharge current
End of enumeration elements list.
DRV_ON_t_2 : Slew rate sequencer on phase 2 time
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0x0 : 50ns
50ns phase duration
0x7 : 400ns
400ns phase duration
End of enumeration elements list.
DRV_ON_I_2 : Slew rate sequencer on phase 2 current
bits : 19 - 22 (4 bit)
access : read-write
Enumeration:
0x0 : Disabled
Slew Rate Control is disabled
0x1f : Maximum
maximum output discharge current
End of enumeration elements list.
DRV_ON_t_1 : Slew rate sequencer on phase 1 time
bits : 24 - 25 (2 bit)
access : read-write
Enumeration:
0x0 : 50ns
50ns phase duration
0x7 : 400ns
400ns phase duration
End of enumeration elements list.
DRV_ON_I_1 : Slew rate sequencer on phase 1 current
bits : 27 - 30 (4 bit)
access : read-write
Enumeration:
0x0 : Disabled
Slew Rate Control is disabled
0x1f : Maximum
maximum output discharge current
End of enumeration elements list.
Trimming of Driver
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LS_HS_BT_TFILT_SEL : Blanking Time for Drain-Source Monitoring of Low / High Side Drivers
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0b00 : 1_us
1 us filter time
0b01 : 2_us
2 us filter time
0b10 : 4_us
4 us filter time
0b11 : 8_us
8 us filter time
End of enumeration elements list.
DRV_CCPTIMMUL : Multiplier bits for cross conduction time settings in register DRV_CCP_TIMSEL
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0b00 : MUL1
DRV_CCP_TIMSEL value is multiplied by 1
0b01 : MUL2
DRV_CCP_TIMSEL value is multiplied by 2
0b10 : MUL4
DRV_CCP_TIMSEL value is multiplied by 4
End of enumeration elements list.
LSDRV_DS_TFILT_SEL : Filter Time for Drain-Source Monitoring of Low Side Drivers
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0b00 : 1_us
1 us filter time
0b01 : 2_us
2 us filter time
0b10 : 4_us
4 us filter time
0b11 : 8_us
8 us filter time
End of enumeration elements list.
LS1DRV_FDISCHG_DIS : Low Side 1 Predriver fast discharge disable
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
0b0 : Enable
Predriver fast discharge enable
0b1 : Disable
Predriver fast discharge disable
End of enumeration elements list.
LS2DRV_FDISCHG_DIS : Low Side 2 Predriver fast discharge disable
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
0b0 : Enable
Predriver fast discharge enable
0b1 : Disable
Predriver fast discharge disable
End of enumeration elements list.
LS1DRV_OCSDN_DIS : Low Side 1 Predriver in overcurrent situation disable
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
0b0 : Enable
Predriver shutdown in overcurrent situation enable
0b1 : Disable
Predriver shutdown in overcurrent situation disable
End of enumeration elements list.
LS2DRV_OCSDN_DIS : Low Side 2 Predriver in overcurrent situation disable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
0b0 : Enable
Predriver shutdown in overcurrent situation enable
0b1 : Disable
Predriver shutdown in overcurrent situation disable
End of enumeration elements list.
HSDRV_DS_TFILT_SEL : Filter Time for Drain-Source Monitoring of High Side Drivers
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0b00 : 1_us
1 us filter time
0b01 : 2_us
2 us filter time
0b10 : 4_us
4 us filter time
0b11 : 8_us
8 us filter time
End of enumeration elements list.
HS1DRV_FDISCHG_DIS : High Side 1 Predriver fast discharge disable
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b0 : Enable
Predriver fast discharge enable
0b1 : Disable
Predriver fast discharge disable
End of enumeration elements list.
HS2DRV_FDISCHG_DIS : High Side 2 Predriver fast discharge disable
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
0b0 : Enable
Predriver fast discharge enable
0b1 : Disable
Predriver fast discharge disable
End of enumeration elements list.
HS1DRV_OCSDN_DIS : High Side 1 Predriver in overcurrent situation disable
bits : 21 - 20 (0 bit)
access : read-write
Enumeration:
0b0 : Enable
Predriver shutdown in overcurrent situation enable
0b1 : Disable
Predriver shutdown in overcurrent situation disable
End of enumeration elements list.
HS2DRV_OCSDN_DIS : High Side 2 Predriver in overcurrent situation disable
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
0b0 : Enable
Predriver shutdown in overcurrent situation enable
0b1 : Disable
Predriver shutdown in overcurrent situation disable
End of enumeration elements list.
CPLOW_TFILT_SEL : Filter Time for Charge Pump Voltage Low Diagnosis
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0b00 : 4_us
4 us filter time
0b01 : 8_us
8 us filter time
0b10 : 16_us
16 us filter time
0b11 : 32_us
32 us filter time
End of enumeration elements list.
Charge Pump Control and Status Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP_EN : Charge Pump Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
Charge Pump, circuit power off
0b1 : ENABLE
Charge Pump, circuit power on
End of enumeration elements list.
CP_RDY_EN : Bridge Driver on Charge Pump Ready Enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : OFF
Bridge Driver can be immediately enabled
0b1 : ON
Bridge Driver can only be enabled when Charge Pump is ready
End of enumeration elements list.
VCP_LOTH2_STS : Charge Pump Low Status
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
0b0 : ok
Charge Pump Output Voltage ok, no undervoltage detected.
0b1 : too_low
Charge Pump Output Voltage too low, undervoltage on chargepump output detected.
End of enumeration elements list.
VCP_LOWTH2 : Charge Pump Output Voltage Lower Threshold Detection Level
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0b000 : Threshold0
7.325_V
0b001 : Threshold1
7.654_V
0b010 : Threshold2
7.982_V
0b011 : Threshold3
8.309_V
0b100 : Threshold4
8.638_V
0b101 : Threshold5
8.966_V
0b110 : Threshold6
9.293_V
0b111 : Threshold7
9.620_V
End of enumeration elements list.
DRVx_VCPLO_DIS : Driver Shutdown on Charge Pump Low Voltage
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
0b0 : Shutdown_Enable
DRVx shutdown on Charge Pump undervoltage enable.
0b1 : Driver_Disable
DRVx shutdown on Charge Pump undervoltage disable.
End of enumeration elements list.
VCP_LOTH1_STS : Charge Pump MU Low Status
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
0b0 : ok
Charge Pump Output Voltage ok, no undervoltage detected.
0b1 : too_low
Charge Pump Output Voltage too low, undervoltage on chargepump output detected.
End of enumeration elements list.
DRVx_VCPUP_DIS : Driver shutdown on Charge Pump Upper Voltage
bits : 18 - 17 (0 bit)
access : read-write
Enumeration:
0b0 : Shutdown_Enable
DRVx shutdown on Charge Pumpe overvoltage enable.
0b1 : Shutdown_Disable
DRVx shutdown on Charge Pump overvoltage disable.
End of enumeration elements list.
VCP_UPTH_STS : Charge Pump MU High Status
bits : 19 - 18 (0 bit)
access : read-only
Enumeration:
0b0 : ok
Charge Pump Output Voltage ok, no overvoltage detected
0b1 : too_high
Charge Pump Output Voltage too high, overvoltage on charge pump output detected
End of enumeration elements list.
DRVx_VSDLO_DIS : Driver shutdown on VSD Lower Voltage
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
0b0 : Shutdown_Enable
DRVx shutdown on VSD undervoltage enable.
0b1 : Shutdown_Disable
DRVx shutdown on VSD undervoltage disable.
End of enumeration elements list.
VSD_LOTH_STS : Driver Supply MU Low Status
bits : 21 - 20 (0 bit)
access : read-only
Enumeration:
0b0 : Driver_Supply_Voltage_ok
no undervoltage detected.
0b1 : Driver_Supply_Voltage_too_low
undervoltage on VSD Pin detected.
End of enumeration elements list.
DRVx_VSDUP_DIS : Driver shutdown on VSD Upper Voltage
bits : 22 - 21 (0 bit)
access : read-write
Enumeration:
0b0 : Shutdown_Enable
DRVx shutdown on VSD overvoltage enable.
0b1 : Shutdown_Disable
DRVx shutdown on VSD overvoltage disable.
End of enumeration elements list.
VSD_UPTH_STS : Driver Supply MU High Status
bits : 23 - 22 (0 bit)
access : read-only
Enumeration:
0b0 : Driver_Supply_Voltage_ok
no overvoltage detected
0b1 : Driver_Supply_Voltage_too_high
overvoltage on VSD Pin detected
End of enumeration elements list.
CPLOPWRM_EN : Charge Pump Low Power Mode Enable
bits : 24 - 23 (0 bit)
access : read-write
Enumeration:
0b0 : Low_Power_Mode_Disable
low power mode inactive
0b1 : Low_Power_Mode_Enable
low power mode active
End of enumeration elements list.
VCP9V_SET : Charge Pump 9 V Output Voltage Set
bits : 25 - 24 (0 bit)
access : read-write
Enumeration:
0b0 : 14V_Set
output voltage set to 14V
0b1 : 9V_Set
output voltage set to 9V
End of enumeration elements list.
VTHVCP9V_TRIM : Charge Pump Output Voltage 9V Trimming
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
0b00 : Threshold0
7.5 V
0b01 : Threshold1
8.0 V
0b10 : Threshold2
8.5 V
0b11 : Threshold3
9.0 V
End of enumeration elements list.
Charge Pump Clock Control Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DITH_LOWER : CP_CLK lower frequency boundary during dithering
bits : 0 - 3 (4 bit)
access : read-write
DITH_UPPER : CP_CLK upper frequency boundary during dithering
bits : 8 - 11 (4 bit)
access : read-write
F_CP : MSB of CP_CLK divider
bits : 13 - 13 (1 bit)
access : read-write
CPCLK_EN : Charge Pump Clock Enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
Charge Pump Clock is switched off and has value of 0
0b1 : ENABLE
Charge Pump Clock is running
End of enumeration elements list.
H-Bridge Driver Control 2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DLY_DIAG_TIM : Ext. power on/off diag timer result register
bits : 16 - 24 (9 bit)
access : read-only
DLY_DIAG_SCLR : Ext. power diag timer valid flag clear
bits : 26 - 25 (0 bit)
access : write-only
Enumeration:
0b0 : Diag_timer_valid_not_clear
.
0b1 : Diag_timer_valid_clear
.
End of enumeration elements list.
DLY_DIAG_STS : Ext. power diag timer valid flag
bits : 27 - 26 (0 bit)
access : read-only
Enumeration:
0b0 : Diag_timer_invalid
diag timer measurement ongoing
0b1 : Diag_timer_valid
diag timer measurement finished
End of enumeration elements list.
DLY_DIAG_CHSEL : Ext. power on/off timer channel select
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0b000 : DISABLE
diag timer deactivated.
0b001 : HB1_LS_select
measure LS1 on/off delay time.
0b010 : HB2_LS_select
measure LS2 on/off delay time.
0b101 : HB1_HS_select
measure HS1 on/off delay time.
0b110 : HB2_HS_select
measure HS2 on/off delay time.
End of enumeration elements list.
DLY_DIAG_DIRSEL : Ext. power diag timer on / off select
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
0b0 : TURN_OFF
measure turn on time
0b1 : TURN_ON
measure turn off time
End of enumeration elements list.
H-Bridge Driver Control 3
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ICHARGE_TRIM : Trimming of the internal driver charge current
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
0b00000 : HiZ
Slew Rate Control is inactive
0b00001 : min_charge_rate
lowest gate discharge current selected
0b11111 : max_charge_rate
max gate discharge current is selected
End of enumeration elements list.
ICHARGEDIV2_N : ICHARGE Current divide by 2 not
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : Half_Range
available for charge current (max. is 150 mA)
0b1 : Full_Range
available for charge current (max. is 300 mA)
End of enumeration elements list.
ON_SEQ_EN : Turn On SlewrateSequencer enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : Disabled
Turn On Slewrate Sequencer disabled
0b1 : Enabled
Turn On Slewrate Sequencer enabled
End of enumeration elements list.
IDISCHARGE_TRIM : Trimming of the internal driver dis-charge current
bits : 8 - 11 (4 bit)
access : read-write
Enumeration:
0b00000 : HiZ
Slew Rate Control is inactive
0b00001 : min_discharge_rate
lowest gate charge current selected
0b11111 : max_discharge_rate
max gate charge current is selected
End of enumeration elements list.
IDISCHARGEDIV2_N : IDISCHARGE Current divide by 2 not
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
0b0 : Half_Range
available for charge current (max. is 150 mA)
0b1 : Full_Range
available for charge current (max. is 300 mA)
End of enumeration elements list.
OFF_SEQ_EN : Turn Off Slewrate Sequencer enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
0b0 : Disabled
Turn Off Slewrate Sequencer disabled
0b1 : Enabled
Turn Off Slewrate Sequencer enabled
End of enumeration elements list.
DSMONVTH : Voltage Threshold for Drain-Source Monitoring of external FETs
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0b000 : value0
Threshold 0 for VDS at 0.25 V
0b001 : value1
Threshold 1 for VDS at 0.5 V
0b010 : value2
Threshold 2 for VDS at 0.75 V
0b011 : value3
Threshold 3 for VDS at 1.00 V
0b100 : value4
Threshold 4 for VDS at 1.25 V
0b101 : value5
Threshold 5 for VDS at 1.50 V
0b110 : value6
Threshold 6 for VDS at 1.75 V
0b111 : value7
Threshold 7 for VDS at 2.00 V
End of enumeration elements list.
DRV_CCP_TIMSEL : minimum cross conduction protection time setting
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0b00 : value0
200ns cross conduction protection time
0b01 : value1
400ns cross conduction protection time
0b10 : value2
800ns cross conduction protection time
0b11 : value3
1.6us cross conduction protection time
End of enumeration elements list.
DRV_CCP_DIS : Dynamic cross conduction protection Disable
bits : 26 - 25 (0 bit)
access : read-write
Enumeration:
0b0 : CCP_Enable
dynamic ccp is active.
0b1 : CCP_Disable
dynamic ccp is disabled, delayed gate clamp remains active.
End of enumeration elements list.
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.