Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
Main wake status register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LIN_WAKE : Wake-up via LIN- Message
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
0b0 : value1
No Wake-up occurred
0b1 : value2
Wake-up occurred
End of enumeration elements list.
MON_WAKE : Wake-up via MON
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
0b0 : value1
No Wake-up occurred
0b1 : value2
Wake-up occurred
End of enumeration elements list.
GPIO0 : Wake-up via GPIO0 which is a logical OR combination of all Wake_STS_GPIO0 bits
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
0b0 : value1
No Wake-up occurred
0b1 : value2
Wake-up occurred
End of enumeration elements list.
GPIO1 : Wake-up via GPIO1 which is a logical OR combination of all Wake_STS_GPIO1 bits
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
0b0 : value1
No Wake-up occurred
0b1 : value2
Wake-up occurred
End of enumeration elements list.
CYC_WAKE : Wake-up caused by Cyclic Wake
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : value1
No Wake-up occurred
0b1 : value2
Wake-up occurred
End of enumeration elements list.
FAIL : Wake-up after VDDEXT Fail
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
0b0 : value1
No Wake-up occurred
0b1 : value2
Wake-up occurred
End of enumeration elements list.
Reset Status Hard Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYS_FAIL : Flag which indicates a reset caused by a System Fail reported in the corresponding Fail Register
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No reset caused by System Fail executed
0b1 : value2
Reset caused by System Fail executed
End of enumeration elements list.
PMU_WAKE : Flag which indicates a reset caused by Stop-Exit
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No reset caused by Stop-Exit executed
0b1 : value2
Reset caused by Stop-Exit executed
End of enumeration elements list.
PMU_SleepEX : Flag which indicates a reset caused by Sleep-Exit
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No reset caused by Sleep-Exit executed
0b1 : value2
Reset caused by Sleep-Exit executed
End of enumeration elements list.
PMU_LPR : Low Priority Resets (see PMU_RESET_STS2)
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : value1
Low Priority-Reset executed
0b1 : value2
Low Priority executed
End of enumeration elements list.
PMU_ClkWDT : Clock Watchdog (CLKWDT) Reset Flag
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No Clock Watchdog reset executed
0b1 : value2
Clock Watchdog reset executed
End of enumeration elements list.
PMU_ExtWDT : External Watchdog (WDT1) Reset Flag
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No External Watchdog reset executed
0b1 : value2
External Watchdog reset executed
End of enumeration elements list.
PMU_PIN : PIN-Reset Flag
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No PIN-Reset executed
0b1 : value2
PIN-Reset executed
End of enumeration elements list.
PMU_1V5DidPOR : Power-On Reset Flag
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No Power-On reset executed
0b1 : value2
Power-On reset executed
End of enumeration elements list.
Reset Status Soft Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PMU_IntWDT : Internal Watchdog Reset Flag
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No Internal Watchdog reset executed
0b1 : value2
Internal Watchdog reset executed
End of enumeration elements list.
PMU_SOFT : Soft-Reset Flag
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No Soft-Reset executed
0b1 : value2
Soft-Reset executed
End of enumeration elements list.
LOCKUP : Lockup-Reset Flag
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No Lockup-Reset executed
0b1 : value2
Lockup-Reset executed
End of enumeration elements list.
PMU Settings Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WAKE_W_RST : Wake-up with reset execution
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
Stop-Exit without reset execution
0b1 : value2
Stop-Exit with reset execution
End of enumeration elements list.
EN_0V9_N : Disables the reduction of the VDDC regulator output to 0.9 V during Stop-Mode
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : value1
Output voltage reduction enabled
0b1 : value2
Output voltage reduction disabled
End of enumeration elements list.
CYC_WAKE_EN : Enabling Cyclic Wake
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
Cyclic Wake disabled
0b1 : value2
Cyclic Wake enabled
End of enumeration elements list.
CYC_SENSE_EN : Enabling Cyclic Sense
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : value1
Cyclic Sense disabled
0b1 : value2
Cyclic Sense enabled
End of enumeration elements list.
EN_VDDEXT_OC_OFF_N : Disabling VDDEXT Shutdown in Overload Condition
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : value1
Shutdown enabled
0b1 : value2
Shutdown disabled
End of enumeration elements list.
Dead Time in Cyclic Sense Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
M03 : Mantissa
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0b0000 : value1
Mantissa value is 1
0b1111 : value2
Mantissa value is 16
End of enumeration elements list.
E01 : Exponent
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0b00 : value1
Exponent value is 0
0b01 : value2
Exponent value is 1
0b10 : value3
Exponent value is 2
0b11 : value4
Exponent value is 3
End of enumeration elements list.
OSC_100kHz_EN : 100 kHz Oscillator Enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : DISABLE
Oscillator is disabled
0b1 : ENABLE
Oscillator is enabled
End of enumeration elements list.
Dead Time in Cyclic Wake Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
M03 : Mantissa
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0b0000 : value1
Mantissa value is 1
0b1111 : value2
Mntissa value is 16
End of enumeration elements list.
E01 : Exponent
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0b00 : value1
Exponent value is 0
0b01 : value2
Exponent value is 1
0b10 : value3
Exponent value is 2
0b11 : value4
Exponent value is 3
End of enumeration elements list.
System Startup Config
address_offset : 0x2D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MBIST_EN : System Startup Configuration Bit for RAM MBIST at Sleep Mode exit
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No MBIST executed at Sleep Mode exit
0b1 : value2
MBIST executed at Sleep Mode exit
End of enumeration elements list.
Sample Delay in Cyclic Sense Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
M03 : Mantissa
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0b0000 : value1
variable value M3M2M1M0 is 0
0b1111 : value2
variable value M3M3M1M0 is 15
End of enumeration elements list.
Settings Monitor 1
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : MON Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
MON disabled
0b1 : value2
MON enabled
End of enumeration elements list.
FALL : MON Wake-up on Falling Edge Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : value1
Wake-up disabled
0b1 : value2
Wake-up enabled
End of enumeration elements list.
RISE : MON Wake-up on Rising Edge Enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
Wake-up disabled
0b1 : value2
Wake-up enabled
End of enumeration elements list.
CYC : MON for Cycle Sense Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : value1
Cycle Sense disabled
0b1 : value2
Cycle Sense enabled
End of enumeration elements list.
PD : Pull-Down Current Source for MON Input Enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : value1
Pull-down source disabled
0b1 : value2
Pull-down source enabled
End of enumeration elements list.
PU : Pull-Up Current Source for MON Input Enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : value1
Pull-up source disabled
0b1 : value2
Pull-up source enabled
End of enumeration elements list.
STS : MON Status Input
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
0b0 : value1
MON input has low status
0b1 : value2
MON input has high status
End of enumeration elements list.
Voltage Reg Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PMU_1V5_OVERVOLT : Overvoltage at VDDC regulator
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
0b0 : value1
No overvoltage
0b1 : value2
Overvoltage
End of enumeration elements list.
PMU_1V5_OVERLOAD : Overload at VDDC regulator
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
0b0 : value1
No overload
0b1 : value2
Overload
End of enumeration elements list.
PMU_1V5_FAIL_EN : Enabling of VDDC status information as interrupt source
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No interrupts are generated
0b1 : value2
Interrupts are generated
End of enumeration elements list.
PMU_5V_OVERVOLT : Overvoltage at VDDP regulator
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : value1
No overvoltage
0b1 : value2
Overvoltage
End of enumeration elements list.
PMU_5V_OVERLOAD : Overload at VDDP regulator
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
0b0 : value1
No overload
0b1 : value2
Overload
End of enumeration elements list.
PMU_5V_FAIL_EN : Enabling of VDDP status information as interrupt source
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No interrupts are generated
0b1 : value2
Interrupts are generated
End of enumeration elements list.
LIN Wake Enable
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LIN_EN : Lin Wake enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
0b0 : Disable
.
0b1 : Enable
.
End of enumeration elements list.
Reset Blind Time Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RST_TFB : Reset Pin Blind Time Selection Bits
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0b00 : RST_TFB_0
0,5 us typ.
0b01 : RST_TFB_1
1 us typ.
0b10 : RST_TFB_2
5 us typ.
0b11 : RST_TFB_3
31 us typ.
End of enumeration elements list.
System Fail Status Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUPP_SHORT : Supply Short
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : Main_Supply_ok
VDDP or VDDC are in expected range
0b1 : Main_Supply_short
VDDP or VDDC do not have stable operating point
End of enumeration elements list.
SUPP_TMOUT : Supply Time Out
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : Main_Supply_ok
VDDP or VDDC are in expected range
0b1 : Main_Supply_fail
VDDP or VDDC do not have stable operating point
End of enumeration elements list.
PMU_1V5_OVL : VDDC Overload Flag
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : No_Overload
VDDC ok
0b1 : Overload
Hall VDDC Overload
End of enumeration elements list.
PMU_5V_OVL : VDDP Overload Flag
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : No_Overload
VDDP ok
0b1 : Overload
VDDP Overload
End of enumeration elements list.
SYS_OT : System Overtemperature Indication Flag
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : No_Overtemperature
System ok
0b1 : Overtemperature
System Overtemperature
End of enumeration elements list.
WDT1_SEQ_FAIL : External Watchdog (WDT1) Sequential Fail
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
0b0 : No_Fail
System working properly
0b1 : Sequential_Watchdog_Fail
5 consecutive watchdog fails
End of enumeration elements list.
VDDEXT Control
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : VDDEXT Supply Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
VDDEXT Supply disabled
0b1 : value2
VDDEXT supply enabled
End of enumeration elements list.
CYC_EN : VDDEXT Supply for Cyclic Sense Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : value1
VDDEXT for cyclic sense disable
0b1 : value2
VDDEXT for cyclic sense enable
End of enumeration elements list.
FAIL_EN : Enabling of VDDEXT Supply status information as interrupt source
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
VDDEXT fail interrupts are disabled
0b1 : value2
VDDEXT fail Interrupts are enabled
End of enumeration elements list.
SHORT : VDDEXT Supply Shorted Output
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b0 : value1
VDDEXT no short circuit
0b1 : value2
VDDEXT short circuit
End of enumeration elements list.
OVERVOLT : VDDEXT Supply Overvoltage
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b0 : value1
VDDEXT not in overvoltage condition
0b1 : value2
VDDEXT in overvoltage condition
End of enumeration elements list.
OVERLOAD : VDDEXT Supply Overload
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
0b0 : value1
VDDEXT not in overload condition
0b1 : value2
VDDEXT in overload condition
End of enumeration elements list.
OK : VDDEXT Supply works inside its specified range 2
bits : 6 - 5 (0 bit)
access : read-only
Enumeration:
0b1 : value1
VDDEXT in low drop mode
0b0 : value2
VDDEXT not in low drop mode
End of enumeration elements list.
STABLE : VDDEXT Supply works inside its specified range 1
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
0b1 : value1
VDDEXT Voltage inside of specified range
0b0 : value2
VDDEXT Voltage outside of specified range
End of enumeration elements list.
Wake Status Fail Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUPPFAIL : Stop-Exit due to overvoltage at the VDDEXT Supply
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No overvoltage
0b1 : value2
Module suspend enabled
End of enumeration elements list.
VDDEXTSHORT : Stop-Exit due to short circuit at the VDDEXT Supply
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b0 : value1
No short circuit
0b1 : value2
Short circuit
End of enumeration elements list.
Wake Source MON Input Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WAKE_STS : Status of MON
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
0b0 : No_wake_up_detected
.
0b1 : wake_up_detected
.
End of enumeration elements list.
Wake Status GPIO 0 Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_STS_0 : Status of GPIO0_0
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
0b0 : No_wake_up_detected
.
0b1 : wake_up_detected
.
End of enumeration elements list.
GPIO0_STS_1 : Status of GPIO0_1
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
0b0 : No_wake_up_detected
.
0b1 : wake_up_detected
.
End of enumeration elements list.
GPIO0_STS_2 : Status of GPIO0_2
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
0b0 : No_wake_up_detected
.
0b1 : wake_up_detected
.
End of enumeration elements list.
GPIO0_STS_3 : Status of GPIO0_3
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
0b0 : No_wake_up_detected
.
0b1 : wake_up_detected
.
End of enumeration elements list.
GPIO0_STS_4 : Status of GPIO0_4
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : No_wake_up_detected
.
0b1 : wake_up_detected
.
End of enumeration elements list.
Wake Status GPIO 1 Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO1_STS_0 : Wake GPIO1_0
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
0b0 : No_wake_up_detected
.
0b1 : wake_up_detected
.
End of enumeration elements list.
GPIO1_STS_1 : Wake GPIO1_1
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
0b0 : No_wake_up_detected
.
0b1 : wake_up_detected
.
End of enumeration elements list.
GPIO1_STS_2 : Wake GPIO1_2
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
0b0 : No_wake_up_detected
.
0b1 : wake_up_detected
.
End of enumeration elements list.
GPIO1_STS_3 : Wake GPIO1_3
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
0b0 : No_wake_up_detected
.
0b1 : wake_up_detected
.
End of enumeration elements list.
GPIO1_STS_4 : Wake GPIO1_4
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
0b0 : No_wake_up_detected
.
0b1 : wake_up_detected
.
End of enumeration elements list.
PMU Wake-up Timing Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNF_LIN_FT : Wake-up Filter time for LIN WAKE
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b0 : 30_us
30 us filter time
0b1 : 50_us
50 us filter time
End of enumeration elements list.
CNF_MON_FT : Wake-up Filter time for Monitoring Inputs
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b0 : 20_us
20 us filter time
0b1 : 40_us
40 us filter time
End of enumeration elements list.
CNF_GPIO_FT : Wake-up Filter time for General Purpose IO
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0b00 : 10_us
10 us filter time
0b01 : 20_us
20 us filter time
0b10 : 40_us
40 us filter time
0b11 : 5_us
5 us filter time
End of enumeration elements list.
General Purpose User DATA0
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : DATA0 Storage Byte
bits : 0 - 6 (7 bit)
access : read-write
General Purpose User DATA1
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : DATA1 Storage Byte
bits : 0 - 6 (7 bit)
access : read-write
General Purpose User DATA2
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA2 : DATA2 Storage Byte
bits : 0 - 6 (7 bit)
access : read-write
General Purpose User DATA3
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA3 : DATA3 Storage Byte
bits : 0 - 6 (7 bit)
access : read-write
General Purpose User DATA4
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA4 : DATA4 Storage Byte
bits : 0 - 6 (7 bit)
access : read-write
General Purpose User DATA5
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA5 : DATA5 Storage Byte
bits : 0 - 6 (7 bit)
access : read-write
Wake Configuration GPIO Port 0 Rising Edge Register
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_RI_0 : Port 0_0 Wake-up on Rising Edge enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO0_RI_1 : Port 0_1 Wake-up on Rising Edge enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO0_RI_2 : Port 0_2 Wake-up on Rising Edge enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO0_RI_3 : Port 0_3 Wake-up on Rising Edge enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO0_RI_4 : Port 0_4 Wake-up on Rising Edge enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
Wake Configuration GPIO Port 0 Falling Edge Register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_FA_0 : Port 0_0 Wake-up on Falling Edge enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO0_FA_1 : Port 0_1 Wake-up on Falling Edge enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO0_FA_2 : Port 0_2 Wake-up on Falling Edge enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO0_FA_3 : Port 0_3 Wake-up on Falling Edge enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO0_FA_4 : Port 0_4 Wake-up on Falling Edge enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
Wake Port 0 Cycle Enabled Register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_CYC_0 : GPIO0_0 input for cycle sense enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
GPIO0_CYC_1 : GPIO0_1 input for cycle sense enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
GPIO0_CYC_2 : GPIO0_2 input for cycle sense enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
GPIO0_CYC_3 : GPIO0_3 input for cycle sense enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
GPIO0_CYC_4 : GPIO0_4 input for cycle sense enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
Wake Configuration GPIO Port 1 Rising Edge Register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO1_RI_0 : Port 1_0 Wake-up on Rising Edge enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO1_RI_1 : Port 1_1 Wake-up on Rising Edge enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO1_RI_2 : Port 1_2 Wake-up on Rising Edge enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO1_RI_3 : Port 1_3 Wake-up on Rising Edge enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO1_RI_4 : Port 1_4 Wake-up on Rising Edge enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
Wake Configuration GPIO Port 1 Falling Edge Register
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO1_FA_0 : Port 1_0 Wake-up on Falling Edge enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO1_FA_1 : Port 1_1 Wake-up on Falling Edge enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO1_FA_2 : Port 1_2 Wake-up on Falling Edge enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO1_FA_3 : Port 1_3 Wake-up on Falling Edge enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
GPIO1_FA_4 : Port 1_4 Wake-up on Falling Edge enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
wake-up enabled
0b0 : DISABLE
wake-up disabled
End of enumeration elements list.
Wake Port 1 Cycle Enabled Register
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO1_CYC_0 : GPIO1_0 input for cycle sense enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
GPIO1_CYC_1 : GPIO1_1 input for cycle sense enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
GPIO1_CYC_2 : GPIO1_2 input for cycle sense enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
GPIO1_CYC_3 : GPIO1_3 input for cycle sense enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
GPIO1_CYC_4 : GPIO1_4 input for cycle sense enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
0b1 : ENABLE
input for cycle sense enabled
0b0 : DISABLE
input for cycle sense disabled
End of enumeration elements list.
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