\n
address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
External interrupt enable register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EEXI0 : -
bits : 0 - 0 (1 bit)
access : read-write
EEXI1 : -
bits : 1 - 2 (2 bit)
access : read-write
EEXI2 : -
bits : 2 - 4 (3 bit)
access : read-write
EEXI3 : -
bits : 3 - 6 (4 bit)
access : read-write
EEXI4 : -
bits : 4 - 8 (5 bit)
access : read-write
EEXI5 : -
bits : 5 - 10 (6 bit)
access : read-write
EEXI6 : -
bits : 6 - 12 (7 bit)
access : read-write
EEXI7 : -
bits : 7 - 14 (8 bit)
access : read-write
External interrupt 47 selection register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXI4S : -
bits : 0 - 7 (8 bit)
access : read-write
EXI5S : -
bits : 8 - 23 (16 bit)
access : read-write
EXI6S : -
bits : 16 - 39 (24 bit)
access : read-write
EXI7S : -
bits : 24 - 55 (32 bit)
access : read-write
External Interrupt status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEXI0 : -
bits : 0 - 0 (1 bit)
access : read-write
QEXI1 : -
bits : 1 - 2 (2 bit)
access : read-write
QEXI2 : -
bits : 2 - 4 (3 bit)
access : read-write
QEXI3 : -
bits : 3 - 6 (4 bit)
access : read-write
QEXI4 : -
bits : 4 - 8 (5 bit)
access : read-write
QEXI5 : -
bits : 5 - 10 (6 bit)
access : read-write
QEXI6 : -
bits : 6 - 12 (7 bit)
access : read-write
QEXI7 : -
bits : 7 - 14 (8 bit)
access : read-write
External interrupt control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXI0E : -
bits : 0 - 1 (2 bit)
access : read-write
EXI0SM : -
bits : 2 - 4 (3 bit)
access : read-write
EXI0FL : -
bits : 3 - 6 (4 bit)
access : read-write
EXI1E : -
bits : 4 - 9 (6 bit)
access : read-write
EXI1SM : -
bits : 6 - 12 (7 bit)
access : read-write
EXI1FL : -
bits : 7 - 14 (8 bit)
access : read-write
EXI2E : -
bits : 8 - 17 (10 bit)
access : read-write
EXI2SM : -
bits : 10 - 20 (11 bit)
access : read-write
EXI2FL : -
bits : 11 - 22 (12 bit)
access : read-write
EXI3E : -
bits : 12 - 25 (14 bit)
access : read-write
EXI3SM : -
bits : 14 - 28 (15 bit)
access : read-write
EXI3FL : -
bits : 15 - 30 (16 bit)
access : read-write
EXI4E : -
bits : 16 - 33 (18 bit)
access : read-write
EXI4SM : -
bits : 18 - 36 (19 bit)
access : read-write
EXI4FL : -
bits : 19 - 38 (20 bit)
access : read-write
EXI5E : -
bits : 20 - 41 (22 bit)
access : read-write
EXI5SM : -
bits : 22 - 44 (23 bit)
access : read-write
EXI5FL : -
bits : 23 - 46 (24 bit)
access : read-write
EXI6E : -
bits : 24 - 49 (26 bit)
access : read-write
EXI6SM : -
bits : 26 - 52 (27 bit)
access : read-write
EXI6FL : -
bits : 27 - 54 (28 bit)
access : read-write
EXI7E : -
bits : 28 - 57 (30 bit)
access : read-write
EXI7SM : -
bits : 30 - 60 (31 bit)
access : read-write
EXI7FL : -
bits : 31 - 62 (32 bit)
access : read-write
External interrupt 03 selection register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXI0S : -
bits : 0 - 7 (8 bit)
access : read-write
EXI1S : -
bits : 8 - 23 (16 bit)
access : read-write
EXI2S : -
bits : 16 - 39 (24 bit)
access : read-write
EXI3S : -
bits : 24 - 55 (32 bit)
access : read-write
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.