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TIMER

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xFC byte (0x0)
mem_usage : registers
protection : not protected

Registers

TM0D

TM1D

TM1C

TM1CON

TM2D

TM2C

TM2CON

TM3D

TM3C

TM3CON

TM0C

TM4D

TM4C

TM4CON

TM5D

TM5C

TM5CON

TM6D

TM6C

TM6CON

TM7D

TM7C

TM7CON

TM0CON

TMSTR

TMSTP

TMSTAT


TM0D

Timer 0 data register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM0D TM0D read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnD

TnD : -
bits : 0 - 15 (16 bit)
access : read-write


TM1D

Timer 1 data register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM1D TM1D read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmD

TmD : -
bits : 0 - 7 (8 bit)
access : read-write


TM1C

Timer 1 counter register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM1C TM1C read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmC

TmC : -
bits : 0 - 7 (8 bit)
access : read-write


TM1CON

Timer 1 control register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM1CON TM1CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmCS TmDIV TmOST

TmCS : -
bits : 0 - 1 (2 bit)
access : read-write

TmDIV : -
bits : 4 - 10 (7 bit)
access : read-write

TmOST : -
bits : 8 - 16 (9 bit)
access : read-write


TM2D

Timer 2 data register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM2D TM2D read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnD

TnD : -
bits : 0 - 15 (16 bit)
access : read-write


TM2C

Timer 2 counter register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM2C TM2C read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnC

TnC : -
bits : 0 - 15 (16 bit)
access : read-write


TM2CON

Timer 2 control register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM2CON TM2CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnCS TnDIV TnOST TnmM16

TnCS : -
bits : 0 - 1 (2 bit)
access : read-write

TnDIV : -
bits : 4 - 10 (7 bit)
access : read-write

TnOST : -
bits : 8 - 16 (9 bit)
access : read-write

TnmM16 : -
bits : 12 - 24 (13 bit)
access : read-write


TM3D

Timer 3 data register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM3D TM3D read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmD

TmD : -
bits : 0 - 7 (8 bit)
access : read-write


TM3C

Timer 3 counter register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM3C TM3C read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmC

TmC : -
bits : 0 - 7 (8 bit)
access : read-write


TM3CON

Timer 3 control register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM3CON TM3CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmCS TmDIV TmOST

TmCS : -
bits : 0 - 1 (2 bit)
access : read-write

TmDIV : -
bits : 4 - 10 (7 bit)
access : read-write

TmOST : -
bits : 8 - 16 (9 bit)
access : read-write


TM0C

Timer 0 counter register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM0C TM0C read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnC

TnC : -
bits : 0 - 15 (16 bit)
access : read-write


TM4D

Timer 4 data register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM4D TM4D read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnD

TnD : -
bits : 0 - 15 (16 bit)
access : read-write


TM4C

Timer 4 counter register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM4C TM4C read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnC

TnC : -
bits : 0 - 15 (16 bit)
access : read-write


TM4CON

Timer 4 control register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM4CON TM4CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnCS TnDIV TnOST TnmM16

TnCS : -
bits : 0 - 1 (2 bit)
access : read-write

TnDIV : -
bits : 4 - 10 (7 bit)
access : read-write

TnOST : -
bits : 8 - 16 (9 bit)
access : read-write

TnmM16 : -
bits : 12 - 24 (13 bit)
access : read-write


TM5D

Timer 5 data register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM5D TM5D read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmD

TmD : -
bits : 0 - 7 (8 bit)
access : read-write


TM5C

Timer 5 counter register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM5C TM5C read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmC

TmC : -
bits : 0 - 7 (8 bit)
access : read-write


TM5CON

Timer 5 control register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM5CON TM5CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmCS TmDIV TmOST

TmCS : -
bits : 0 - 1 (2 bit)
access : read-write

TmDIV : -
bits : 4 - 10 (7 bit)
access : read-write

TmOST : -
bits : 8 - 16 (9 bit)
access : read-write


TM6D

Timer 6 data register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM6D TM6D read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnD

TnD : -
bits : 0 - 15 (16 bit)
access : read-write


TM6C

Timer 6 counter register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM6C TM6C read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnC

TnC : -
bits : 0 - 15 (16 bit)
access : read-write


TM6CON

Timer 6 control register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM6CON TM6CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnCS TnDIV TnOST TnmM16

TnCS : -
bits : 0 - 1 (2 bit)
access : read-write

TnDIV : -
bits : 4 - 10 (7 bit)
access : read-write

TnOST : -
bits : 8 - 16 (9 bit)
access : read-write

TnmM16 : -
bits : 12 - 24 (13 bit)
access : read-write


TM7D

Timer 7 data register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM7D TM7D read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmD

TmD : -
bits : 0 - 7 (8 bit)
access : read-write


TM7C

Timer 7 counter register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM7C TM7C read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmC

TmC : -
bits : 0 - 7 (8 bit)
access : read-write


TM7CON

Timer 7 control register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM7CON TM7CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TmCS TmDIV TmOST

TmCS : -
bits : 0 - 1 (2 bit)
access : read-write

TmDIV : -
bits : 4 - 10 (7 bit)
access : read-write

TmOST : -
bits : 8 - 16 (9 bit)
access : read-write


TM0CON

Timer 0 control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TM0CON TM0CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TnCS TnDIV TnOST TnmM16

TnCS : -
bits : 0 - 1 (2 bit)
access : read-write

TnDIV : -
bits : 4 - 10 (7 bit)
access : read-write

TnOST : -
bits : 8 - 16 (9 bit)
access : read-write

TnmM16 : -
bits : 12 - 24 (13 bit)
access : read-write


TMSTR

Timer start register
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TMSTR TMSTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T0RUN T1RUN T2RUN T3RUN T4RUN T5RUN T6RUN T7RUN

T0RUN : -
bits : 0 - 0 (1 bit)
access : write-only

T1RUN : -
bits : 1 - 2 (2 bit)
access : write-only

T2RUN : -
bits : 2 - 4 (3 bit)
access : write-only

T3RUN : -
bits : 3 - 6 (4 bit)
access : write-only

T4RUN : -
bits : 4 - 8 (5 bit)
access : write-only

T5RUN : -
bits : 5 - 10 (6 bit)
access : write-only

T6RUN : -
bits : 6 - 12 (7 bit)
access : write-only

T7RUN : -
bits : 7 - 14 (8 bit)
access : write-only


TMSTP

Timer stop register
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TMSTP TMSTP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T0STP T1STP T2STP T3STP T4STP T5STP T6STP T7STP

T0STP : -
bits : 0 - 0 (1 bit)
access : write-only

T1STP : -
bits : 1 - 2 (2 bit)
access : write-only

T2STP : -
bits : 2 - 4 (3 bit)
access : write-only

T3STP : -
bits : 3 - 6 (4 bit)
access : write-only

T4STP : -
bits : 4 - 8 (5 bit)
access : write-only

T5STP : -
bits : 5 - 10 (6 bit)
access : write-only

T6STP : -
bits : 6 - 12 (7 bit)
access : write-only

T7STP : -
bits : 7 - 14 (8 bit)
access : write-only


TMSTAT

Timer status register
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TMSTAT TMSTAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T0STAT T1STAT T2STAT T3STAT T4STAT T5STAT T6STAT T7STAT

T0STAT : -
bits : 0 - 0 (1 bit)
access : read-only

T1STAT : -
bits : 1 - 2 (2 bit)
access : read-only

T2STAT : -
bits : 2 - 4 (3 bit)
access : read-only

T3STAT : -
bits : 3 - 6 (4 bit)
access : read-only

T4STAT : -
bits : 4 - 8 (5 bit)
access : read-only

T5STAT : -
bits : 5 - 10 (6 bit)
access : read-only

T6STAT : -
bits : 6 - 12 (7 bit)
access : read-only

T7STAT : -
bits : 7 - 14 (8 bit)
access : read-only



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