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SSIOF

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection : not protected

Registers

SF0CTRL

SF0SRR

SF0SRC

SF0FSR

SF0DWR

SF0DRR

SF0INTC

SF0TRAC

SF0BRR


SF0CTRL

SIOF0 control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SF0CTRL SF0CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SF0SPE SF0MST SF0SIZ SF0MDFE SF0LSB SF0CPHA SF0CPOL SF0FICL SF0SSZ SF0SOZ SF0MOZ

SF0SPE : -
bits : 0 - 0 (1 bit)
access : read-write

SF0MST : -
bits : 1 - 2 (2 bit)
access : read-write

SF0SIZ : -
bits : 2 - 4 (3 bit)
access : read-write

SF0MDFE : -
bits : 3 - 6 (4 bit)
access : read-write

SF0LSB : -
bits : 4 - 8 (5 bit)
access : read-write

SF0CPHA : -
bits : 5 - 10 (6 bit)
access : read-write

SF0CPOL : -
bits : 6 - 12 (7 bit)
access : read-write

SF0FICL : -
bits : 8 - 16 (9 bit)
access : read-write

SF0SSZ : -
bits : 9 - 18 (10 bit)
access : read-write

SF0SOZ : -
bits : 10 - 20 (11 bit)
access : read-write

SF0MOZ : -
bits : 11 - 22 (12 bit)
access : read-write


SF0SRR

SIOF0 status register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SF0SRR SF0SRR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SF0TFI SF0RFI SF0FI SF0ORF SF0MDF SF0SPIF SF0WOF SF0TFF SF0TFE SF0RFF SF0RFE

SF0TFI : -
bits : 0 - 0 (1 bit)
access : read-only

SF0RFI : -
bits : 1 - 2 (2 bit)
access : read-only

SF0FI : -
bits : 2 - 4 (3 bit)
access : read-only

SF0ORF : -
bits : 3 - 6 (4 bit)
access : read-only

SF0MDF : -
bits : 4 - 8 (5 bit)
access : read-only

SF0SPIF : -
bits : 5 - 10 (6 bit)
access : read-only

SF0WOF : -
bits : 8 - 16 (9 bit)
access : read-only

SF0TFF : -
bits : 9 - 18 (10 bit)
access : read-only

SF0TFE : -
bits : 10 - 20 (11 bit)
access : read-only

SF0RFF : -
bits : 11 - 22 (12 bit)
access : read-only

SF0RFE : -
bits : 12 - 24 (13 bit)
access : read-only


SF0SRC

SIOF0 status clear register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SF0SRC SF0SRC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SF0TFC SF0RFC SF0FC SF0ORFC SF0MDFC SF0SPIFC SF0WOFC

SF0TFC : -
bits : 0 - 0 (1 bit)
access : write-only

SF0RFC : -
bits : 1 - 2 (2 bit)
access : write-only

SF0FC : -
bits : 2 - 4 (3 bit)
access : write-only

SF0ORFC : -
bits : 3 - 6 (4 bit)
access : write-only

SF0MDFC : -
bits : 4 - 8 (5 bit)
access : write-only

SF0SPIFC : -
bits : 5 - 10 (6 bit)
access : write-only

SF0WOFC : -
bits : 8 - 16 (9 bit)
access : write-only


SF0FSR

SIOF0 FIFO status register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SF0FSR SF0FSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SF0TFD SF0RFD

SF0TFD : -
bits : 0 - 4 (5 bit)
access : read-only

SF0RFD : -
bits : 8 - 20 (13 bit)
access : read-only


SF0DWR

SIOF0 write data register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SF0DWR SF0DWR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SF0WD

SF0WD : -
bits : 0 - 15 (16 bit)
access : read-write


SF0DRR

SIOF0 read data register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SF0DRR SF0DRR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SF0RD

SF0RD : -
bits : 0 - 15 (16 bit)
access : read-only


SF0INTC

SIOF0 interrupt control register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SF0INTC SF0INTC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SF0TFIE SF0RFIE SF0FIE SF0ORIE SF0MFIE SF0TFIC SF0RFIC

SF0TFIE : -
bits : 0 - 0 (1 bit)
access : read-write

SF0RFIE : -
bits : 1 - 2 (2 bit)
access : read-write

SF0FIE : -
bits : 2 - 4 (3 bit)
access : read-write

SF0ORIE : -
bits : 3 - 6 (4 bit)
access : read-write

SF0MFIE : -
bits : 4 - 8 (5 bit)
access : read-write

SF0TFIC : -
bits : 8 - 19 (12 bit)
access : read-write

SF0RFIC : -
bits : 12 - 27 (16 bit)
access : read-write


SF0TRAC

SIOF0 transfer interval control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SF0TRAC SF0TRAC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SF0DTL

SF0DTL : -
bits : 0 - 8 (9 bit)
access : read-write


SF0BRR

SIOF0 baud rate register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SF0BRR SF0BRR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SF0BR SF0LEAD SF0LAG

SF0BR : -
bits : 0 - 9 (10 bit)
access : read-write

SF0LEAD : -
bits : 12 - 25 (14 bit)
access : read-write

SF0LAG : -
bits : 14 - 29 (16 bit)
access : read-write



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