\n

UART

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x3C byte (0x0)
mem_usage : registers
protection : not protected

Registers

UA0BUF

UA0STAT

UA1BUF

UA1CON

UA1STAT

UA0INTST

UA0CON

UA0MOD

UA0BRT


UA0BUF

UART0 receive buffer
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

UA0BUF UA0BUF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 U0B

U0B : -
bits : 0 - 7 (8 bit)
access : read-only


UA0STAT

UART0 receive status register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

UA0STAT UA0STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 U0FER U0OER U0PER

U0FER : -
bits : 0 - 0 (1 bit)
access : read-write

U0OER : -
bits : 1 - 2 (2 bit)
access : read-write

U0PER : -
bits : 2 - 4 (3 bit)
access : read-write


UA1BUF

UART0 transmit buffer
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

UA1BUF UA1BUF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 U1B

U1B : -
bits : 0 - 7 (8 bit)
access : read-write


UA1CON

UART0 transmit monitor register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

UA1CON UA1CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 U1EN

U1EN : -
bits : 0 - 0 (1 bit)
access : read-only


UA1STAT

UART0 transmit status register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

UA1STAT UA1STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 U1FUL

U1FUL : -
bits : 3 - 6 (4 bit)
access : read-write


UA0INTST

UART0 interrupt status register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

UA0INTST UA0INTST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 U0RXINT U0TXINT

U0RXINT : -
bits : 0 - 0 (1 bit)
access : read-write

U0TXINT : -
bits : 1 - 2 (2 bit)
access : read-write


UA0CON

UART0 control register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

UA0CON UA0CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 U1B

U1B : -
bits : 0 - 7 (8 bit)
access : read-write


UA0MOD

UART0 mode register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

UA0MOD UA0MOD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 U0CK U0RSS U0LG U0PT U0STP U0NEG U0DIR

U0CK : -
bits : 1 - 3 (3 bit)
access : read-write

U0RSS : -
bits : 6 - 12 (7 bit)
access : read-write

U0LG : -
bits : 8 - 17 (10 bit)
access : read-write

U0PT : -
bits : 10 - 21 (12 bit)
access : read-write

U0STP : -
bits : 12 - 24 (13 bit)
access : read-write

U0NEG : -
bits : 13 - 26 (14 bit)
access : read-write

U0DIR : -
bits : 14 - 28 (15 bit)
access : read-write


UA0BRT

UART0 baud rate register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

UA0BRT UA0BRT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 U0BR

U0BR : -
bits : 0 - 13 (14 bit)
access : read-write



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