\n
address_offset : 0x0 Bytes (0x0)
size : 0x44 byte (0x0)
mem_usage : registers
protection : not protected
-
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RADCAD : -
bits : 0 - 23 (24 bit)
access : read-write
-
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RAST0 : -
bits : 0 - 0 (1 bit)
access : read-write
RASTS : -
bits : 8 - 20 (13 bit)
access : read-write
-
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RADCn : -
bits : 0 - 23 (24 bit)
access : read-write
OMn : -
bits : 24 - 51 (28 bit)
access : read-write
RADIn : -
bits : 28 - 56 (29 bit)
access : read-write
RADCVn : -
bits : 29 - 58 (30 bit)
access : read-write
RADVn : -
bits : 31 - 62 (32 bit)
access : read-write
-
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RADCn : -
bits : 0 - 23 (24 bit)
access : read-write
OMn : -
bits : 24 - 51 (28 bit)
access : read-write
RADIn : -
bits : 28 - 56 (29 bit)
access : read-write
RADCVn : -
bits : 29 - 58 (30 bit)
access : read-write
RADVn : -
bits : 31 - 62 (32 bit)
access : read-write
-
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RADCn : -
bits : 0 - 23 (24 bit)
access : read-write
OMn : -
bits : 24 - 51 (28 bit)
access : read-write
RADIn : -
bits : 28 - 56 (29 bit)
access : read-write
RADCVn : -
bits : 29 - 58 (30 bit)
access : read-write
RADVn : -
bits : 31 - 62 (32 bit)
access : read-write
-
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RADCn : -
bits : 0 - 23 (24 bit)
access : read-write
OMn : -
bits : 24 - 51 (28 bit)
access : read-write
RADIn : -
bits : 28 - 56 (29 bit)
access : read-write
RADCVn : -
bits : 29 - 58 (30 bit)
access : read-write
RADVn : -
bits : 31 - 62 (32 bit)
access : read-write
-
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RADCn : -
bits : 0 - 23 (24 bit)
access : read-write
OMn : -
bits : 24 - 51 (28 bit)
access : read-write
RADIn : -
bits : 28 - 56 (29 bit)
access : read-write
RADCVn : -
bits : 29 - 58 (30 bit)
access : read-write
RADVn : -
bits : 31 - 62 (32 bit)
access : read-write
-
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RADCBD : -
bits : 0 - 23 (24 bit)
access : read-write
-
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RADCD : -
bits : 0 - 23 (24 bit)
access : read-write
-
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OM : -
bits : 0 - 3 (4 bit)
access : read-write
RADI : -
bits : 4 - 8 (5 bit)
access : read-write
RACK : -
bits : 5 - 12 (8 bit)
access : read-write
-
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RARUN : -
bits : 0 - 0 (1 bit)
access : read-write
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