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LSICNT

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x64 byte (0x0)
mem_usage : registers
protection : not protected

Registers

IDR

REMAPCON

REMAPBASE

TESTREG

DREQSEL

SBYCON

PMCON

CLKCON

RSTCON

BRMPCON


IDR

-
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IDR IDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRV PID

PRV : -
bits : 0 - 3 (4 bit)
access : read-only

PID : -
bits : 4 - 35 (32 bit)
access : read-only


REMAPCON

-
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

REMAPCON REMAPCON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REMAP REMAP_EN

REMAP : -
bits : 0 - 3 (4 bit)
access : read-write

REMAP_EN : -
bits : 4 - 8 (5 bit)
access : read-write


REMAPBASE

-
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

REMAPBASE REMAPBASE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REMAP_BASE

REMAP_BASE : -
bits : 12 - 41 (30 bit)
access : read-write


TESTREG

-
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TESTREG TESTREG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MOP

MOP : -
bits : 0 - 3 (4 bit)
access : read-write


DREQSEL

-
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DREQSEL DREQSEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DREQ0SEL DREQ1SEL

DREQ0SEL : -
bits : 0 - 3 (4 bit)
access : read-write

DREQ1SEL : -
bits : 8 - 19 (12 bit)
access : read-write


SBYCON

-
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SBYCON SBYCON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HLT DHLT HLTH

HLT : -
bits : 0 - 0 (1 bit)
access : read-write

DHLT : -
bits : 2 - 4 (3 bit)
access : read-write

HLTH : -
bits : 3 - 6 (4 bit)
access : read-write


PMCON

-
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMCON PMCON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UDHEN UDHON LXTHVN

UDHEN : -
bits : 0 - 0 (1 bit)
access : read-write

UDHON : -
bits : 1 - 2 (2 bit)
access : read-write

LXTHVN : -
bits : 2 - 4 (3 bit)
access : read-write


CLKCON

-
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLKCON CLKCON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTM0 CTM1 CTM2 CTM3 CTM4 CTM5 CTM6 CTM7 CFTM0 CFTM1 CFTM2 CFTM3 CSAD CRAD CTM1K CSIO0 CSIOF0 CUA0 CUAF0 CI2C1 CI2CF0 CAES CRND CUSB CLCD CRTC CVLS CDMAC CCMP0 CCMP1

CTM0 : -
bits : 0 - 0 (1 bit)
access : read-write

CTM1 : -
bits : 1 - 2 (2 bit)
access : read-write

CTM2 : -
bits : 2 - 4 (3 bit)
access : read-write

CTM3 : -
bits : 3 - 6 (4 bit)
access : read-write

CTM4 : -
bits : 4 - 8 (5 bit)
access : read-write

CTM5 : -
bits : 5 - 10 (6 bit)
access : read-write

CTM6 : -
bits : 6 - 12 (7 bit)
access : read-write

CTM7 : -
bits : 7 - 14 (8 bit)
access : read-write

CFTM0 : -
bits : 8 - 16 (9 bit)
access : read-write

CFTM1 : -
bits : 9 - 18 (10 bit)
access : read-write

CFTM2 : -
bits : 10 - 20 (11 bit)
access : read-write

CFTM3 : -
bits : 11 - 22 (12 bit)
access : read-write

CSAD : -
bits : 13 - 26 (14 bit)
access : read-write

CRAD : -
bits : 14 - 28 (15 bit)
access : read-write

CTM1K : -
bits : 15 - 30 (16 bit)
access : read-write

CSIO0 : -
bits : 16 - 32 (17 bit)
access : read-write

CSIOF0 : -
bits : 17 - 34 (18 bit)
access : read-write

CUA0 : -
bits : 18 - 36 (19 bit)
access : read-write

CUAF0 : -
bits : 19 - 38 (20 bit)
access : read-write

CI2C1 : -
bits : 20 - 40 (21 bit)
access : read-write

CI2CF0 : -
bits : 21 - 42 (22 bit)
access : read-write

CAES : -
bits : 22 - 44 (23 bit)
access : read-write

CRND : -
bits : 23 - 46 (24 bit)
access : read-write

CUSB : -
bits : 24 - 48 (25 bit)
access : read-write

CLCD : -
bits : 25 - 50 (26 bit)
access : read-write

CRTC : -
bits : 26 - 52 (27 bit)
access : read-write

CVLS : -
bits : 27 - 54 (28 bit)
access : read-write

CDMAC : -
bits : 29 - 58 (30 bit)
access : read-write

CCMP0 : -
bits : 30 - 60 (31 bit)
access : read-write

CCMP1 : -
bits : 31 - 62 (32 bit)
access : read-write


RSTCON

-
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RSTCON RSTCON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RTM0 RTM1 RTM2 RTM3 RTM4 RTM5 RTM6 RTM7 RFTM0 RFTM1 RFTM2 RFTM3 RSAD RRAD RTM1K RSIO0 RSIOF0 RUA0 RUAF0 RI2C1 RI2CF0 RAES RRND RUSB RLCD RRTC RVLS RLLD RDMAC RCMP0 RCMP1

RTM0 : -
bits : 0 - 0 (1 bit)
access : read-write

RTM1 : -
bits : 1 - 2 (2 bit)
access : read-write

RTM2 : -
bits : 2 - 4 (3 bit)
access : read-write

RTM3 : -
bits : 3 - 6 (4 bit)
access : read-write

RTM4 : -
bits : 4 - 8 (5 bit)
access : read-write

RTM5 : -
bits : 5 - 10 (6 bit)
access : read-write

RTM6 : -
bits : 6 - 12 (7 bit)
access : read-write

RTM7 : -
bits : 7 - 14 (8 bit)
access : read-write

RFTM0 : -
bits : 8 - 16 (9 bit)
access : read-write

RFTM1 : -
bits : 9 - 18 (10 bit)
access : read-write

RFTM2 : -
bits : 10 - 20 (11 bit)
access : read-write

RFTM3 : -
bits : 11 - 22 (12 bit)
access : read-write

RSAD : -
bits : 13 - 26 (14 bit)
access : read-write

RRAD : -
bits : 14 - 28 (15 bit)
access : read-write

RTM1K : -
bits : 15 - 30 (16 bit)
access : read-write

RSIO0 : -
bits : 16 - 32 (17 bit)
access : read-write

RSIOF0 : -
bits : 17 - 34 (18 bit)
access : read-write

RUA0 : -
bits : 18 - 36 (19 bit)
access : read-write

RUAF0 : -
bits : 19 - 38 (20 bit)
access : read-write

RI2C1 : -
bits : 20 - 40 (21 bit)
access : read-write

RI2CF0 : -
bits : 21 - 42 (22 bit)
access : read-write

RAES : -
bits : 22 - 44 (23 bit)
access : read-write

RRND : -
bits : 23 - 46 (24 bit)
access : read-write

RUSB : -
bits : 24 - 48 (25 bit)
access : read-write

RLCD : -
bits : 25 - 50 (26 bit)
access : read-write

RRTC : -
bits : 26 - 52 (27 bit)
access : read-write

RVLS : -
bits : 27 - 54 (28 bit)
access : read-write

RLLD : -
bits : 28 - 56 (29 bit)
access : read-write

RDMAC : -
bits : 29 - 58 (30 bit)
access : read-write

RCMP0 : -
bits : 30 - 60 (31 bit)
access : read-write

RCMP1 : -
bits : 31 - 62 (32 bit)
access : read-write


BRMPCON

-
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BRMPCON BRMPCON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PDEN

PDEN : -
bits : 0 - 0 (1 bit)
access : read-write



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