\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
SPI Master Configuration Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
slave_sel : SPI Slave Select
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
three_wire_mode : 3-Wire Mode
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
End of enumeration elements list.
spi_mode : SPI Mode
bits : 4 - 9 (6 bit)
access : read-write
Enumeration:
End of enumeration elements list.
page_size : Page Size
bits : 6 - 13 (8 bit)
access : read-write
Enumeration:
End of enumeration elements list.
sck_hi_clk : SCK High Clocks
bits : 8 - 19 (12 bit)
access : read-write
Enumeration:
End of enumeration elements list.
sck_lo_clk : SCK Low Clocks
bits : 12 - 27 (16 bit)
access : read-write
Enumeration:
End of enumeration elements list.
act_delay : SS Active Timing
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
End of enumeration elements list.
inact_delay : SS Inactive Timing
bits : 18 - 37 (20 bit)
access : read-write
Enumeration:
End of enumeration elements list.
alt_sck_hi_clk : Alt SCK High Clocks
bits : 20 - 43 (24 bit)
access : read-write
Enumeration:
End of enumeration elements list.
alt_sck_lo_clk : Alt SCK Low Clocks
bits : 24 - 51 (28 bit)
access : read-write
Enumeration:
End of enumeration elements list.
SPI Master Special Mode Controls
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ss_sample_mode : SS Sample Mode
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
miso_fc_en : SDIO(1) to SR(0) Mode
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
ss_sa_sdio_out : SDIO Active Output Value
bits : 4 - 11 (8 bit)
access : read-write
Enumeration:
End of enumeration elements list.
ss_sa_sdio_dr_en : SDIO Active Drive Mode
bits : 8 - 19 (12 bit)
access : read-write
Enumeration:
End of enumeration elements list.
SPI Master Interrupt Flags
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
tx_stalled : Transaction Stalled Int Status
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_stalled : Results Stalled Int Status
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_ready : Transaction Ready Int Status
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_done : Results Done Int Status
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_fifo_ae : TXFIFO Almost Empty Int Status
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_fifo_af : RXFIFO Almost Full Int Status
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
End of enumeration elements list.
SPI Master Interrupt Enable/Disable Settings
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
tx_stalled : Transaction Stalled Int Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_stalled : Results Stalled Int Enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_ready : Transaction Ready Int Enable
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_done : Results Done Int Enable
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_fifo_ae : TXFIFO Almost Empty Int Enable
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_fifo_af : RXFIFO Almost Full Int Enable
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Polarity Control for SS and SR Signals
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ss_polarity : SS Signal Polarity
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
End of enumeration elements list.
fc_polarity : SR Signal Polarity [FC Polarity]
bits : 8 - 23 (16 bit)
access : read-write
Enumeration:
End of enumeration elements list.
SPI Master General Control Register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
spi_mstr_en : Enable/Disable SPI Master
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_fifo_en : Transaction FIFO Enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_fifo_en : Results FIFO Enable
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
bit_bang_mode : Bit Bang Mode Enable
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
End of enumeration elements list.
bb_ss_in_out : Bit Bang SS Input/Output
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
End of enumeration elements list.
bb_sr_in : Bit Bang SR Input
bits : 5 - 10 (6 bit)
access : read-only
Enumeration:
End of enumeration elements list.
bb_sck_in_out : Bit Bang SCK Input/Output
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
End of enumeration elements list.
bb_sdio_in : Bit Bang SDIO Input
bits : 8 - 19 (12 bit)
access : read-only
Enumeration:
End of enumeration elements list.
bb_sdio_out : Bit Bang SDIO Output
bits : 12 - 27 (16 bit)
access : read-write
Enumeration:
End of enumeration elements list.
bb_sdio_dr_en : Bit Bang SDIO Drive Enable
bits : 16 - 35 (20 bit)
access : read-write
Enumeration:
End of enumeration elements list.
SPI Master FIFO Control Register
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
tx_fifo_ae_lvl : Transaction FIFO AE Level
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_fifo_used : Transaction FIFO Used
bits : 8 - 20 (13 bit)
access : read-only
Enumeration:
End of enumeration elements list.
rx_fifo_af_lvl : Results FIFO AF Level
bits : 16 - 36 (21 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_fifo_used : Results FIFO Used
bits : 24 - 53 (30 bit)
access : read-only
Enumeration:
End of enumeration elements list.
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