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OTP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

OCNTL

ODATA

CKDIV

ACNTL

OTPRDATA

STAT


OCNTL

OTP Control Register.
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OCNTL OCNTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA RD_OP PROG_OP

PA : This value is the address of the OTP 32-bit value.
bits : 0 - 6 (7 bit)

RD_OP : Setting this bit to a 1 initiates a read of the OTP location specified in the PA field.
bits : 8 - 8 (1 bit)

Enumeration:

0 : no_operation

No Operation.

1 : initiate_read_op

Initiate Read Operation.

End of enumeration elements list.

PROG_OP : Setting this bit to a 1 initiates a write of the OTP location specified in the PA field.
bits : 9 - 9 (1 bit)

Enumeration:

0 : no_operation

No Operation.

1 : initiate_write_op

Initiate Write Operation.

End of enumeration elements list.


ODATA

Write Data Register.
address_offset : 0x30 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODATA ODATA write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OTPDATA

OTPDATA : OTP write data.
bits : 0 - 31 (32 bit)


CKDIV

Clock Divider Register.
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKDIV CKDIV read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CKDIV

CKDIV : The input clock(APB) is divided by this value.
bits : 0 - 1 (2 bit)

Enumeration:

0 : div_by_2

Divide by 2.

1 : div_by_4

Divide by 4.

2 : div_by_8

Divide by 8.

3 : div_by_16

Divide by 16.

End of enumeration elements list.


ACNTL

Access Control Register.
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACNTL ACNTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADATA

ADATA : System Info Block Access Data.
bits : 0 - 31 (32 bit)


OTPRDATA

Read Data Register.
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OTPRDATA OTPRDATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RDATA

RDATA : OTP Data Output from read operation.
bits : 0 - 31 (32 bit)
access : read-only


STAT

OTP Status Register.
address_offset : 0xC Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STAT STAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUSY FAIL

BUSY : This flag indicates whether the OTP controller is currently performing a read or write operation.
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0 : not_busy

OTP controller ready for new operation.

1 : busy

OTP controller busy either programming or reading.

End of enumeration elements list.

FAIL : Description not available.
bits : 1 - 1 (1 bit)

Enumeration:

0 : nfail

No failure.

1 : fail

Failure occurs.

End of enumeration elements list.



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