\n

SIR

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

SISTAT

FSTAT

SFSTAT

ERRADDR


SISTAT

System Initialization Status Register.
address_offset : 0x0 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SISTAT SISTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MAGIC CRCERR

MAGIC : Magic Word Validation. This bit is set by the system initialization block following power-up.
bits : 0 - 0 (1 bit)
access : read-only

Enumeration: ( read )

0 : magicNotSet

Magic word was not set (OTP has not been initialized properly).

1 : magicSet

Magic word was set (OTP contains valid settings).

End of enumeration elements list.

CRCERR : CRC Error Status. This bit is set by the system initialization block following power-up.
bits : 1 - 1 (1 bit)
access : read-only

Enumeration: ( read )

0 : noError

No CRC errors occurred during the read of the OTP memory block.

1 : error

A CRC error occurred while reading the OTP. The address of the failure location in the OTP memory is stored in the ERRADDR register.

End of enumeration elements list.


FSTAT

funcstat register.
address_offset : 0x100 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FSTAT FSTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FPU USB ADC XIP PBM HBC SDHC SMPHR SCACHE

FPU : FPU Function.
bits : 0 - 0 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.

USB : USB Device.
bits : 1 - 1 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.

ADC : 10-bit Sigma Delta ADC.
bits : 2 - 2 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.

XIP : XiP function.
bits : 3 - 3 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.

PBM : PBM function.
bits : 4 - 4 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.

HBC : HBC function.
bits : 5 - 5 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.

SDHC : SDHC function.
bits : 6 - 6 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.

SMPHR : SMPHR function.
bits : 7 - 7 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.

SCACHE : System Cache function.
bits : 8 - 8 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.


SFSTAT

secfuncstat register.
address_offset : 0x104 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SFSTAT SFSTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRNG AES SHA MAA

TRNG : TRNG function.
bits : 2 - 2 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.

AES : AES function.
bits : 3 - 3 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.

SHA : SHA function.
bits : 4 - 4 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.

MAA : MAA function.
bits : 5 - 5 (1 bit)

Enumeration:

0 : no

None

1 : yes

None

End of enumeration elements list.


ERRADDR

Read-only field set by the SIB block if a CRC error occurs during the read of the OTP memory. Contains the failing address in OTP memory (when CRCERR equals 1).
address_offset : 0x4 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ERRADDR ERRADDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERRADDR

ERRADDR :
bits : 0 - 31 (32 bit)



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.