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SMON

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

EXTSCN

DLRTC

SECST

INTSCN

SECALM

SECDIAG


EXTSCN

External Sensor Control Register.
address_offset : 0x0 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EXTSCN EXTSCN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTS_EN0 EXTS_EN1 EXTS_EN2 EXTS_EN3 EXTS_EN4 EXTS_EN5 EXTCNT EXTFRQ DIVCLK BUSY LOCK

EXTS_EN0 : External Sensor Enable for input/output pair 0.
bits : 0 - 0 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

EXTS_EN1 : External Sensor Enable for input/output pair 1.
bits : 1 - 1 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

EXTS_EN2 : External Sensor Enable for input/output pair 2.
bits : 2 - 2 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

EXTS_EN3 : External Sensor Enable for input/output pair 3.
bits : 3 - 3 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

EXTS_EN4 : External Sensor Enable for input/output pair 4.
bits : 4 - 4 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

EXTS_EN5 : External Sensor Enable for input/output pair 5.
bits : 5 - 5 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

EXTCNT : External Sensor Error Counter. These bits set the number of external sensor accepted mismatches that have to occur within a single bit period before an external sensor alarm is triggered.
bits : 16 - 20 (5 bit)

EXTFRQ : External Sensor Frequency. These bits define the frequency at which the external sensors are clocked to/from the EXTS_IN and EXTS_OUT pair.
bits : 21 - 23 (3 bit)

Enumeration:

0 : freq2000Hz

Div 4 (2000Hz).

1 : freq1000Hz

Div 8 (1000Hz).

2 : freq500Hz

Div 16 (500Hz).

3 : freq250Hz

Div 32 (250Hz).

4 : freq125Hz

Div 64 (125Hz).

5 : freq63Hz

Div 128 (63Hz).

6 : freq31Hz

Div 256 (31Hz).

7 : RFU

Reserved. Do not use.

End of enumeration elements list.

DIVCLK : Clock Divide. These bits are used to divide the 8KHz input clock. The resulting divided clock is used for all logic within the Security Monitor Block. Note: If the input clock is divided with these bits, the error count threshold table and output frequency will be affected accordingly with the same divide factor.
bits : 24 - 26 (3 bit)

Enumeration:

0 : div1

Divide by 1 (8000 Hz).

1 : div2

Divide by 2 (4000 Hz).

2 : div4

Divide by 4 (2000 Hz).

3 : div8

Divide by 8 (1000 Hz).

4 : div16

Divide by 16 (500 Hz).

5 : div32

Divide by 32 (250 Hz).

6 : div64

Divide by 64 (125 Hz).

End of enumeration elements list.

BUSY : Busy. This bit is set to 1 by hardware after EXTSCN register is written to. This bit is automatically cleared to 0 after this register information has been transferred to the security monitor domain.
bits : 30 - 30 (1 bit)
access : read-only

Enumeration:

0 : idle

Idle.

1 : busy

Update in Progress.

End of enumeration elements list.

LOCK : Lock Register. Once locked, the EXTSCN register can no longer be modified. Only a battery disconnect will clear this bit. VBAT powers this register.
bits : 31 - 31 (1 bit)

Enumeration:

0 : unlocked

Unlocked.

1 : locked

Locked.

End of enumeration elements list.


DLRTC

DRS Log RTC Value. This register contains the 32 bit value in the RTC second register when the last DRS event occurred.
address_offset : 0x10 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DLRTC DLRTC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DLRTC

DLRTC : DRS Log RTC Value. This register contains the 32 bit value in the RTC second register when the last DRS event occured.
bits : 0 - 31 (32 bit)


SECST

Security Monitor Status Register.
address_offset : 0x34 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SECST SECST read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTSRS INTSRS SECALRS

EXTSRS : External Sensor Control Register Status.
bits : 0 - 0 (1 bit)

Enumeration:

0 : allowed

Access authorized.

1 : notAllowed

Access not authorized.

End of enumeration elements list.

INTSRS : Internal Sensor Control Register Status.
bits : 1 - 1 (1 bit)

Enumeration:

0 : allowed

Access authorized.

1 : notAllowed

Access not authorized.

End of enumeration elements list.

SECALRS : Security Alarm Register Status.
bits : 2 - 2 (1 bit)

Enumeration:

0 : allowed

Access authorized.

1 : notAllowed

Access not authorized.

End of enumeration elements list.


INTSCN

Internal Sensor Control Register.
address_offset : 0x4 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

INTSCN INTSCN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SHIELD_EN TEMP_EN VBAT_EN LOTEMP_SEL VCORELOEN VCOREHIEN VDDLOEN VDDHIEN VGLEN LOCK

SHIELD_EN : Die Shield Enable.
bits : 0 - 0 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

TEMP_EN : Temperature Sensor Enable.
bits : 1 - 1 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

VBAT_EN : Battery Monitor Enable.
bits : 2 - 2 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

LOTEMP_SEL : Low Temperature Detection Select.
bits : 16 - 16 (1 bit)

Enumeration:

0 : neg50C

-50 degrees C.

1 : neg30C

-30 degrees C.

End of enumeration elements list.

VCORELOEN : VCORE Undervoltage Detect Enable.
bits : 18 - 18 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

VCOREHIEN : VCORE Overvoltage Detect Enable.
bits : 19 - 19 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

VDDLOEN : VDD Undervoltage Detect Enable.
bits : 20 - 20 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

VDDHIEN : VDD Overvoltage Detect Enable.
bits : 21 - 21 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

VGLEN : Voltage Glitch Detection Enable.
bits : 22 - 22 (1 bit)

Enumeration:

0 : dis

Disable.

1 : en

Enable.

End of enumeration elements list.

LOCK : Lock Register. Once locked, the INTSCN register can no longer be modified. Only a battery disconnect will clear this bit. VBAT powers this register.
bits : 31 - 31 (1 bit)

Enumeration:

0 : unlocked

Unlocked.

1 : locked

Locked.

End of enumeration elements list.


SECALM

Security Alarm Register.
address_offset : 0x8 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SECALM SECALM read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DRS KEYWIPE SHIELDF LOTEMP HITEMP BATLO BATHI EXTF VDDLO VCORELO VCOREHI VDDHI VGL EXTSTAT0 EXTSTAT1 EXTSTAT2 EXTSTAT3 EXTSTAT4 EXTSTAT5 EXTSWARN0 EXTSWARN1 EXTSWARN2 EXTSWARN3 EXTSWARN4 EXTSWARN5

DRS : Destructive Reset Trigger. Setting this bit will generate a DRS. This bit is self-cleared by hardware.
bits : 0 - 0 (1 bit)

Enumeration:

0 : complete

No operation/complete.

1 : start

Start operation.

End of enumeration elements list.

KEYWIPE : Key Wipe Trigger. Set to 1 to initiate a wipe of the AES key register. It does not reset the part, or log a timestamp. AES and DES registers are not affected by this bit. This bit is automatically cleared to 0 after the keys have been wiped.
bits : 1 - 1 (1 bit)

Enumeration:

0 : complete

No operation/complete.

1 : start

Start operation.

End of enumeration elements list.

SHIELDF : Die Shield Flag.
bits : 2 - 2 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

LOTEMP : Low Temperature Detect.
bits : 3 - 3 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

HITEMP : High Temperature Detect.
bits : 4 - 4 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

BATLO : Battery Undervoltage Detect.
bits : 5 - 5 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

BATHI : Battery Overvoltage Detect.
bits : 6 - 6 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTF : External Sensor Flag. This bit is set to 1 when any of the EXTSTAT bits are set.
bits : 7 - 7 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

VDDLO : VDD Undervoltage Detect Flag.
bits : 8 - 8 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

VCORELO : VCORE Undervoltage Detect Flag.
bits : 9 - 9 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

VCOREHI : VCORE Overvoltage Detect Flag.
bits : 10 - 10 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

VDDHI : VDD Overvoltage Flag.
bits : 11 - 11 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

VGL : Voltage Glitch Detection Flag.
bits : 12 - 12 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSTAT0 : External Sensor 0 Detect. The tamper detect is only active when it is enabled. This bits needs to be cleared in software after a tamper event to re-arm the sensor.
bits : 16 - 16 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSTAT1 : External Sensor 1 Detect. The tamper detect is only active when it is enabled. This bits needs to be cleared in software after a tamper event to re-arm the sensor.
bits : 17 - 17 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSTAT2 : External Sensor 2 Detect. The tamper detect is only active when it is enabled. This bits needs to be cleared in software after a tamper event to re-arm the sensor.
bits : 18 - 18 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSTAT3 : External Sensor 3 Detect. The tamper detect is only active when it is enabled. This bits needs to be cleared in software after a tamper event to re-arm the sensor.
bits : 19 - 19 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSTAT4 : External Sensor 4 Detect. The tamper detect is only active when it is enabled. This bits needs to be cleared in software after a tamper event to re-arm the sensor.
bits : 20 - 20 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSTAT5 : External Sensor 5 Detect. The tamper detect is only active when it is enabled. This bits needs to be cleared in software after a tamper event to re-arm the sensor.
bits : 21 - 21 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSWARN0 : External Sensor 0 Warning Ready flag. The tamper detect warning flags are set, regardless of whether the external sensors are enabled.
bits : 24 - 24 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSWARN1 : External Sensor 1 Warning Ready flag. The tamper detect warning flags are set, regardless of whether the external sensors are enabled.
bits : 25 - 25 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSWARN2 : External Sensor 2 Warning Ready flag. The tamper detect warning flags are set, regardless of whether the external sensors are enabled.
bits : 26 - 26 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSWARN3 : External Sensor 3 Warning Ready flag. The tamper detect warning flags are set, regardless of whether the external sensors are enabled.
bits : 27 - 27 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSWARN4 : External Sensor 4 Warning Ready flag. The tamper detect warning flags are set, regardless of whether the external sensors are enabled.
bits : 28 - 28 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSWARN5 : External Sensor 5 Warning Ready flag. The tamper detect warning flags are set, regardless of whether the external sensors are enabled.
bits : 29 - 29 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.


SECDIAG

Security Diagnostic Register.
address_offset : 0xC Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SECDIAG SECDIAG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BORF SHIELDF LOTEMP HITEMP BATLO BATHI DYNF AESKT EXTSTAT0 EXTSTAT1 EXTSTAT2 EXTSTAT3 EXTSTAT4 EXTSTAT5

BORF : Battery-On-Reset Flag. This bit is set once the back up battery is conneted.
bits : 0 - 0 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

SHIELDF : Die Shield Flag.
bits : 2 - 2 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

LOTEMP : Low Temperature Detect.
bits : 3 - 3 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

HITEMP : High Temperature Detect.
bits : 4 - 4 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

BATLO : Battery Undervoltage Detect.
bits : 5 - 5 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

BATHI : Battery Overvoltage Detect.
bits : 6 - 6 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

DYNF : Dynamic Sensor Flag. This bit is set to 1 when any of the EXTSTAT bits are set.
bits : 7 - 7 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

AESKT : AES Key Transfer. This bit is set to 1 when AES Key has been transferred from the TRNG to the battery backed AES key register. This bit can only be reset by a BOR.
bits : 8 - 8 (1 bit)

Enumeration:

0 : incomplete

Key has not been transferred.

1 : complete

Key has been transferred.

End of enumeration elements list.

EXTSTAT0 : External Sensor 0 Detect.
bits : 16 - 16 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSTAT1 : External Sensor 1 Detect.
bits : 17 - 17 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSTAT2 : External Sensor 2 Detect.
bits : 18 - 18 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSTAT3 : External Sensor 3 Detect.
bits : 19 - 19 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSTAT4 : External Sensor 4 Detect.
bits : 20 - 20 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.

EXTSTAT5 : External Sensor 5 Detect.
bits : 21 - 21 (1 bit)

Enumeration:

0 : noEvent

The event has not occurred.

1 : occurred

The event has occurred.

End of enumeration elements list.



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