SCON

PCKDIV

PERCKCN0

MEMCKCN

MEMZCN

SCCK

MPRI0

MPRI1

RSTR0

SYSST

RSTR1

PERCKCN1

EVTEN

REVISION

SYSSIE

CLKCN

PM

SBUSARB : System bus abritration scheme. These bits are used to select between Fixed-burst abritration and Round-Robin scheme. The Round-Robin scheme is selected by default. These bits are reset by the system reset.
bits : 1 - 2 (2 bit)

Enumeration:

End of enumeration elements list.

FLASH_PAGE_FLIP : Flips the Flash bottom and top halves. (Depending on the total flash size, each half is either 256K or 512K). Initiating a flash page flip will cause a flush of both the data buffer on the DCODE bus and the internal instruction buffer.
bits : 4 - 4 (1 bit)

Enumeration:

End of enumeration elements list.

FPU_DIS : Floating Point Unit Disable
bits : 5 - 5 (1 bit)

Enumeration:

End of enumeration elements list.

CCACHE_FLUSH : Code Cache Flush. This bit is used to flush the code caches and the instruction buffer of the Cortex-M4.
bits : 6 - 6 (1 bit)

Enumeration:

End of enumeration elements list.

SWD_DIS : Serial Wire Debug Disable
bits : 14 - 14 (1 bit)

Enumeration:

End of enumeration elements list.

AONCD : Always-ON(AON) domain CLock Divider. These bits define the AON domain clock divider.
bits : 0 - 1 (2 bit)

Enumeration:

End of enumeration elements list.

GPIO0D : GPIO0 Disable.
bits : 0 - 0 (1 bit)

Enumeration: GPIODisable

End of enumeration elements list.

DMAD : DMA Disable.
bits : 5 - 5 (1 bit)

Enumeration: GPIODisable

End of enumeration elements list.

SPI0D : SPI 0 Disable.
bits : 6 - 6 (1 bit)

Enumeration: GPIODisable

End of enumeration elements list.

SPI1D : SPI 1 Disable.
bits : 7 - 7 (1 bit)

Enumeration: GPIODisable

End of enumeration elements list.

UART0D : UART 0 Disable.
bits : 9 - 9 (1 bit)

Enumeration: GPIODisable

End of enumeration elements list.

UART1D : UART 1 Disable.
bits : 10 - 10 (1 bit)

Enumeration: GPIODisable

End of enumeration elements list.

I2C0D : I2C 0 Disable.
bits : 13 - 13 (1 bit)

Enumeration: GPIODisable

End of enumeration elements list.

T0D : Timer 0 Disable.
bits : 15 - 15 (1 bit)

Enumeration: GPIODisable

End of enumeration elements list.

T1D : Timer 1 Disable.
bits : 16 - 16 (1 bit)

Enumeration: GPIODisable

End of enumeration elements list.

T2D : Timer 2 Disable.
bits : 17 - 17 (1 bit)

Enumeration: GPIODisable

End of enumeration elements list.

I2C1D : I2C 1 Disable.
bits : 28 - 28 (1 bit)

Enumeration: GPIODisable

End of enumeration elements list.

FWS : Flash Wait State. These bits define the number of wait-state cycles per Flash data read access. Minimum wait state is 2.
bits : 0 - 2 (3 bit)

SYSRAM0LS : System RAM 0 Light Sleep Mode.
bits : 8 - 8 (1 bit)

Enumeration:

End of enumeration elements list.

SYSRAM1LS : System RAM 1 Light Sleep Mode.
bits : 9 - 9 (1 bit)

Enumeration:

End of enumeration elements list.

SYSRAM2LS : System RAM 2 Light Sleep Mode.
bits : 10 - 10 (1 bit)

Enumeration:

End of enumeration elements list.

SYSRAM3LS : System RAM 3 Light Sleep Mode.
bits : 11 - 11 (1 bit)

Enumeration:

End of enumeration elements list.

ICACHELS : ICache RAM Light Sleep Mode.
bits : 12 - 12 (1 bit)

Enumeration:

End of enumeration elements list.

SRAM0Z : System RAM Block 0.
bits : 0 - 0 (1 bit)

Enumeration:

End of enumeration elements list.

ICACHEZ : Instruction Cache.
bits : 1 - 1 (1 bit)

Enumeration:

End of enumeration elements list.

DMA : DMA Reset.
bits : 0 - 0 (1 bit)

Enumeration: dma_read ( read )

End of enumeration elements list.

WDT : Watchdog Timer Reset.
bits : 1 - 1 (1 bit)

Enumeration: wdt_read ( read )

End of enumeration elements list.

GPIO0 : GPIO0 Reset. Setting this bit to 1 resets GPIO0 pins to their default states.
bits : 2 - 2 (1 bit)

Enumeration: gpio0_read ( read )

End of enumeration elements list.

TIMER0 : Timer0 Reset. Setting this bit to 1 resets Timer 0 blocks.
bits : 5 - 5 (1 bit)

Enumeration: timer0_read ( read )

End of enumeration elements list.

TIMER1 : Timer1 Reset. Setting this bit to 1 resets Timer 1 blocks.
bits : 6 - 6 (1 bit)

Enumeration: timer1_read ( read )

End of enumeration elements list.

TIMER2 : Timer2 Reset. Setting this bit to 1 resets Timer 2 blocks.
bits : 7 - 7 (1 bit)

Enumeration: timer2_read ( read )

End of enumeration elements list.

UART0 : UART0 Reset. Setting this bit to 1 resets all UART 0 blocks.
bits : 11 - 11 (1 bit)

Enumeration: uart0_read ( read )

End of enumeration elements list.

UART1 : UART1 Reset. Setting this bit to 1 resets all UART 1 blocks.
bits : 12 - 12 (1 bit)

Enumeration: uart1_read ( read )

End of enumeration elements list.

SPI0 : SPI0 Reset. Setting this bit to 1 resets all SPI 0 blocks.
bits : 13 - 13 (1 bit)

Enumeration: spi0_read ( read )

End of enumeration elements list.

SPI1 : SPI1 Reset. Setting this bit to 1 resets all SPI 1 blocks.
bits : 14 - 14 (1 bit)

Enumeration: xpi1_read ( read )

End of enumeration elements list.

I2C0 : I2C0 Reset.
bits : 16 - 16 (1 bit)

Enumeration: i2c0_read ( read )

End of enumeration elements list.

RTC : Real Time Clock Reset.
bits : 17 - 17 (1 bit)

Enumeration: rtc_read ( read )

End of enumeration elements list.

SRST : Soft Reset.Write 1 to perform a Soft Reset. A soft reset performs a Peripheral Reset and also resets the GPIO peripheral but does not reset the CPU or Watchdog Timer.
bits : 29 - 29 (1 bit)

Enumeration: srst_read ( read )

End of enumeration elements list.

PRST : Peripheral Reset. Setting this bit to 1 resets all peripherals. The CPU core, the watchdog timer, and all GPIO pins are unaffected by this reset.
bits : 30 - 30 (1 bit)

Enumeration: prst_read ( read )

End of enumeration elements list.

SYSTEM : System Reset. Setting this bit to 1 resets the CPU core and all peripherals, including the watchdog timer.
bits : 31 - 31 (1 bit)

Enumeration: system_read ( read )

End of enumeration elements list.

ICECLOCK : ARM ICE Lock Status.
bits : 0 - 0 (1 bit)

Enumeration:

End of enumeration elements list.

CODEINTERR : Code Integrity Error Flag. This bit indicates a code integrity error has occured in XiP interface.
bits : 1 - 1 (1 bit)

Enumeration:

End of enumeration elements list.

SCMEMF : System Cache Memory Fault Flag. This bit indicates a memory fault has occured in the System Cache while receiving data from the Hyperbus Interface.
bits : 5 - 5 (1 bit)

Enumeration:

End of enumeration elements list.

I2C1 : I2C1 Reset.
bits : 0 - 0 (1 bit)

Enumeration: reset_read ( read )

End of enumeration elements list.

FLCD : Secure Flash Controller Disable.
bits : 3 - 3 (1 bit)

Enumeration:

End of enumeration elements list.

ICACHED : ICache Clock Disable.
bits : 11 - 11 (1 bit)

Enumeration:

End of enumeration elements list.

DMAEVENT : Enable DMA event. When this bit is set, a DMA event will cause an RXEV event to wake the CPU from WFE sleep mode.
bits : 0 - 0 (1 bit)

RXEVENT : Enable RXEV pin event. When this bit is set, a logic high of GPIO0[24] will cause an RXEV event to wake the CPU from WFE sleep mode.
bits : 1 - 1 (1 bit)

REVISION : Manufacturer Chip Revision.
bits : 0 - 15 (16 bit)

ICEULIE : ARM ICE Unlock Interrupt Enable.
bits : 0 - 0 (1 bit)

Enumeration:

End of enumeration elements list.

CIEIE : Code Integrity Error Interrupt Enable.
bits : 1 - 1 (1 bit)

Enumeration:

End of enumeration elements list.

SCMFIE : System Cache Memory Fault Interrupt Enable.
bits : 5 - 5 (1 bit)

Enumeration:

End of enumeration elements list.

PSC : Prescaler Select. This 3 bit field sets the system operating frequency by controlling the prescaler that divides the output of the PLL0.
bits : 6 - 8 (3 bit)

Enumeration:

End of enumeration elements list.

CLKSEL : Clock Source Select. This 3 bit field selects the source for the system clock.
bits : 9 - 11 (3 bit)

Enumeration:

End of enumeration elements list.

CKRDY : Clock Ready. This read only bit reflects whether the currently selected system clock source is running.
bits : 13 - 13 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

X32K_EN : 32kHz Crystal Oscillator Enable.
bits : 17 - 17 (1 bit)

Enumeration:

End of enumeration elements list.

HIRC_EN : 60MHz High Frequency Internal Reference Clock Enable.
bits : 18 - 18 (1 bit)

Enumeration:

End of enumeration elements list.

X32K_RDY : 32kHz Crystal Oscillator Ready
bits : 25 - 25 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

HIRC_RDY : 60MHz HIRC Ready.
bits : 26 - 26 (1 bit)

Enumeration:

End of enumeration elements list.

LIRC8K_RDY : 8kHz Low Frequency Reference Clock Ready.
bits : 29 - 29 (1 bit)

Enumeration:

End of enumeration elements list.

MODE : Operating Mode. This two bit field selects the current operating mode for the device. Note that code execution only occurs during ACTIVE mode.
bits : 0 - 2 (3 bit)

Enumeration:

End of enumeration elements list.

GPIOWKEN : GPIO Wake Up Enable. This bit enables all GPIO pins as potential wakeup sources. Any GPIO configured for wakeup is capable of causing an exit from IDLE or STANDBY modes when this bit is set.
bits : 4 - 4 (1 bit)

Enumeration:

End of enumeration elements list.

RTCWKEN : RTC Alarm Wake Up Enable. This bit enables RTC alarm as wakeup source. If enabled, the desired RTC alarm must be configured via the RTC control registers.
bits : 5 - 5 (1 bit)

Enumeration:

End of enumeration elements list.

HIRCPD : HIRC Power Down. This bit selects HIRC power state in DEEPSLEEP mode.
bits : 15 - 15 (1 bit)

Enumeration:

End of enumeration elements list.