LP_CTRL

LP_WAKEFL

LPMEMSD

LPWK_EN

RAMRET_SEL0 : System RAM 0 Data retention in BACKUP mode.
bits : 0 - 0 (1 bit)

Enumeration:

End of enumeration elements list.

RAMRET_SEL1 : System RAM 1 Data retention in BACKUP mode.
bits : 1 - 1 (1 bit)

Enumeration:

End of enumeration elements list.

RAMRET_SEL2 : System RAM 2 Data retention in BACKUP mode.
bits : 2 - 2 (1 bit)

Enumeration:

End of enumeration elements list.

RAMRET_SEL3 : System RAM 3 Data retention in BACKUP mode.
bits : 3 - 3 (1 bit)

Enumeration:

End of enumeration elements list.

OVR : Operating Voltage Range
bits : 4 - 5 (2 bit)

Enumeration:

End of enumeration elements list.

VCORE_DET_BYPASS : Bypass V CORE External Supply Detection
bits : 6 - 6 (1 bit)

Enumeration:

End of enumeration elements list.

RETREG_EN : Retention Regulator Enable. This bit controls the retention regulator in BACKUP mode.
bits : 8 - 8 (1 bit)

Enumeration:

End of enumeration elements list.

FAST_WK_EN : Fast Wake-Up Mode. This bit enables fast wake-up from DeepSleep mode.
bits : 10 - 10 (1 bit)

Enumeration:

End of enumeration elements list.

BG_OFF : Band Gap Disable for DEEPSLEEP and BACKUP Mode
bits : 11 - 11 (1 bit)

Enumeration:

End of enumeration elements list.

VCORE_POR_DIS : V CORE POR Disable for DEEPSLEEP and BACKUP Mode
bits : 12 - 12 (1 bit)

Enumeration:

End of enumeration elements list.

LDO_DIS : LDO Disable
bits : 16 - 16 (1 bit)

Enumeration:

End of enumeration elements list.

VCORE_SVM_DIS : V CORE Supply Voltage Monitor Disable
bits : 20 - 20 (1 bit)

Enumeration:

End of enumeration elements list.

VDDIO_POR_DIS : VDDIO Power-On Reset Monitor Disable. This bit controls the Power-On Reset monitor on VDDIO supply in all operating mods.
bits : 25 - 25 (1 bit)

Enumeration:

End of enumeration elements list.

WAKEST : Wakeup IRQ flags (write ones to clear). One or more of these bits will be set when the corresponding dedicated GPIO pin(s) transition(s) from low to high or high to low. If GPIO wakeup source is selected, using PM.GPIOWKEN register, and the corresponding bit is also selected in LPWKEN register, an interrupt will be gnerated to wake up the CPU from a low power mode.
bits : 0 - 13 (14 bit)

SRAM0_OFF : System RAM block 0 Shut Down.
bits : 0 - 0 (1 bit)

Enumeration:

End of enumeration elements list.

SRAM1_OFF : System RAM block 1 Shut Down.
bits : 1 - 1 (1 bit)

Enumeration:

End of enumeration elements list.

SRAM2_OFF : System RAM block 2 Shut Down.
bits : 2 - 2 (1 bit)

Enumeration:

End of enumeration elements list.

SRAM3_OFF : System RAM block 3 Shut Down.
bits : 3 - 3 (1 bit)

Enumeration:

End of enumeration elements list.

WAKEEN : Enable wakeup. These bits allow wakeup from the corresponding GPIO pin(s) on transition(s) from low to high or high to low when PM.GPIOWKEN is set. Wakeup status is indicated in PPWKST register.
bits : 0 - 13 (14 bit)