ISPCON

ISPTRG

DFBADR

FATCON

ISPADR

ISPDAT

ISPCMD

ISPEN : ISP Enable\nThis bit is protected bit. ISP function enable bit. Set this bit to enable ISP function.\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BS : Boot Select This bit is protected bit. Set/clear this bit to select next booting from LDROM/APROM, respectively. This bit also functions as MCU booting status flag, which can be used to check where MCU booted from. This bit is initiated with the inversed value of CBS in Config0 after power-on reset It keeps the same value at other reset.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CFGUEN : Config Update Enable\nWriting this bit to 1 enables s/w to update Config value by ISP procedure regardless of program code is running in APROM or LDROM.\n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LDUEN : LDROM Update Enable\nLDROM update enable bit. \n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ISPFF : ISP Fail Flag\nThis bit is set by hardware when a triggered ISP meets any of the following conditions:\n(1) APROM writes to itself.\n(2) LDROM writes to itself. \n(3) Destination address is illegal, such as over an available range.\nNote: Write 1 to clear this bit to zero.
bits : 6 - 6 (1 bit)
access : read-write

ISPGO : ISP start trigger\nWrite 1 to start ISP operation and this bit will be cleared to 0 by hardware automatically when ISP operation is finish.\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DFBADR : Data Flash Base Address\nThis register indicates data flash start address. It is a read only register.\nFor 8/16/32/64KB flash memory device, the data flash size is 4KB and it start address is fixed at 0x0001_F000 by hardware internally.
bits : 0 - 31 (32 bit)
access : read-only

FPSEN : Flash Power Save Enable\nIf CPU clock is slower than 24 MHz, then s/w can enable flash power saving function \n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FATS : Flash Access Time Window Select\n
bits : 1 - 3 (3 bit)
access : read-write

LFOM : Low Frequency Optimization Mode (write-protection bit)\nWhen chip operation frequency is lower than 25 MHz, chip can work more efficiently by setting this bit to 1\n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ISPADR : ISP Address \nNuMicro M051 series equips with a maximum 16kx32 embedded flash, it supports word program only. ISPADR[1:0] must be kept 00b for ISP operation.
bits : 0 - 31 (32 bit)
access : read-write

ISPDAT : ISP Data Write data to this register before ISP program operation Read data from this register after ISP read operation
bits : 0 - 31 (32 bit)
access : read-write

ISPCMD : ISP Command \n
bits : 0 - 5 (6 bit)
access : read-write