NS_FMC_ISPCTL

NS_FMC_ISPTRG

NS_FMC_ISPADDR

NS_FMC_ISPSTS

NS_FMC_ISPDAT

NS_FMC_ISPCMD

NS_FMC_XOMR0STS

NS_FMC_XOMR1STS

NS_FMC_XOMR2STS

NS_FMC_XOMR3STS

NS_FMC_XOMSTS

ISPEN : ISP Enable Bit (Read Only)\nISP function enable.\nNote: This bit is read only to show ISP function enable.
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

APUEN : APROM Update Enable Bit (Write Protect)\nNote: This bit is write protected. Refer to the SYS_REGLCTL register.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

NS_ISPFF : Non-sec ISP Fail Flag (Write Protect)\nThis bit is set by hardware when a triggered ISP meets any of the following conditions:\nThis bit needs to be cleared by writing 1 to it.\n(1) APROM writes to itself if APUEN is set to 0.\n(2) Page Erase command at LOCK mode with ICE connection\n(3) Erase or Program command at brown-out detected\n(4) Destination address is illegal, such as over an available range.\n(5) Invalid ISP commands\n(6) Read any content of boot loader with ICE connection \n(7) ISP CMD in XOM region, except xom page erase and chksum command\n(8) The wrong setting of page erase ISP CMD in XOM\n(9) Violate XOM setting one time protection\n(10) Page erase ISP CMD in Secure region setting page\n(11) Page erase, mass erase , multi-word program or 64-bit word program in OTP\n(13)NS_ISP Conflict Error\nNote: This bit is write protected. Refer to the SYS_REGLCTL register.
bits : 6 - 6 (1 bit)
access : read-write

NS_INTEN : Non-secure ISP Interuppt Enable Bit\nNote: This bit is write protected. Refer to the SYS_REGLCTL register.Before use INT,user need to clear the INTFLAG(FMC_ISPSTS[24]) make sure INT happen at correct time.
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

NS_ISPGO : Non-sec ISP Start Trigger (Write Protect)\nNote: This bit is write protected. Refer to the SYS_REGLCTL register.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

NS_ISPADDR : Non-sec ISP Address\nThe M2354 series is equipped with embedded Flash. ISPADDR[1:0] must be kept 00 for ISP 32-bit operation.\nFor CRC32 Checksum Calculation command, this field is the Flash starting address for checksum calculation, 2 Kbytes alignment is necessary for CRC32 checksum calculation.\nFor Flash32-bit Program, ISP address needs word alignment (4-byte). For Flash 64-bit Program, ISP address needs double word alignment (8-byte).\nNon-sec ISP address must be active at Non-sec region.
bits : 0 - 31 (32 bit)
access : read-write

NS_ISPBUSY : Non-sec ISP Busy Flag (Read Only)\nWrite 1 to start ISP operation and this bit will be cleared to 0 by hardware automatically when ISP operation is finished.\nThis bit is the mirror of ISPGO(FMC_ISPTRG[0]).
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

NS_ISPFF : Non-sec ISP Fail Flag (Write Protect)\nThis bit is set by hardware when a triggered ISP meets any of the following conditions:\nThis bit needs to be cleared by writing 1 to it.\n(1) APROM writes to itself if APUEN is set to 0.\n(2) Page Erase command at LOCK mode with ICE connection\n(3) Erase or Program command at brown-out detected\n(4) Destination address is illegal, such as over an available range.\n(5) Invalid ISP commands\n(6) Read any content of boot loader with ICE connection \n(7) ISP CMD in XOM region, except xom page erase and chksum command\n(8) The wrong setting of page erase ISP CMD in XOM\n(9) Violate XOM setting one time protection\n(10) Page erase ISP CMD in Secure region setting page\n(11) Page erase, mass erase , multi-word program or 64-bit word program in OTP\nNote: This bit is write protected. Refer to the SYS_REGLCTL register.
bits : 6 - 6 (1 bit)
access : read-write

ALLONE : Flash All-one Verification Flag \nThis bit is set by hardware if all of Flash bits are 1, and clear if Flash bits are not all 1 after 'Run Flash All-One Verification' complete; this bit also can be clear by writing 1
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

NSINTFLAG : Non-sec ISP Interuppt Flag\nNote: This function needs to be enabled by Non-secure FMC_ISPCTRL[24].
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

NSISPCER : Non-secure ISP Conflict Error\nThis bit shows when FMC is doing ISP operation.User can not access NS_FMC_ISP_ADDR,NS_FMC_ISPDAT,NS_FMC_ISPCMD,NS_FMC_ISPTRG. It would cause ISPFF.
bits : 28 - 28 (1 bit)
access : read-write

NS_ISPDAT : Non-sec ISP Data\nWrite data to this register before ISP program operation.\nRead data from this register after ISP read operation.
bits : 0 - 31 (32 bit)
access : read-write

NS_CMD : Non-sec ISP Command\nISP command table is shown below:\nThe other commands are invalid.
bits : 0 - 6 (7 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SIZE : XOM Region 0 Size (Page-aligned)\nSIZE is the page number of XOM Region 0.
bits : 0 - 7 (8 bit)
access : read-only

BASE : XOM Region 0 Base Address (Page-aligned)\nBASE is the base address of XOM Region 0.
bits : 8 - 31 (24 bit)
access : read-only

SIZE : XOM Region 1 Size (Page-aligned)\nSIZE is the page number of XOM Region 1.
bits : 0 - 7 (8 bit)
access : read-only

BASE : XOM Region 1 Base Address (Page-aligned)\nBASE is the base address of XOM Region 1.
bits : 8 - 31 (24 bit)
access : read-only

SIZE : XOM Region 2 Size (Page-aligned)\nSIZE is the page number of XOM Region 2.
bits : 0 - 7 (8 bit)
access : read-only

BASE : XOM Region 2 Base Address (Page-aligned)\nBASE is the base address of XOM Region 2.
bits : 8 - 31 (24 bit)
access : read-only

SIZE : XOM Region 3 Size (Page-aligned)\nSIZE is the page number of XOM Region 3.
bits : 0 - 7 (8 bit)
access : read-only

BASE : XOM Region 3 Base Address (Page-aligned)\nBASE is the base address of XOM Region 3.
bits : 8 - 31 (24 bit)
access : read-only

XOMR0ON : XOM Region 0 On\nXOM Region 0 active status.
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

XOMR1ON : XOM Region 1 On\nXOM Region 1 active status.
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

XOMR2ON : XOM Region 2 On\nXOM Region 2 active status.
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

XOMR3ON : XOM Region 3 On\nXOM Region 3 active status.
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

XOMPEF : XOM Page Erase Function Fail\nXOM page erase function status. If XOMPEF is set to 1, user needs to erase XOM region again.
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.