TAMP_INIT

TAMP_EVSTS

TAMP_LIRCTL

TAMP_TIOCTL

TAMP_SEED

TAMP_SEED2

TAMP_ACTSTIOCTL1

TAMP_ACTSTIOCTL2

TAMP_CDBR

TAMP_PWRG

TAMP_PWRGEV

TAMP_LDOTRIM

TAMP_LBSTRIM

TAMP_FUNEN

TAMP_TRIEN

TAMP_INTEVEN

TCORERST : TAMPER Core Reset
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TLDORDY : TLDO Power Ready (Read Only)
bits : 31 - 31 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

TAMP0IF : Tamper 0 Event Flag\nNote: Write 1 to clear this bit.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP1IF : Tamper 1 Event Flag\nNote: Write 1 to clear this bit.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP2IF : Tamper 2 Event Flag\nNote: Write 1 to clear this bit.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP3IF : Tamper 3 Event Flag\nNote: Write 1 to clear this bit.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP4IF : Tamper 4 Event Flag\nNote: Write 1 to clear this bit.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP5IF : Tamper 5 Event Flag\nNote: Write 1 to clear this bit.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CLKFAIL : LXT Clock Frequency Monitor Fail Event Flag\nNote 1: Write 1 to clear the bit to 0.\nNote 2: LXT detector will automatic disable when Fail/Stop flag rise, resume after Fail/Stop flag clear.
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CLKSTOP : LXT Clock Frequency Monitor Stop Event Flag\nNote 1: Write 1 to clear the bit to 0.\nNote 2: LXT detector will automatic disable when Fail/Stop flag rise, resume after Fail/Stop flag clear.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OVPOUT : CORE SB over Voltage Event Flag
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PWRPEV : Power Glitch Postivie Dection Flag
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PWRNEV : Power Glitch Negative Dection Flag
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACTSEF : Active Shield Event Dection Flag
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RTCLVR : RTC Low Voltage Dection Event Bit
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RIOTRIG : RTC Tamper IO Event Flag
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RCLKTRIG : RTC Clock Monitor Detection Event Bit
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HXTERR : Core HXT Error Event Flag
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

VBATLOSS : RTC VBAT LOSS Dection Event Bit
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SECWDT : Security Watch Dog Event Bit\nNote: Write 1 to clear this bit.
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TLDOBOD : Tamper LDO BOD Event Bit
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACTST1IF : Active Shield Tamper 1 Event Flag\nNote: Write 1 to clear this bit.
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACTST3IF : Active Shield Tamper 3 Event Flag\nNote: Write 1 to clear this bit.
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACTST21IF : 2th Active Shield Tamper 1 Event Flag\nNote: Write 1 to clear this bit.
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACTST23IF : 2th Active Shield Tamper 3 Event Flag\nNote: Write 1 to clear this bit.
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TLRCTRIM : Tamper TLIRC32K Trim Value\nTLIRC32K trim value setting
bits : 0 - 8 (9 bit)
access : read-write

TRIMMOS : Tamper TLIRC32K Trim MOS Value\nTLIRC32K trim MOS value setting
bits : 9 - 10 (2 bit)
access : read-write

CKSEL12M : Tamper Clock Selection Bit
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DYN1ISS : Dynamic Pair 1 Input Source Select\nThis bit determines Tamper 3 input is from Tamper 2 or Tamper 0 in dynamic mode.\nNote: This bit is effective only when DYNPR1EN (TAMP_TIOCTL[23]) and DYNPR0EN (TAMP_TIOCTL[15]) are set.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DYN2ISS : Dynamic Pair 2 Input Source Select\nThis bit determines Tamper 5 input is from Tamper 4 or Tamper 0 in dynamic mode.\nNote: This bit has effect only when DYNPR2EN (TAMP_TIOCTL[31]) and DYNPR0EN (TAMP_TIOCTL[15]) are set.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DYNSRC : Dynamic Reference Pattern\nThis field determines the new reference pattern when current pattern run out in dynamic pair mode.\nNote: After this bit is modified, the SEEDRLD (TAMP_TIOCTL[4]) should be set.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SEEDRLD : Reload New Seed for PRNG Engine\nSetting this bit, the tamper configuration will be reload.\nNote 1: Before this bit is set, the tamper configuration should be set to complete and this bit will be auto clear to 0 after reload new seed completed.\nNote 2: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DYNRATE : Dynamic Change Rate\nThis item is choice the dynamic tamper output change rate.\nNote: After revising this field, setting SEEDRLD (TAMP_TIOCTL[4]) can reload change rate immediately.
bits : 5 - 7 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP0EN : Tamper0 Detect Enable Bit\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP0LV : Tamper 0 Level\nThis bit depends on level attribute of tamper pin for static tamper detection.
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP0DBEN : Tamper 0 De-bounce Enable Bit
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP1EN : Tamper 1 Detect Enable Bit\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP1LV : Tamper 1 Level\nThis bit depends on level attribute of tamper pin for static tamper detection.
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP1DBEN : Tamper 1 De-bounce Enable Bit
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DYNPR0EN : Dynamic Pair 0 Enable Bit
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP2EN : Tamper 2 Detect Enable Bit\nNote: The reference is RTC-clock. Tamper detector need sync 2 ~ 3 RTC-clock.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP2LV : Tamper 2 Level\nThis bit depends on level attribute of tamper pin for static tamper detection.
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP2DBEN : Tamper 2 De-bounce Enable Bit
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP3EN : Tamper 3 Detect Enable Bit\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP3LV : Tamper 3 Level\nThis bit depends on level attribute of tamper pin for static tamper detection.
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP3DBEN : Tamper 3 De-bounce Enable Bit
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DYNPR1EN : Dynamic Pair 1 Enable Bit
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP4EN : Tamper4 Detect Enable Bit\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP4LV : Tamper 4 Level\nThis bit depends on level attribute of tamper pin for static tamper detection.
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP4DBEN : Tamper 4 De-bounce Enable Bit
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP5EN : Tamper 5 Detect Enable Bit\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP5LV : Tamper 5 Level\nThis bit depends on level attribute of tamper pin for static tamper detection.
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP5DBEN : Tamper 5 De-bounce Enable Bit
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DYNPR2EN : Dynamic Pair 2 Enable Bit
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SEED : Seed value.
bits : 0 - 31 (32 bit)
access : read-write

SEED2 : Seed value These seed value are used for 2nd active shield I/O.
bits : 0 - 31 (32 bit)
access : read-write

ADYN1ISS : Active Shied Dynamic Pair 1 Input Source Select\nThis bit determines Tamper 3 input is from Tamper 2 or Tamper 0 in dynamic mode.\nNote: This bit is effective only when ADYNPR1EN (TAMP_ACTSTIOCTL1[23]) and ADYNPR0EN (TAMP_ACTSTIOCTL1[15]) are set.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADYNSRC : Active Shied Dynamic Reference Pattern\nThis field determines the new reference pattern when current pattern run out in dynamic pair mode.\nNote: After this bit is modified, the SEEDRLD (TAMP_TIOCTL[4]) should be set.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADYNRATE : Active Shied Dynamic Change Rate\nThis item is choice the dynamic tamper output change rate.\nNote: After revising this field, setting SEEDRLD (TAMP_TIOCTL[4]) can reload change rate immediately.
bits : 5 - 7 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ATAMP0EN : Active Shied Tamper0 Detect Enable Bit\nNote: The reference is RTC-clock. Tamper detector need sync 2 ~ 3 RTC-clock.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ATAMP1EN : Active Shied Tamper 1 Detect Enable Bit\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADYNPR0EN : Active Shied Dynamic Pair 0 Enable Bit
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ATAMP2EN : Active Shied Tamper 2 Detect Enable Bit\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ATAMP3EN : Active Shied Tamper 3 Detect Enable Bit\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADYNPR1EN : Active Shied Dynamic Pair 1 Enable Bit
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADYN1ISS2 : Active Shied Dynamic Pair 1 Input Source Select 2\nThis bit determines Tamper 3 input is from Tamper 2 or Tamper 0 in dynamic mode.\nNote: This bit is effective only when ADYNPR1EN2 (TAMP_ACTSTIOCTL2[23]) and ADYNPR0EN2 (TAMP_ACTSTIOCTL2[15]) are set.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADYNSRC2 : Active Shied Dynamic Reference Pattern 2\nThis field determines the new reference pattern when current pattern run out in dynamic pair mode.\nNote: After this bit is modified, the SEEDRLD2 (TAMP_ACTSTIOCTL2[4]) should be set.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SEEDRLD2 : Reload New Seed for PRNG Engine 2\nSetting this bit, the tamper configuration will be reload.\nNote 1: Before this bit is set, the tamper configuration should be set to complete and this bit will be auto clear to 0 after reload new seed completed.\nNote 2: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADYNRATE2 : Active Shied Dynamic Change Rate 2\nThis item is choice the dynamic tamper output change rate.\nNote: After revising this field, setting SEEDRLD2 (TAMP_ACTSTIOCTL2[4]) can reload change rate immediately.
bits : 5 - 7 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ATAMP0EN2 : Active Shied Tamper0 Detect Enable Bit 2\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ATAMP1EN2 : Active Shied Tamper 1 Detect Enable Bit 2\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADYNPR0EN2 : Active Shied Dynamic Pair 0 Enable Bit 2
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ATAMP2EN2 : Active Shied Tamper 2 Detect Enable Bit 2\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ATAMP3EN2 : Active Shied Tamper 3 Detect Enable Bit 2\nNote: The reference is RTC-clock. Tamper detector needs sync 2 ~ 3 RTC-clock.
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADYNPR1EN2 : Active Shied Dynamic Pair 1 Enable Bit 2
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

STOPBD : LXT Clock Frequency Detector Stop Boundary\nThe bits define the stop value of frequency monitor window.\nWhen LXT frequency monitor counter lower than Clock Frequency Detector Stop Boundary, the LXT frequency detect stop interrupt flag will set to 1.\nNote: The boundary is defined as the maximun value of LXT among 256 TAMPER clock time.
bits : 0 - 7 (8 bit)
access : read-write

FAILBD : LXT Clock Frequency Detector Fail Boundary\nThe bits define the fail value of frequency monitor window.\nWhen LXT frequency monitor counter lower than Clock Frequency Detector Fail Boundary, the LXT frequency detect fail interrupt flag will set to 1.\nNote: The boundary is defined as the minimun value of LXT among 256 TAMPER clock time.
bits : 16 - 23 (8 bit)
access : read-write

PCLKSEL : Postive Clock Trim Range\nThe setting value of the postive clock tolerance.\nOne step is about 2.5% tolerance. The maximun tolerance is 20%.
bits : 0 - 3 (4 bit)
access : read-write

NCLKSEL : Negative Clock Trim Range\nThe setting value of the negative clock tolerance.\nOne step is about 2.5% tolerance. The maximun tolerance is 20%.
bits : 4 - 7 (4 bit)
access : read-write

PDATSEL : Postive Data Trim Range\nThe setting value of the postive data tolerance.\nOne step is about 2.5% tolerance. The maximun tolerance is 20%.
bits : 8 - 11 (4 bit)
access : read-write

NDATSEL : Negative Data Trim Range\nThe setting value of the negative data tolerance.\nOne step is about 2.5% tolerance. The maximun tolerance is 20%.
bits : 12 - 15 (4 bit)
access : read-write

PWRECNTP : Postive Power Glitch Error Tolerance\nThe value indicates the tolerance count for postive power glitch event.
bits : 0 - 7 (8 bit)
access : read-write

PWRECNTN : Negative Power Glitch Error Tolerance\nThe value indicates the tolerance count for negative power glitch event.
bits : 8 - 15 (8 bit)
access : read-write

TLDOTRIM : TLDO Output Votlage Trim\nThe value indicates the trim value of the TLDO output voltage.
bits : 0 - 3 (4 bit)
access : read-write

TLDOIQSEL : TLDO Qu Current Selection\nIndicates the Qu current selection of TLDO.
bits : 8 - 9 (2 bit)
access : read-write

TLVDSEL : Under-shoot Detect Level Trim Bits\nThe value indicates the trim value of the under-shoot detection level
bits : 0 - 2 (3 bit)
access : read-write

TOVDSEL : Over-shoot Detect Level Trim Bits\nThe value indicates the trim value of the over-shoot detection level
bits : 4 - 4 (1 bit)
access : read-write

BSCMPLV : Under-shoot Detect Comparator Current Trim Bits\nThe value indicates the trim value of the under-shoot detection comparator current trim level
bits : 8 - 9 (2 bit)
access : read-write

BSCMPOV : Over-shoot Detect Comparator Current Trim Bits\nThe value indicates the trim value of the over-shoot detection comparator current trim level
bits : 10 - 11 (2 bit)
access : read-write

HYSCMPLV : Under-shoot Detect Comparator Hysteresis Trim Bits\nThe value indicates the trim value of the under-shoot detection comparator of hystersis trim level
bits : 12 - 13 (2 bit)
access : read-write

HYSCMPOV : Over-shoot Detect Comparator Hysteresis Trim Bits\nThe value indicates the trim value of the over-shoot detection comparator of hystersis trim level
bits : 14 - 15 (2 bit)
access : read-write

LXTDETEN : LXT Clock Detection Enable Bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HXTDETEN : HXT Detection Enable Bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMPIOSEL : Tamper IO Dection Selection Bit
bits : 8 - 13 (6 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HIRC12MEN : HIRC12M Enable Bit\nThe HIRC12M is disable when theses bits equal 0x5a, otherwise it will be enable with any other values.
bits : 16 - 23 (8 bit)
access : read-write

FMCTRIGEN : FMC Trigger Enable Bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

KSTRIGEN : Key Store Trigger Enable Bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WakeupEN : Wakeup Enable Bit
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP0EN : Tamper 0 Event Enable Bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP1EN : Tamper 1 or Pair 0 Event Enable Bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP2EN : Tamper 2 Event Enable Bit
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP3EN : Tamper 3 or Pair 1 Event Enable Bit
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP4EN : Tamper 4 Event Enable Bit
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TAMP5EN : Tamper 5 or Pair 2 Event Enable Bit
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CLKFEN : LXT Clock Frequency Monitor Fail Event Enable Bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CLKSTOPEN : LXT Clock Frequency Monitor Stop Event Enable Bit
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OVPEN : CORE_S over Voltage Protect Detection Enable Bit\nNote: The function enable of the over voltage detection is defined in GMISC.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PWRPEN : Power Glitch Postivie Dection Event Enable Bit
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PWRNEN : Power Glitch Negative Dection Event Enable Bit
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACTSEN : Active Shiled Event Enable Bit
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RTCLVREN : RTC Low Voltage Dection Event Enable Bit
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RTCIOEN : RTC Tamper IO Event Enable Bit
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RTCLKEN : RTC Clock Monitor Detection Event Enable Bit
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HXTERREN : Core HXT Error Event Enable Bit
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

VLOSSEN : VBAT Power Loss Event Enable Bit
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDTEN : Watch Dog Event Enable Bit\nNote: If there is WDT event, it can be used to enable to tamper trigger fucntion when the enable bit is set to 1.
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BODEN : BOD Event Enable Bit
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.