\n
address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x20 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x30 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x50 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x60 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x3C Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
Camera Capture Interface Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCAPEN : Camera Capture Interface Enable Bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Camera Capture Interface Disabled
#1 : 1
Camera Capture Interface Enabled
End of enumeration elements list.
PKTEN : Packet Output Enable Bit
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Packet output Disabled
#1 : 1
Packet output Enabled
End of enumeration elements list.
MONO : Monochrome CMOS Sensor Select
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Color CMOS Sensor
#1 : 1
Monochrome CMOS Sensor. The U/V components are ignored when the MONO is enabled
End of enumeration elements list.
SHUTTER : Camera Capture Interface Automatically Disable the Capture Inteface After a Frame Had Been Captured
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Shutter Disabled
#1 : 1
Shutter Enabled
End of enumeration elements list.
MY4_SWAP : Monochrome CMOS Sensor 4-bit Data Nibble Swap
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
The 4-bit data input sequence: 1st Pixel is for 1st Nibble (1st pixel @MSB)
#1 : 1
The 4-bit data input sequence: 1st Pixel is for 2nd Nibble (1st pixel @LSB)
End of enumeration elements list.
MY8_MY4 : Monochrome CMOS Sensor Data I/O Interface
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Monochrome CMOS sensor is by the 4-bit data I/O interface
#1 : 1
Monochrome CMOS sensor is by the 8-bit data I/O interface
End of enumeration elements list.
Luma_Y_One : Color/Monochrome CMOS Sensor Luminance 8-bit Y to 1-bit Y Conversion\nNote: Color CMOS sensor U/V components are ignored when the Luma_Y_One is enabled.
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
Color/Monochrome CMOS sensor Luma-Y-One bit Disabled
#1 : 1
Color/Monochrome CMOS sensor Luma-Y-One bit Enabled
End of enumeration elements list.
UPDATE : Update Register at New Frame
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
Update register at new frame Disabled
#1 : 1
Update register at new frame Enabled (auto cleared to 0 when register updated)
End of enumeration elements list.
VPRST : Capture Interface Reset
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Capture interface reset Disabled
#1 : 1
Capture interface reset Enabled
End of enumeration elements list.
Cropping Window Starting Address Register
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CWSADDRH : Cropping Window Horizontal Starting Address\nSpecify the value of the cropping window horizontal start address.
bits : 0 - 11 (12 bit)
access : read-write
CWSADDRV : Cropping Window Vertical Starting Address\nSpecify the value of the cropping window vertical start address.
bits : 16 - 26 (11 bit)
access : read-write
Cropping Window Size Register
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CWW : Cropping Window Width\nSpecify the size of the cropping window width.
bits : 0 - 11 (12 bit)
access : read-write
CWH : Cropping Window Height\nSpecify the size of the cropping window height.
bits : 16 - 26 (11 bit)
access : read-write
Packet Scaling Vertical/Horizontal Factor Register (LSB)
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PKTSHML : Packet Scaling Horizontal Factor m (Lower 8-bit)\nSpecify the lower 8-bit of denominator part (M) of the horizontal scaling factor.\nThe lower 8-bit will be cascaded with higher 8-bit (PKDSHMH) to form a 16-bit denominator (M) of vertical factor.\nThe output image width will be equal to the image width * N/M.\nNote: The value of N must be equal to or less than M.
bits : 0 - 7 (8 bit)
access : read-write
PKTSHNL : Packet Scaling Horizontal Factor n (Lower 8-bit)\nSpecify the lower 8-bit of numerator part (N) of the horizontal scaling factor.\nThe lower 8-bit will be cascaded with higher 8-bit (PKDSHNH) to form a 16-bit numerator of horizontal factor.
bits : 8 - 15 (8 bit)
access : read-write
PKTSVML : Packet Scaling Vertical Factor m (Lower 8-bit)\nSpecify the lower 8-bit of denominator part (M) of the vertical scaling factor.\nThe lower 8-bit will be cascaded with higher 8-bit (PKDSVMH) to form a 16-bit denominator (M) of vertical factor.\nThe output image width will be equal to the image height * N/M.\nNote: The value of N must be equal to or less than M.
bits : 16 - 23 (8 bit)
access : read-write
PKTSVNL : Packet Scaling Vertical Factor n (Lower 8-bit)\nSpecify the lower 8-bit of numerator part (N) of the vertical scaling factor. \nThe lower 8-bit will be cascaded with higher 8-bit (PKDSVNH) to form a 16-bit numerator of vertical factor.
bits : 24 - 31 (8 bit)
access : read-write
Scaling Frame Rate Factor Register
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FRM : Scaling Frame Rate Factor M\nSpecify the denominator part (M) of the frame rate scaling factor.\nThe output image frame rate will be equal to input image frame rate * (N/M).\nNote: The value of N must be equal to or less than M.
bits : 0 - 5 (6 bit)
access : read-write
FRN : Scaling Frame Rate Factor n\nSpecify the denominator part (N) of the frame rate scaling factor.
bits : 8 - 13 (6 bit)
access : read-write
Frame Output Pixel Stride Width Register
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PKTSTRIDE : Packet Frame Output Pixel Stride Width\nThe output pixel stride size of the packet pipe.\nIt is a 32-pixel aligned stride width for the Luma-Y-One bit format or a 4-pixel aligned stride with for the Luma-Y-Eight bit format when color or monochrome CMOS sensors used. This means that every new captured line is by word alignment address when color or monochrome CMOS sensors used.
bits : 0 - 13 (14 bit)
access : read-write
FIFO Threshold Register
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PKTFTH : Packet FIFO Threshold\nSpecify the 5-bit value of the packet FIFO threshold.
bits : 24 - 28 (5 bit)
access : read-write
OVF : FIFO Overflow Flag\nIndicate the FIFO overflow flag.
bits : 31 - 31 (1 bit)
access : read-write
Camera Capture Interface Parameter Register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INFMT : Sensor Input Data Format
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
YCbCr422
#1 : 1
RGB565
End of enumeration elements list.
SENTYPE : Sensor Input Type
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
CCIR601
#1 : 1
CCIR656, Vsync Hsync embedded in the data signal
End of enumeration elements list.
INDATORD : Sensor Input Data Order\nSensor input data (Byte 1) is {B[4:0], G[5:3]}.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
#00 : 0
Sensor input data (Byte 0 1 2 3) is Y0 U0 Y1 V0.\nSensor input data (Byte 0) is {R[4:0],G[5:3]},
#01 : 1
Sensor input data (Byte 0 1 2 3) is Y0 V0 Y1 U0.\nSensor input data (Byte 0) is {B[4:0],G[5:3]},
#10 : 2
Sensor input data (Byte 0 1 2 3) is U0 Y0 V0 Y1.\nSensor input data (Byte 0) is {G[2:0],B[4:0]},
#11 : 3
Sensor input data (Byte 0 1 2 3) is V0 Y0 U0 Y1.\nSensor input data (Byte 0) is {G[2:0],R[4:0]},
End of enumeration elements list.
OUTFMT : Image Data Format Output to System Memory
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
#00 : 0
YCbCr422
#01 : 1
Only output Y. (Select this format when CCAP_CTL 'Luma_Y_One' or 'MONO' enabled)
#10 : 2
RGB555
#11 : 3
RGB565
End of enumeration elements list.
RANGE : Scale Input YUV CCIR601 Color Range to Full Range
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Default
#1 : 1
Scale to full range
End of enumeration elements list.
PLNFMT : Planar Output YUV Format
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
YUV422
#1 : 1
YUV420
End of enumeration elements list.
PCLKP : Sensor Pixel Clock Polarity
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Input video data and signals are latched by falling edge of Pixel Clock
#1 : 1
Input video data and signals are latched by rising edge of Pixel Clock
End of enumeration elements list.
HSP : Sensor Hsync Polarity
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Sync Low
#1 : 1
Sync High
End of enumeration elements list.
VSP : Sensor Vsync Polarity
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
Sync Low
#1 : 1
Sync High
End of enumeration elements list.
FBB : Field by Blank (Only in Ccir-656 Mode)\nField by Blank means blanking pixel data(0x80108010) have to transfer to system memory or not
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Field by blank Disabled.(blank pixel data will transfer to system memory)
#1 : 1
Field by blank Enabled. (only active data will transfer to system memory)
End of enumeration elements list.
Compare Memory Base Address Register
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMPADDR : Compare Memory Base Address\nIt is a word alignment address, that is, the address is aligned by ignoring the 2 LSB bits [1:0].
bits : 0 - 31 (32 bit)
access : read-write
Luminance Y8 to Y1 Threshold Value Register
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LUMA_Y1_THRESH : Luminance Y8 to Y1 Threshold Value\nSpecify the 8-bit threshold value for the luminance Y bit-8 to the luminance Y 1-bit conversion.
bits : 0 - 7 (8 bit)
access : read-write
Packet Scaling Vertical/Horizontal Factor Register (MSB)
address_offset : 0x48 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PKTSHMH : Packet Scaling Horizontal Factor m (Higher 8-bit)\nSpecify the lower 8-bit of denominator part (M) of the horizontal scaling factor.\nPlease refer to the register 'CCAP_PKTSL' for the detailed operation.
bits : 0 - 7 (8 bit)
access : read-write
PKTSHNH : Packet Scaling Horizontal Factor n (Higher 8-bit)\nSpecify the lower 8-bit of numerator part (N) of the horizontal scaling factor.\nPlease refer to the register 'CCAP_PKTSL' for the detailed operation.
bits : 8 - 15 (8 bit)
access : read-write
PKTSVMH : Packet Scaling Vertical Factor m (Higher 8-bit)\nSpecify the lower 8-bit of denominator part (M) of the vertical scaling factor.\nPlease refer to the register 'CCAP_PKTSL' to check the cooperation between these two registers.
bits : 16 - 23 (8 bit)
access : read-write
PKTSVNH : Packet Scaling Vertical Factor n (Higher 8-bit)\nSpecify the higher 8-bit of numerator part (N) of the vertical scaling factor. \nPlease refer to the register 'CCAP_PKTSL' to check the cooperation between these two registers.
bits : 24 - 31 (8 bit)
access : read-write
Current Packet System Memory Address Register
address_offset : 0x50 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CURADDR : Current Packet Output Memory Address\nSpeficy the 32-bit value of the current packet output memory address.
bits : 0 - 31 (32 bit)
access : read-only
System Memory Packet Base Address 0 Register
address_offset : 0x60 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BASEADDR : System Memory Packet Base Address 0\nIt is a word alignment address, that is, the address is aligned by ignoring the 2 LSB bits [1:0].
bits : 0 - 31 (32 bit)
access : read-write
Camera Capture Interface Interrupt Register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VINTF : Video Frame End Interrupt\nNote: This bit is cleared by writing 1 to it.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Did not receive a frame completely
#1 : 1
Received a frame completely
End of enumeration elements list.
MEINTF : Bus Master Transfer Error Interrupt\nNote: This bit is cleared by writing 1 to it.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Transfer Error did not occur
#1 : 1
Transfer Error occurred
End of enumeration elements list.
ADDRMINTF : Memory Address Match Interrupt\nNote: This bit is cleared by writing 1 to it.
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Memory Address Match Interrupt did not occur
#1 : 1
Memory Address Match Interrupt occurred
End of enumeration elements list.
VIEN : Video Frame End Interrupt Enable Bit
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Video frame end interrupt Disabled
#1 : 1
Video frame end interrupt Enabled
End of enumeration elements list.
MEIEN : Bus Master Transfer Error Interrupt Enable Bit
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Bus Master Transfer error interrupt Disabled
#1 : 1
Bus Master Transfer error interrupt Enabled
End of enumeration elements list.
ADDRMIEN : Address Match Interrupt Enable Bit
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
Address match interrupt Disabled
#1 : 1
Address match interrupt Enabled
End of enumeration elements list.
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