Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
Watchdog Timer Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WTR : Clear Watchdog Timer\nSet this bit will clear the Watchdog Timer.\nNote: This bit will be automatically cleared after a few clock cycles.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
No effect
#1 : 1
The contents of the Watchdog Timer Reset
End of enumeration elements list.
WTRE : Watchdog Timer Reset Enable\nSetting this bit will enable the Watchdog Timer Reset function.\n
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer reset function Disabled
#1 : 1
Watchdog Timer reset function Enabled
End of enumeration elements list.
WTRF : Watchdog Timer Reset Flag\nWhen the Watchdog Timer initiates a reset, the hardware will set this bit. This flag can be read by software to determine the source of reset. Software is responsible to clear it manually by writing 1 to it. If WTRE is disabled, then the Watchdog Timer has no effect on this bit.\nNote: Software can write 1 to clear this bit.
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer reset does not occur
#1 : 1
Watchdog Timer reset occurs
End of enumeration elements list.
WTIF : Watchdog Timer Interrupt Flag\nIf the Watchdog Timer interrupt is Enabled, hardware will set this bit to indicate that the Watchdog Timer interrupt has occurred.\nNote: Software can write 1 to clear this bit.
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer interrupt does not occur
#1 : 1
Watchdog Timer interrupt occurs
End of enumeration elements list.
WTWKE : Watchdog Timer Wake-up Function Enable bit\n
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer Wake-up CPU function Disabled
#1 : 1
Wake-up function Enabled so that Watchdog Timer time-out can wake-up CPU from Power-down mode
End of enumeration elements list.
WTWKF : Watchdog Timer Wake-up Flag\nIf Watchdog Timer causes CPU wakes up from Power-down mode, this bit will be set to high. Software can write 1 to clear this bit.\n
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer does not cause CPU wake-up
#1 : 1
CPU wake-up from sleep or Power-down mode by Watchdog time-out
End of enumeration elements list.
WTIE : Watchdog Timer Interrupt Enable\n
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer interrupt Disabled
#1 : 1
Watchdog Timer interrupt Enabled
End of enumeration elements list.
WTE : Watchdog Timer Enable\n
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer Disabled (this action will reset the internal counter)
#1 : 1
Watchdog Timer Enabled
End of enumeration elements list.
WTIS : Watchdog Timer Interval Selection\n
bits : 8 - 10 (3 bit)
access : read-write
DBGACK_WDT : ICE Debug Mode Acknowledge Disable (write-protection bit)\nThe Watchdog Timer counter will be held while ICE Debug mode is acknowledged.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
ICE Debug mode acknowledgement affects Watchdog Timer counting
#1 : 1
ICE Debug mode acknowledgement Disabled
End of enumeration elements list.
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.