TIMER0_CTL

TIMER0_CAP

TIMER0_EXTCTL

TIMER0_EINTSTS

TIMER1_CTL

TIMER1_CMP

TIMER1_INTSTS

TIMER1_CNT

TIMER1_CAP

TIMER1_EXTCTL

TIMER1_EINTSTS

TIMER0_CMP

TIMER_CCAPCTL

TIMER_CCAP0

TIMER_CCAP1

TIMER_CCAP2

TIMER0_INTSTS

TIMER0_CNT

PSC : Prescale Counter
bits : 0 - 7 (8 bit)
access : read-write

CNTDATEN : Data Load Enable Control\nWhen CNTDATEN is set, CNT (TIMERx_CNT[23:0]) (Timer Data Register) will be updated continuously with the 24-bit up-timer value as the timer is counting.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CMPCTL : TIMERx_CMP Mode Control
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TGLPINSEL : Toggle Out Pin Selection\nWhen Timer is set to toggle mode,
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPPINSEL : Capture Pin Source Selection
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKEN : Wake-Up Enable\nWhen WKEN is set and the TIF or CAPIF is set, the timer controller will generator a wake-up trigger event to CPU.
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

EXTCNTEN : Counter Mode Enable Control\nThis bit is for external counting pin function enabled. When timer is used as an event counter, this bit should be set to 1 and select HCLK as timer clock source. Please refer to section 6.12.5.3 for detail description.
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACTSTS : Timer Active Status (Read Only)\nThis bit indicates the 24-bit up counter status.
bits : 25 - 25 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RSTCNT : Timer Reset
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OPMODE : Timer Operating Mode
bits : 27 - 28 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INTEN : Interrupt Enable Control\nIf this bit is enabled, when the timer interrupt flag (TIF) is set to 1, the timer interrupt signal is generated and inform to CPU.
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CNTEN : Timer Enable Control
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ICEDEBUG : ICE Debug Mode Acknowledge Disable (Write Protect)\nTimer counter will keep going no matter CPU is held by ICE or not.
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPDAT : Timer Capture Data Register\nWhen CAPIF flag is set to 1, the current CNT (TIMERx_CNT[23:0]) value will be auto-loaded into this TCAP filed immediately.
bits : 0 - 23 (24 bit)
access : read-only

CNTPHASE : Timer External Count Pin Phase Detect Selection
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPEDGE : Timer External Pin Edge Detection
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPEN : Timer External Pin Function Enable
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPFUNCS : Timer External Reset Counter / Timer External Capture Mode Selection
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPIEN : Timer External Capture Interrupt Enable Control\nIf CAPIEN enabled, Timer will raise an external capture interrupt signal and inform to CPU while CAPIF flag is set to 1.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPDBEN : Timer External Capture Input Pin De-Bounce Enable Control
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ECNTDBEN : Timer External Counter Input Pin De-Bounce Enable Control
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPMODE : Capture Mode Selection
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPIF : Timer External Interrupt Flag\nThis bit indicates the external capture interrupt flag status\nNote: This bit is cleared by writing 1 to it
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CMPDAT : Timer Compared Value\nCMPDAT is a 24-bit compared value register. When the internal 24-bit up counter value is equal to CMPDAT value, the TIF flag will set to 1.\nNote1: Never write 0x0 or 0x1 in CMPDAT field, or the core will run into unknown state.\nNote2: When Timer is operating at Continuous Counting mode, the 24-bit up counter will keep counting continuously even if software writes a new value into CMPDAT field. But if Timer is operating at other modes except Periodic mode on M05xxDN/DE, the 24-bit up counter will restart counting and using newest CMPDAT value to be the timer compared value if software writes a new value into CMPDAT field.
bits : 0 - 23 (24 bit)
access : read-write

CCAPEN : Continuous Capture Enable\nThis bit enables the advanced capture function.\nNote: This bit is cleared by H/W automatically when capture operation finish or writing 0 to it
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INV : Input Signal Inverse\nInvert the input signal which be captured.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMRSEL : Capture Timer Selection\nSelect the timer to capture the input signal.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPCHSEL : Capture Channel Selection\nSelect the input channel to be captured.
bits : 3 - 5 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPR1F : Capture Rising Edge 1 Flag\nFirst rising edge already captured, this bit will be set to 1.\nNote: This bit is cleared by H/W automatically when write CCAPEN to 1 or writing 1 to it
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPF1F : Capture Falling Edge 1 Flag\nFirst falling edge already captured, this bit will be set to 1.\nNote: This bit is cleared by H/W automatically when write CCAPEN to 1 or writing 1 to it
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPR2F : Capture Rising Edge 2 Flag\nSecond rising edge already captured, this bit will be set to 1.\nNote: This bit is cleared by H/W automatically when write CCAPEN to 1 or writing 1 to it
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPF2F : Capture Falling Edge 2 Flag\nSecond falling edge already captured, this bit will be set to 1.\nNote: This bit is cleared by H/W automatically when write CCAPEN to 1 or writing 1 to it
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPDAT : Timer Continuous Capture Data Register X\nTIMER_CCAP0 store the timer count value of first rising edge.\nTIMER_CCAP1 store the timer count value of first falling edge.\nTIMER_CCAP2 store the timer count value of second rising edge.
bits : 0 - 23 (24 bit)
access : read-only

TIF : Timer Interrupt Flag\nThis bit indicates the interrupt flag status of Timer while CNT (TIMERx_CNT[23:0]) value reaches to CMPDAT value.\nNote: This bit is cleared by writing 1 to it.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TWKF : Timer Wake-Up Flag\nThis bit indicates the interrupt wake-up flag status of Time.\nNote: This bit is cleared by writing 1 to it.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CNT : Timer Data Register\nIf CNTDATEN is set to 1, CNT register value will be updated continuously to monitor 24-bit up counter value.
bits : 0 - 23 (24 bit)
access : read-only