WDT_CTL (CTL)

RSTCNT : Reset Watchdog Timer Up Counter (Write Protect)\nNote: This bit will be automatically cleared by hardware.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTEN : Watchdog Timer Time-out Reset Enable Bit (Write Protect)\nSetting this bit will enable the WDT time-out reset function if the WDT up counter value has not been cleared after the specific WDT reset delay period (1024 * TWDT) expires.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTF : Watchdog Timer Time-out Reset Flag\nThis bit indicates the system has been reset by WDT time-out reset or not.\nNote: This bit is cleared by writing 1 to it.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IF : Watchdog Timer Time-out Interrupt Flag\nThis bit will be set to 1 while WDT up counter value reaches the selected WDT time-out interval.\nNote: This bit is cleared by writing 1 to it.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKEN : Watchdog Timer Time-out Wake-up Function Control (Write Protect)\nIf this bit is set to 1, while IF is generated to 1 and INTEN enabled, the WDT time-out interrupt signal will generate a wake-up trigger event to chip.\nNote: Chip can be woken-up by WDT time-out interrupt signal generated only if WDT clock source is selected to 10 kHz oscillator.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKF : Watchdog Timer Time-out Wake-up Flag\nThis bit indicates the interrupt wake-up flag status of WDT.\nNote: This bit is cleared by writing 1 to it.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INTEN : Watchdog Timer Time-out Interrupt Enable Bit (Write Protect)\nIf this bit is enabled, the WDT time-out interrupt signal is generated and inform to CPU.
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDTEN : Watchdog Timer Enable Bit (Write Protect)
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TOUTSEL : Watchdog Timer Interval Selection\nThese three bits select the time-out interval for the Watchdog Timer.
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ICEDEBUG : ICE Debug Mode Acknowledge Disabl Bit (Write Protect)\nWDT up counter will keep going no matter CPU is hanging by ICE or not.
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.