PDID

REGWRPROT

BODCR

TEMPCR

PORCR

GPIO_2CKn

P0_MFP

P1_MFP

P2_MFP

P3_MFP

RSTSRC

P4_MFP

IPRSTC1

IPRSTC2

PDID : Part Device Identification Number\nThis register reflects device part number code. S/W can read this register to identify which device is used. For example, M052LCN PDID code is 0x2000_5200.
bits : 0 - 31 (32 bit)
access : read-only

REGPROTDIS : Register Write-Protected Disable index (Read only)
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

REGWRPROT : Register Write-Protected Code (Write Only) Programming a write-protected register, must remove write-protected function by programming a sequence of value 59h , 16h , 88h to this field. After this sequence is completed, the REGPROTDIS bit will be set to 1 and write-protected registers can be normal written.
bits : 0 - 7 (8 bit)
access : write-only

BOD_EN : Brown-Out Detector Enable (write-protected)\nThe default value is set by flash controller user configuration register config0 bit[23]
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_VL : Brown-Out Detector Threshold Voltage Selection (write-protected)
bits : 1 - 2 (2 bit)
access : read-write

BOD_RSTEN : Brown-Out Reset Enable (write-protected)\nThe default value is set by flash controller user configuration register config0 bit[20].
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_INTF : Brown-Out Detector Interrupt Flag\nSoftware can write 1 to clear this bit to zero.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_LPM : Brown-Out Detector Low power Mode (write-protected)\nThe BOD consumes about 100uA in normal mode, the low power mode can reduce the current to about 1/10 but slow the BOD response.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_OUT : Brown-Out Detector output status
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LVR_EN : Low Voltage Reset Enable (write-protected)\nThe LVR function reset the chip when the input power voltage is lower than LVR circuit setting. LVR function is enabled in default.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

VTEMP_EN : Temperature sensor Enable\nThis bit is used to enable/disable temperature sensor function.\nAfter this bit is set to 1, the value of temperature can get from ADC conversion result by ADC channel selecting channel 7 and alternative multiplexer channel selecting temperature sensor. Detail ADC conversion function please reference ADC function chapter.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

POR_DIS_CODE : Power-On-Reset enable control (write-protected)\nWhen power on, the POR circuit generates a reset signal to reset the whole chip function, but noise on the power may cause the POR active again. If set the POR_DIS_CODE equal to 0x5AA5, the POR reset function will be disabled and the POR function will re-active till the power voltage is lower to set the POR_DIS_CODE to another value or reset by chip other reset function. Include:\n/RESET, Watch dog, LVR reset BOD reset, ICE reset command and the software-chip reset function.
bits : 0 - 15 (16 bit)
access : read-write

GPIO_2CKn : GPIO two clock strong pull high disable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

P0_MFP : P0 multiple function Selection\nThe pin function of P0 depends on P0_MFP and P0_ALT.\nRefer to P0_ALT for details descriptions.
bits : 0 - 7 (8 bit)
access : read-write

P0_ALT0 : P0.0 alternate function Selection
bits : 8 - 8 (1 bit)
access : read-write

P0_ALT1 : P0.1 alternate function Selection
bits : 9 - 9 (1 bit)
access : read-write

P0_ALT2 : P0.2 alternate function Selection
bits : 10 - 10 (1 bit)
access : read-write

P0_ALT3 : P0.3 alternate function Selection
bits : 11 - 11 (1 bit)
access : read-write

P0_ALT4 : P0.4 alternate function Selection
bits : 12 - 12 (1 bit)
access : read-write

P0_ALT5 : P0.5 alternate function Selection
bits : 13 - 13 (1 bit)
access : read-write

P0_ALT6 : P0.6 alternate function Selection
bits : 14 - 14 (1 bit)
access : read-write

P0_ALT7 : P0.7 alternate function Selection
bits : 15 - 15 (1 bit)
access : read-write

P0_TYPEn : P0[7:0] input Schmitt Trigger function Enable
bits : 16 - 23 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.

P0_ALT10 : P0.0 alternate function Selection1\nThe pin function of P0.0 depends on P0_MFP[0], P0_ALT[0], and P0_ALT1[0].\nRefer to P0_ALT[0] for details descriptions.
bits : 24 - 24 (1 bit)
access : read-write

P0_ALT11 : P0.1 alternate function Selection1\nThe pin function of P0.1 depends on P0_MFP[1], P0_ALT[1], and P0_ALT1[1].\nRefer to P0_ALT[1] for details descriptions.
bits : 25 - 25 (1 bit)
access : read-write

P1_MFP : P1 multiple function Selection\nThe pin function of P1 is depending on P1_MFP and P1_ALT.\nRefer to P1_ALT for details descriptions.
bits : 0 - 7 (8 bit)
access : read-write

P1_ALT0 : P1.0 alternate function Selection
bits : 8 - 8 (1 bit)
access : read-write

P1_ALT1 : P1.1 alternate function Selection
bits : 9 - 9 (1 bit)
access : read-write

P1_ALT2 : P1.2 alternate function Selection
bits : 10 - 10 (1 bit)
access : read-write

P1_ALT3 : P1.3 alternate function Selection
bits : 11 - 11 (1 bit)
access : read-write

P1_ALT4 : P1.4 alternate function Selection
bits : 12 - 12 (1 bit)
access : read-write

P1_ALT5 : P1.5 alternate function Selection
bits : 13 - 13 (1 bit)
access : read-write

P1_ALT6 : P1.6 alternate function Selection
bits : 14 - 14 (1 bit)
access : read-write

P1_ALT7 : P1.7 alternate function Selection
bits : 15 - 15 (1 bit)
access : read-write

P1_TYPEn : P1[7:0] input Schmitt Trigger function Enable
bits : 16 - 23 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.

P2_MFP : P2 multiple function Selection\nThe pin function of P2 depends on P2_MFP and P2_ALT.\nRefer to P2_ALT for details descriptions.
bits : 0 - 7 (8 bit)
access : read-write

P2_ALT0 : P2.0 alternate function Selection
bits : 8 - 8 (1 bit)
access : read-write

P2_ALT1 : P2.1 alternate function Selection
bits : 9 - 9 (1 bit)
access : read-write

P2_ALT2 : P2.2 alternate function Selection
bits : 10 - 10 (1 bit)
access : read-write

P2_ALT3 : P2.3 alternate function Selection
bits : 11 - 11 (1 bit)
access : read-write

P2_ALT4 : P2.4 alternate function Selection
bits : 12 - 12 (1 bit)
access : read-write

P2_ALT5 : P2.5 alternate function Selection
bits : 13 - 13 (1 bit)
access : read-write

P2_ALT6 : P2.6 alternate function Selection
bits : 14 - 14 (1 bit)
access : read-write

P2_ALT7 : P2.7 alternate function Selection
bits : 15 - 15 (1 bit)
access : read-write

P2_TYPEn : P2[7:0] input Schmitt Trigger function Enable
bits : 16 - 23 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.

P3_MFP : P3 multiple function Selection\nThe pin function of P3 is depending on P3_MFP and P3_ALT.\nRefer to P3_ALT for details descriptions.
bits : 0 - 7 (8 bit)
access : read-write

P3_ALT0 : P3.0 alternate function Selection
bits : 8 - 8 (1 bit)
access : read-write

P3_ALT1 : P3.1 alternate function Selection
bits : 9 - 9 (1 bit)
access : read-write

P3_ALT2 : P3.2 alternate function Selection
bits : 10 - 10 (1 bit)
access : read-write

P3_ALT3 : P3.3 alternate function Selection
bits : 11 - 11 (1 bit)
access : read-write

P3_ALT4 : P3.4 alternate function Selection
bits : 12 - 12 (1 bit)
access : read-write

P3_ALT5 : P3.5 alternate function Selection
bits : 13 - 13 (1 bit)
access : read-write

P3_ALT6 : P3.6 alternate function Selection
bits : 14 - 14 (1 bit)
access : read-write

P3_ALT7 : P3.7 alternate function Selection
bits : 15 - 15 (1 bit)
access : read-write

P3_TYPEn : P3[7:0] input Schmitt Trigger function Enable
bits : 16 - 23 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_POR : The RSTS_POR flag is set by the reset signal , which is from the Power-On Reset (POR) module or bit CHIP_RST (IPRSTC1[0]) is set, to indicate the previous reset source. Software can write 1 to clear this bit to zero.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_RESET : The RSTS_RESET flag is set by the reset signal from the /RESET pin to indicate the previous reset source. Software can write 1 to clear this bit to zero.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_WDT : The RSTS_WDT flag is set by the reset signal from the Watchdog timer to indicate the previous reset source. Software can write 1 to clear this bit to zero.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_LVR : The RSTS_LVR flag is set by the reset signal from the Low-Voltage-Reset controller to indicate the previous reset source. Software can write 1 to clear this bit to zero.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_BOD : The RSTS_BOD flag is set by the reset signal from the Brown-Out Detector to indicate the previous reset source. Software can write 1 to clear this bit to zero.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_MCU : The RSTS_MCU flag is set by the reset signal from the MCU Cortex_M0 kernel to indicate the previous reset source. This bit is cleared by writing 1 to itself.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_CPU : The RSTS_CPU flag is set by hardware if software writes CPU_RST (IPRSTC1[1]) 1 to reset Cortex-M0 CPU kernel and Flash memory controller (FMC).\nSoftware can write 1 to clear this bit to zero.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

P4_MFP : P4 multiple function Selection\nThe pin function of P4 is depending on P4_MFP and P4_ALT.\nRefer to P4_ALT for details descriptions.
bits : 0 - 7 (8 bit)
access : read-write

P4_ALT0 : P4.0 alternate function Selection
bits : 8 - 8 (1 bit)
access : read-write

P4_ALT1 : P4.1 alternate function Selection
bits : 9 - 9 (1 bit)
access : read-write

P4_ALT2 : P4.2 alternate function Selection
bits : 10 - 10 (1 bit)
access : read-write

P4_ALT3 : P4.3 alternate function Selection
bits : 11 - 11 (1 bit)
access : read-write

P4_ALT4 : P4.4 alternate function Selection
bits : 12 - 12 (1 bit)
access : read-write

P4_ALT5 : P4.5 alternate function Selection
bits : 13 - 13 (1 bit)
access : read-write

P4_ALT6 : P4.6 alternate function Selection
bits : 14 - 14 (1 bit)
access : read-write

P4_ALT7 : P4.7 alternate function Selection
bits : 15 - 15 (1 bit)
access : read-write

P4_TYPEn : P4[7:0] input Schmitt Trigger function Enable
bits : 16 - 23 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CHIP_RST : CHIP one shot reset (write-protected) Set this bit will reset the CHIP, including CPU kernel and all peripherals, and this bit will automatically return to 0 after the 2 clock cycles. The CHIP_RST is same as the POR reset , all the chip module is reset and the chip setting from flash are also reload
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CPU_RST : CPU kernel one shot reset (write-protected) Set this bit will reset the Cortex-M0 CPU kernel and Flash memory controller (FMC). This bit will automatically return to 0 after the 2 clock cycles
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

EBI_RST : EBI Controller Reset (write-protected) Set these bit 1 will generate a reset signal to the EBI. User need to set this bit to 0 to release from the reset state
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DIV_RST : DIV Controller Reset (write-protection bit) Set this bit to 1 will generate a reset signal to the DIVIDER. User need to set this bit to 0 to release from the reset state. This bit is the protected bit, It means programming this bit needs to write 59h , 16h , 88h to address 0x5000_0100 to disable register protection. Reference the register REGWRPROT at address GCR_BA+0x100
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPIO_RST : GPIO (P0~P4) controller Reset
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR0_RST : Timer0 controller Reset
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR1_RST : Timer1 controller Reset
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR2_RST : Timer2 controller Reset
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR3_RST : Timer3 controller Reset
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

I2C_RST : I2C0 controller Reset
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

I2C1_RST : I2C1 controller Reset
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SPI0_RST : SPI0 controller Reset
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SPI1_RST : SPI1 controller Reset
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

UART0_RST : UART0 controller Reset
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

UART1_RST : UART1 controller Reset
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PWM03_RST : PWM0~3 controller Reset
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PWM47_RST : PWM4~7 controller Reset
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACMP_RST : Analog Comparator Controller Reset
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACMPB_RST : Analog Comparator 1 Controller Reset
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADC_RST : ADC Controller Reset
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.