PDID

REGWRPROT

BODCR

TEMPCR

PORCR

GPA_MFP

GPB_MFP

GPC_MFP

GPD_MFP

RSTSRC

GPE_MFP

ALT_MFP

IPRSTC1

IPRSTC2

PDID : Part Device Identification Number\nThis register reflects device part number code. S/W can read this register to identify which device is used.
bits : 0 - 31 (32 bit)
access : read-only

REGWRPROT : Register Write-Protection Code (Write Only) Some registers have write-protection function. Writing these registers have to disable the protected function by writing the sequence value 59h , 16h , 88h to this field. After this sequence is completed, the REGPROTDIS bit will be set to 1 and write-protection registers can be normal write. Register Write-Protection Disable index (Read only) The Protected registers are: IPRSTC1: address 0x5000_0008 BODCR: address 0x5000_0018 PORCR: address 0x5000_0024 PWRCON: address 0x5000_0200 (bit[6] is not protected for power wake-up interrupt clear) APBCLK bit[0]: address 0x5000_0208 (bit[0] is watchdog clock enable) CLKSEL0: address 0x5000_0210 (for HCLK and CPU STCLK clock source select) CLKSEL1 bit[1:0]: address 0x5000_0214 (for watchdog clock source select) NMI_SEL bit[8]: address 0x5000_0380 (for NMI_EN clock source select) ISPCON: address 0x5000_C000 (Flash ISP Control register) ISPTRG: address 0x5000_C010 (ISP Trigger Control register) WTCR: address 0x4000_4000 FATCON: address 0x5000_C018
bits : 0 - 7 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_EN : Brown-out Detector Enable (Write-protection Bit) The default value is set by flash controller user configuration register config0 bit[23] This bit is the protected bit. It means programming this needs to write 59h , 16h , 88h to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_VL : Brown-out Detector Threshold Voltage Selection (Write-protection Bits)\n
bits : 1 - 2 (2 bit)
access : read-write

BOD_RSTEN : Brown-out Reset Enable (Write-protection Bit) While the BOD function is enabled (BOD_EN high) and BOD interrupt function is enabled (BOD_RSTEN low), BOD will assert an interrupt if BOD_OUT is high. BOD interrupt will keep till to the BOD_EN set to 0. BOD interrupt can be blocked by disabling the NVIC BOD interrupt or disabling BOD function (set BOD_EN low). The default value is set by flash controller user configuration register config0 bit[20]. This bit is the protected bit. It means programming this needs to write 59h , 16h , 88h to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_INTF : Brown-out Detector Interrupt Flag\nSoftware can write 1 to clear this bit to 0.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_LPM : Brown-out Detector Low Power Mode (Write-protection Bit) The BOD consumes about 100 uA in normal mode, the low power mode can reduce the current to about 1/10 but slow the BOD response. This bit is the protected bit. It means programming this needs to write 59h , 16h , 88h to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_OUT : Brown-out Detector Output Status\n
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LVR_EN : Low Voltage Reset Enable (Write-protection Bit) The LVR function reset the chip when the input power voltage is lower than LVR circuit setting. LVR function is enabled by default. This bit is the protected bit. It means programming this needs to write 59h , 16h , 88h to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

VTEMP_EN : Temperature sensor Enable\nThis bit is used to enable/disable temperature sensor function.\nAfter this bit is set to 1, the value of temperature can get from ADC conversion result by ADC channel selecting channel 7 and alternative multiplexer channel selecting temperature sensor. Detail ADC conversion function. Please refer to ADC function chapter.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

POR_DIS_CODE : Power-on-Reset Enable Control (Write-protection Bits) When powered on, the POR circuit generates a reset signal to reset the whole chip function, but noise on the power may cause the POR active again. User can disable internal POR circuit to avoid unpredictable noise to cause chip reset by writing 0x5AA5 to this field. The POR function will be active again when this field is set to another value or chip is reset by other reset source, including: /RESET, Watchdog, LVR reset, BOD reset, ICE reset command and the software-chip reset function This bit is the protected bit. It means programming this needs to write 59h , 16h , 88h to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 0 - 15 (16 bit)
access : read-write

GPA_MFP0 : PA.0 Pin Function Selection\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPA_MFP1 : PA.1 Pin Function Selection\n
bits : 1 - 1 (1 bit)
access : read-write

GPA_MFP2 : PA.2 Pin Function Selection\n
bits : 2 - 2 (1 bit)
access : read-write

GPA_MFP3 : PA.3 Pin Function Selection\n
bits : 3 - 3 (1 bit)
access : read-write

GPA_MFP4 : PA.4 Pin Function Selection\n
bits : 4 - 4 (1 bit)
access : read-write

GPA_MFP5 : PA.5 Pin Function Selection\n
bits : 5 - 5 (1 bit)
access : read-write

GPA_MFP6 : PA.6 Pin Function Selection\n
bits : 6 - 6 (1 bit)
access : read-write

GPA_MFP7 : PA.7 Pin Function Selection\n
bits : 7 - 7 (1 bit)
access : read-write

GPA_MFP8 : PA.8 Pin Function Selection\n
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPA_MFP9 : PA.9 Pin Function Selection\n
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPA_MFP10 : PA.10 Pin Function Selection\n
bits : 10 - 10 (1 bit)
access : read-write

GPA_MFP11 : PA.11 Pin Function Selection\n
bits : 11 - 11 (1 bit)
access : read-write

GPA_MFP12 : PA.12 Pin Function Selection\n
bits : 12 - 12 (1 bit)
access : read-write

GPA_MFP13 : PA.13 Pin Function Selection\n
bits : 13 - 13 (1 bit)
access : read-write

GPA_MFP14 : PA.14 Pin Function Selection\n
bits : 14 - 14 (1 bit)
access : read-write

GPA_MFP15 : PA.15 Pin Function Selection\n
bits : 15 - 15 (1 bit)
access : read-write

GPA_TYPEn : None
bits : 16 - 31 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP0 : PB.0 Pin Function Selection\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP1 : PB.1 Pin Function Selection\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP2 : PB.2 Pin Function Selection\n
bits : 2 - 2 (1 bit)
access : read-write

GPB_MFP3 : PB.3 Pin Function Selection\n
bits : 3 - 3 (1 bit)
access : read-write

GPB_MFP4 : PB.4 Pin Function Selection\n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP5 : PB. 5 Pin Function Selection\n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP6 : PB.6 Pin Function Selection\n
bits : 6 - 6 (1 bit)
access : read-write

GPB_MFP7 : PB.7 Pin Function Selection\n
bits : 7 - 7 (1 bit)
access : read-write

GPB_MFP8 : PB.8 Pin Function Selection\n
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP9 : PB.9 Pin Function Selection\n
bits : 9 - 9 (1 bit)
access : read-write

GPB_MFP10 : PB.10 Pin Function Selection\n
bits : 10 - 10 (1 bit)
access : read-write

GPB_MFP11 : PB.11 Pin Function Selection\n
bits : 11 - 11 (1 bit)
access : read-write

GPB_MFP12 : PB.12 Pin Function Selection\n
bits : 12 - 12 (1 bit)
access : read-write

GPB_MFP13 : PB.13 Pin Function Selection\n
bits : 13 - 13 (1 bit)
access : read-write

GPB_MFP14 : PB.14 Pin Function Selection\n
bits : 14 - 14 (1 bit)
access : read-write

GPB_MFP15 : PB.15 Pin Function Selection\n
bits : 15 - 15 (1 bit)
access : read-write

GPB_TYPEn : None
bits : 16 - 31 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP0 : PC.0 Pin Function Selection\n
bits : 0 - 0 (1 bit)
access : read-write

GPC_MFP1 : PC.1 Pin Function Selection\n
bits : 1 - 1 (1 bit)
access : read-write

GPC_MFP2 : PC.2 Pin Function Selection\n
bits : 2 - 2 (1 bit)
access : read-write

GPC_MFP3 : PC.3 Pin Function Selection\n
bits : 3 - 3 (1 bit)
access : read-write

GPC_MFP4 : PC.4 Pin Function Selection\n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP5 : PC.5 Pin Function Selection\n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP6 : PC.6 Pin Function Selection\n
bits : 6 - 6 (1 bit)
access : read-write

GPC_MFP7 : PC.7 Pin Function Selection\n
bits : 7 - 7 (1 bit)
access : read-write

GPC_MFP8 : PC.8 Pin Function Selection\n
bits : 8 - 8 (1 bit)
access : read-write

GPC_MFP9 : PC.9 Pin Function Selection\n
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP10 : PC.10 Pin Function Selection\n
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP11 : PC.11 Pin Function Selection\n
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP12 : PC.12 Pin Function Selection\n
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP13 : PC.13 Pin Function Selection\n
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP14 : PC.14 Pin Function Selection\n
bits : 14 - 14 (1 bit)
access : read-write

GPC_MFP15 : PC.15 Pin Function Selection\n
bits : 15 - 15 (1 bit)
access : read-write

GPC_TYPEn : None
bits : 16 - 31 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP0 : PD.0 Pin Function Selection \n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP1 : PD.1 Pin Function Selection\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP2 : PD.2 Pin Function Selection\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP3 : PD.3 Pin Function Selection\n
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP4 : PD.4 Pin Function Selection \n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP5 : PD.5 Pin Function Selection \n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP6 : PD.6 Pin Function Selection\n
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP7 : PD.7 Pin Function Selection \n
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP8 : PD.8 Pin Function Selection\n
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP9 : PD.9 Pin Function Selection\n
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP10 : PD.10 Pin Function Selection \n
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP11 : PD.11 Pin Function Selection\n
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP12 : PD.12 Pin Function Selection \n
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP13 : PD.13 Pin Function Selection \n
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP14 : PD.14 Pin Function Selection \n
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP15 : PD.15 Pin Function Selection \n
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_TYPEn : None
bits : 16 - 31 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_POR : The RSTS_POR flag is set by the reset signal from the Power-On Reset (POR) controller or bit CHIP_RST (IPRSTC1[0]) to indicate the previous reset source. Software can write 1 to clear this bit to 0.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_RESET : The RSTS_RESET flag is set by the reset signal from the /RESET pin to indicate the previous reset source. Software can write 1 to clear this bit to 0.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_WDT : The RSTS_WDT flag is set by the reset signal from the watchdog timer to indicate the previous reset source. Software can write 1 to clear this bit to 0.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_LVR : The RSTS_LVR flag is set by the reset signal from the Low-Voltage-Reset controller to indicate the previous reset source. Software can write 1 to clear this bit to 0.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_BOD : The RSTS_BOD flag is set by the reset signal from the Brown-out-Detector to indicate the previous reset source. Software can write 1 to clear this bit to 0.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_SYS : The RSTS_SYS flag is set by the reset signal from the Cortex_M0 kernel to indicate the previous reset source. Software can write 1 to clear this bit to 0.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_CPU : The RSTS_CPU flag is set by hardware if software writes CPU_RST (IPRSTC1[1]) 1 to reset Cortex-M0 CPU kernel and Flash memory controller (FMC).\nSoftware can write 1 to clear this bit to 0.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPE_MFP0 : PE.0 Pin Function Selection\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPE_MFP1 : PE.1 Pin Function Selection \n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPE_MFP5 : PE.5 Pin Function Selection\n
bits : 5 - 5 (1 bit)
access : read-write

GPE_TYPEn : None
bits : 16 - 31 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PB10_S01 : Bits PB10_S01 and GPB_MFP[10] determine the PB.10 function.\n
bits : 0 - 0 (1 bit)
access : read-write

PB9_S11 : Bits PB9_S11 and GPB_MFP[9] determine the PB.9 function.\n
bits : 1 - 1 (1 bit)
access : read-write

PA7_S21 : Bits PA7_S21, GPA_MFP[7] and EBI_EN (ALT_MFP[11]).determine the PA.7 function.\n
bits : 2 - 2 (1 bit)
access : read-write

PB14_S31 : Bits PB14_S31 and GPB_MFP[14] determine the PB.14 function.\n
bits : 3 - 3 (1 bit)
access : read-write

PB11_PWM4 : Bits PB11_PWM4 and GPB_MFP[11] determine the PB.11 function.\n
bits : 4 - 4 (1 bit)
access : read-write

PC0_I2SLRCLK : Bits PC0_I2SLRCLK and GPC_MFP[0] determine the PC.0 function.\n
bits : 5 - 5 (1 bit)
access : read-write

PC1_I2SBCLK : Bits PC1_I2SBCLK and GPC_MFP[1] determine the PC.1 function.\n
bits : 6 - 6 (1 bit)
access : read-write

PC2_I2SDI : Bits PC2_I2SDI and GPC_MFP[2] determine the PC.2 function.\n
bits : 7 - 7 (1 bit)
access : read-write

PC3_I2SDO : Bits PC3_I2SDO and GPC_MFP[3] determine the PC.3 function.\n
bits : 8 - 8 (1 bit)
access : read-write

PA15_I2SMCLK : Bits PA15_I2SMCLK and GPA_MFP[15] determine the PA.15 function.\n
bits : 9 - 9 (1 bit)
access : read-write

PB12_CLKO : Bits PB12_CLKO, GPB_MFP[12] and EBI_EN (ALT_MFP[11]) determine the PB.12 function.\n
bits : 10 - 10 (1 bit)
access : read-write

EBI_EN : EBI_EN is use to switch GPIO function to EBI function (AD[15:0], ALE, RE, WE, CS, MCLK), it need additional registers EBI_EN[7:0] and EBI_MCLK_EN for some GPIO to switch to EBI function(AD[15:8], MCLK)\n
bits : 11 - 11 (1 bit)
access : read-write

EBI_MCLK_EN : Bits EBI_MCLK_EN, EBI_EN and GPC_MFP[8] determine the PC.8 function.\n
bits : 12 - 12 (1 bit)
access : read-write

EBI_nWRL_EN : Bits EBI_nWRL_EN, EBI_EN and GPB_MFP[2] determine the PB.2 function.\n
bits : 13 - 13 (1 bit)
access : read-write

EBI_nWRH_EN : Bits EBI_nWRH_EN, EBI_EN and GPB_MFP[3] determine the PB.3 function.\n
bits : 14 - 14 (1 bit)
access : read-write

EBI_HB_EN0 : Bits EBI_HB_EN[0], EBI_EN and GPA_MFP[5] determine the PA.5 function.\n
bits : 16 - 16 (1 bit)
access : read-write

EBI_HB_EN1 : Bits EBI_HB_EN[1], EBI_EN and GPA_MFP[4] determine the PA.4 function.\n
bits : 17 - 17 (1 bit)
access : read-write

EBI_HB_EN2 : Bits EBI_HB_EN[2], EBI_EN and GPA_MFP[3] determine the PA.3 function.\n
bits : 18 - 18 (1 bit)
access : read-write

EBI_HB_EN3 : Bits EBI_HB_EN[3], EBI_EN and GPA_MFP[2] determine the PA.2 function.\n
bits : 19 - 19 (1 bit)
access : read-write

EBI_HB_EN4 : Bits EBI_HB_EN[4], EBI_EN and GPA_MFP[1] determine the PA.1 function.\n
bits : 20 - 20 (1 bit)
access : read-write

EBI_HB_EN5 : Bits EBI_HB_EN[5], EBI_EN and GPA_MFP[12] determine the PA.12 function.\n
bits : 21 - 21 (1 bit)
access : read-write

EBI_HB_EN6 : Bits EBI_HB_EN[6], EBI_EN and GPA_MFP[13] determine the PA.13 function.\n
bits : 22 - 22 (1 bit)
access : read-write

EBI_HB_EN7 : EBI_HB_EN is use to switch GPIO function to EBI address/data bus high byte (AD[15:8]), EBI_HB_EN, EBI_EN and corresponding GPx_MFP[y] determine the Px.y function.
bits : 23 - 23 (1 bit)
access : read-write

PB15_T0EX : Bits GPB_MFP15 and PB15_T0EX (ALT_MFP[24]) determine the PB.15 function.\n
bits : 24 - 24 (1 bit)
access : read-write

PE5_T1EX : Bits GPE_MFP5 and PE5_T1EX (ALT_MFP[25]) determine the PE.5 function.\n
bits : 25 - 25 (1 bit)
access : read-write

PB2_T2EX : Bits GPB_MFP2 and EBI_nWRL_EN (ALT_MFP[13]) and EBI_EN (ALT_MFP[11]) and PB2_T2EX (ALT_MFP[26]) determine the PB.2 function.\n
bits : 26 - 26 (1 bit)
access : read-write

PB3_T3EX : Bits GPB_MFP3 and EBI_nWRH_EN (ALT_MFP[14]) and EBI_EN (ALT_MFP[11]) and PB3_T3EX (ALT_MFP[27]) determine the PB.3 function.\n
bits : 27 - 27 (1 bit)
access : read-write

CHIP_RST : CHIP one shot reset (Write-protection Bit) Setting this bit will reset the whole chip, including CPU kernel and all peripherals, and this bit will automatically return to 0 after the 2 clock cycles. The CHIP_RST is same as the POR reset, all the chip controllers is reset and the chip setting from flash are also reload. About the difference between CHIP_RST and SYSRESETREQ, please refer to section 5.2.2 This bit is the protected bit. It means programming this bit needs to write 59h , 16h , 88h to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CPU_RST : CPU kernel one shot reset (Write-protection Bit) Setting this bit will only reset the CPU kernel and Flash Memory Controller(FMC), and this bit will automatically return to 0 after the 2 clock cycles This bit is the protected bit, It means programming this bit needs to write 59h , 16h , 88h to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PDMA_RST : PDMA Controller Reset (write-protection bit in NUC130/NUC140) Setting this bit to 1 will generate a reset signal to the PDMA. User need to set this bit to 0 to release from reset state. This bit is the protected bit, It means programming this bit needs to write 59h , 16h , 88h to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

EBI_RST : EBI Controller Reset (write-protection bit in NUC130/NUC140 100-pin and 64-pin package) Set this bit to 1 will generate a reset signal to the EBI. User need to set this bit to 0 to release from the reset state. This bit is the protected bit, It means programming this bit needs to write 59h , 16h , 88h to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPIO_RST : GPIO controller Reset\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR0_RST : Timer0 controller Reset\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR1_RST : Timer1 controller Reset\n
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR2_RST : Timer2 controller Reset\n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR3_RST : Timer3 controller Reset\n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

I2C0_RST : I2C0 controller Reset\n
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

I2C1_RST : I2C1 controller Reset\n
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SPI0_RST : SPI0 controller Reset\n
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SPI1_RST : SPI1 controller Reset\n
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SPI2_RST : SPI2 controller Reset \n
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SPI3_RST : SPI3 controller Reset \n
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

UART0_RST : UART0 controller Reset\n
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

UART1_RST : UART1 controller Reset\n
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

UART2_RST : UART2 controller Reset \n
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PWM03_RST : PWM03 controller Reset\n
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PWM47_RST : PWM47 controller Reset\n
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACMP_RST : Analog Comparator Controller Reset\n
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PS2_RST : PS/2 Controller Reset\n
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAN0_RST : CAN0 Controller Reset\n
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

USBD_RST : USB Device Controller Reset\n
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADC_RST : ADC Controller Reset\n
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

I2S_RST : I2S Controller Reset\n
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.