PDID

IPRSTC3

REGWRPROT

BODCR

PORCR

VREFCR

GPA_MFP

GPB_MFP

GPC_MFP

GPD_MFP

RSTSRC

GPE_MFP

GPF_MFP

ALT_MFP

ALT_MFP2

ALT_MFP3

ALT_MFP4

IPRSTC1

IPRSTC2

PDID : Part Device Identification Number\nThis register reflects device part number code. Software can read this register to identify which device is used.
bits : 0 - 31 (32 bit)
access : read-only

UART3_RST : UART3 Controller Reset
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

UART4_RST : UART4 Controller Reset
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

UART5_RST : UART5 Controller Reset
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PWM0_RST : PWM0 Controller Reset
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PWM1_RST : PWM1 Controller Reset
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BPWM0_RST : BPWM0 Controller Reset
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BPWM1_RST : BPWM1 Controller Reset
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

REGPROTDIS : Register Write-Protection Disable Index (Read Only) The Protected registers are: IPRSTC1: address 0x5000_0008 BODCR: address 0x5000_0018 PORCR: address 0x5000_0024 VREFCR: address 0x5000_0028 PWRCON: address 0x5000_0200 (bit[6] is not protected for power wake-up interrupt clear) APBCLK bit[0]: address 0x5000_0208 (bit[0] is Watchdog Timer clock enable) CLKSEL0: address 0x5000_0210 (for HCLK and CPU STCLK clock source selection) CLKSEL1 bit[1:0]: address 0x5000_0214 (for Watchdog Timer clock source selection) NMI_SEL bit[8]: address 0x5000_0380 (for NMI_EN clock source selection) ISPCON: address 0x5000_C000 (Flash ISP Control register) ISPTRG: address 0x5000_C010 (ISP Trigger Control register) FATCON: address 0x5000_C018 WTCR: address 0x4000_4000 WTCRALT: address 0x4000_4004 PWM_CTL0: address 0x4004_0000, 0x4014_0000 PWM_DTCTL0_1: address 0x4004_0070, 0x4014_0070 PWM_DTCTL2_3: address 0x4004_0074, 0x4014_0074 PWM_DTCTL4_5: address 0x4004_0078, 0x4014_0078 PWM_BRKCTL0_1: address 0x4004_00C8, 0x4014_00C8 PWM_BRKCTL2_3: address 0x4004_00CC, 0x4014_00CC PWM_BRKCTL4_5: address 0x4004_00D0, 0x4014_00D0 PWM_SWBRK: address 0x4004_00DC, 0x4014_00DC PWM_INTEN1: address 0x4004_00E4, 0x4014_00E4 PWM_INTSTS1: address 0x4004_00EC, 0x4014_00EC BPWM_CTL0: address 0x4004_4000, 0x4014_4000 Note: The bits which are write-protected will be noted as' (Write Protect)' beside the description.
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

REGWRPROT : Register Write-Protection Code (Write Only)\nSome registers have write-protection function. Writing these registers have to disable the protected function by writing the sequence value "59h", "16h", "88h" to this field. After this sequence is completed, the REGPROTDIS bit will be set to 1 and write-protection registers can be normal write.
bits : 1 - 7 (7 bit)
access : write-only

BOD_EN : Brown-Out Detector Enable Control (Write Protect) The default value is set by flash memory controller user configuration register CBODEN (CONFIG0[23]) bit. Note: This bit is the protected bit. It means programming this needs to write '59h', '16h', '88h' to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_VL : Brown-Out Detector Threshold Voltage Selection (Write Protect) The default value is set by flash memory controller user configuration register CBOV (CONFIG0[22:21]) bit. Note: This bit is the protected bit. It means programming this needs to write '59h', '16h', '88h' to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_RSTEN : Brown-Out Reset Enable Control (Write Protect) While the Brown-out Detector function is enabled (BOD_EN high) and BOD reset function is enabled (BOD_RSTEN high), BOD will assert a signal to reset chip when the detected voltage is lower than the threshold (BOD_OUT high). Note1: While the BOD function is enabled (BOD_EN high) and BOD interrupt function is enabled (BOD_RSTEN low), BOD will assert an interrupt if BOD_OUT is high. BOD interrupt will keep till to the BOD_EN set to 0. BOD interrupt can be blocked by disabling the NVIC BOD interrupt or disabling BOD function (set BOD_EN low). Note2: The default value is set by flash controller user configuration register CBORST (CONFIG0[20]) bit. Note3: This bit is the protected bit. It means programming this needs to write '59h', '16h', '88h' to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_INTF : Brown-Out Detector Interrupt Flag\nNote: Write 1 to clear this bit to 0.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_LPM : Brown-Out Detector Low Power Mode (Write Protect) Note1: The BOD consumes about 100 uA in Normal mode, and the low power mode can reduce the current to about 1/10 but slow the BOD response. Note2: This bit is the protected bit, and programming it needs to write '59h', '16h', and '88h' to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOD_OUT : Brown-Out Detector Output Status
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LVR_EN : Low Voltage Reset Enable Control (Write Protect) The LVR function reset the chip when the input power voltage is lower than LVR circuit setting. LVR function is enabled by default. Note: This bit is the protected bit, and programming it needs to write '59h', '16h', and '88h' to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BODDGSEL : Brown-Out Detector Output De-Glitch Time Select (Write Protect) Note: This bit is the protected bit, and programming it needs to write '59h', '16h', and '88h' to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LVRDGSEL : LVR Output De-Glitch Time Select (Write Protect) Note: This bit is the protected bit, and programming it needs to write '59h', '16h', and '88h' to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 12 - 14 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

POR_DIS_CODE : Power-On-Reset Enable Control (Write Protect) When powered on, the POR circuit generates a reset signal to reset the whole chip function, but noise on the power may cause the POR active again. User can disable internal POR circuit to avoid unpredictable noise to cause chip reset by writing 0x5AA5 to this field. The POR function will be active again when this field is set to another value or chip is reset by other reset source, including: nRESET, Watchdog Timer reset, Window Watchdog Timer reset, LVR reset, BOD reset, ICE reset command and the software-chip reset function Note: This bit is the protected bit. It means programming this needs to write '59h', '16h', '88h' to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 0 - 15 (16 bit)
access : read-write

ADC_VREFSEL : ADC VREF Path Control (Write Protect) Note: This bit is the protected bit, and programming it needs to write '59h', '16h', and '88h' to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPA_MFP0 : PA.0 Pin Function Selection Bits PA0_PWM04 (ALT_MFP3[4]), PA0_UR5TXD (ALT_MFP4[7]), PA0_I2C1SCL (ALT_MFP4[12]) and GPA_MFP0 determine the PA.0 function. (PA0_PWM04, PA0_UR5TXD, PA0_I2C1SCL, GPA_MFP0) value and function mapping is as following list.
bits : 0 - 0 (1 bit)
access : read-write

GPA_MFP1 : PA.1 Pin Function Selection Bits PA1_PWM05 (ALT_MFP3[5]), PA1_UR5RXD (ALT_MFP4[6]), PA1_I2C1SDA (ALT_MFP4[13]) and GPA_MFP1 determine the PA.1 function. (PA1_PWM05, PA1_UR5RXD, PA1_I2C1SDA, GPA_MFP1) value and function mapping is as following list.
bits : 1 - 1 (1 bit)
access : read-write

GPA_MFP2 : PA.2 Pin Function Selection Bits PA2_PWM10 (ALT_MFP3[6]), PA2_UR3TXD (ALT_MFP4[3]) and GPA_MFP2 determine the PA.2 function. (PA2_PWM10, PA2_UR3TXD, GPA_MFP2) value and function mapping is as following list.
bits : 2 - 2 (1 bit)
access : read-write

GPA_MFP3 : PA.3 Pin Function Selection Bits PA3_PWM11 (ALT_MFP3[7]), PA3_UR3RXD (ALT_MFP4[2]) and GPA_MFP3 determine the PA.3 function. (PA3_PWM11, PA3_UR3RXD, GPA_MFP3) value and function mapping is as following list.
bits : 3 - 3 (1 bit)
access : read-write

GPA_MFP4 : PA.4 Pin Function Selection Bit GPA_MFP4 determines the PA.4 function.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPA_MFP5 : PA.5 Pin Function Selection Bits PA5_UR3RXD (ALT_MFP4[4]) and GPA_MFP5 determine the PA.5 function. (PA5_UR3RXD, GPA_MFP5) value and function mapping is as following list.
bits : 5 - 5 (1 bit)
access : read-write

GPA_MFP6 : PA.6 Pin Function Selection Bits PA6_UR3TXD (ALT_MFP4[5]) and GPA_MFP6 determine the PA.6 function. (PA6_UR3TXD, GPA_MFP6) value and function mapping is as following list.
bits : 6 - 6 (1 bit)
access : read-write

GPA_MFP7 : PA.7 Pin Function Selection Bits PA7_VREF (ALT_MFP4[14]) and GPA_MFP7 determine the PA.7 function. (PA7_VREF, GPA_MFP7) value and function mapping is as following list.
bits : 7 - 7 (1 bit)
access : read-write

GPA_MFP8 : PA.8 Pin Function Selection Bits PA8_UR1RTS (ALT_MFP4[0]) and GPA_MFP8 determine the PA.8 function. (PA8_UR1RTS, GPA_MFP8) value and function mapping is as following list.
bits : 8 - 8 (1 bit)
access : read-write

GPA_MFP9 : PA.9 Pin Function Selection Bits PA9_UR1CTS (ALT_MFP4[1]) and GPA_MFP9 determine the PA.9 function. (PA9_UR1CTS, GPA_MFP9) value and function mapping is as following list.
bits : 9 - 9 (1 bit)
access : read-write

GPA_MFP10 : PA.10 Pin Function Selection Bits PA10_PWM12 (ALT_MFP3[8]) and GPA_MFP10 determine the PA.10 function. (PA10_PWM12, GPA_MFP10) value and function mapping is as following list.
bits : 10 - 10 (1 bit)
access : read-write

GPA_MFP11 : PA.11 Pin Function Selection Bits PA11_PWM13 (ALT_MFP3[9]) and GPA_MFP11 determine the PA.11 function. (PA11_PWM13, GPA_MFP11) value and function mapping is as following list.
bits : 11 - 11 (1 bit)
access : read-write

GPA_MFP12 : PA.12 Pin Function Selection Bits PA12_UR5RXD (ALT_MFP4[8]) and GPA_MFP12 determine the PA.12 function. (PA12_UR5RXD, GPA_MFP12) value and function mapping is as following list.
bits : 12 - 12 (1 bit)
access : read-write

GPA_MFP13 : PA.13 Pin Function Selection Bits PA13_UR5TXD (ALT_MFP4[9]) and GPA_MFP13 determine the PA.13 function. (PA13_UR5TXD, GPA_MFP13) value and function mapping is as following list.
bits : 13 - 13 (1 bit)
access : read-write

GPA_MFP14 : PA.14 Pin Function Selection Bit GPA_MFP14 determines the PA.14 function.
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPA_MFP15 : PA.15 Pin Function Selection Bit GPA_MFP15 determines the PA.15 function.
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPA_TYPEn : Trigger Function Selection
bits : 16 - 31 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP0 : PB.0 Pin Function Selection Bit GPB_MFP0 determines the PB.0 function.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP1 : PB.1 Pin Function Selection Bit GPB_MFP1 determines the PB.1 function.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP2 : PB.2 Pin Function Selection Bits PB2_TM2 (ALT_MFP2[4]), PB2_PWM1BK1 (ALT_MFP3[31]), PB2_T2EX (ALT_MFP[26]) and GPB_MFP2 determine the PB.2 function. (PB2_TM2, PB2_PWM1BK1, PB2_T2EX, GPB_MFP2) value and function mapping is as following list.
bits : 2 - 2 (1 bit)
access : read-write

GPB_MFP3 : PB.3 Pin Function Selection Bits PB3_TM3 (ALT_MFP2[5]), PB3_PWM1BK0 (ALT_MFP3[30]), PB3_T3EX (ALT_MFP[27]) and GPB_MFP3 determine the PB.3 function. (PB3_TM3, PB3_PWM1BK0, PB3_T3EX, GPB_MFP3) value and function mapping is as following list.
bits : 3 - 3 (1 bit)
access : read-write

GPB_MFP4 : PB.4 Pin Function Selection Bit GPB_MFP4 determines the PB.4 function.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP5 : PB 5 Pin Function Selection Bit GPB_MFP5 determines the PB.5 function.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP6 : PB.6 Pin Function Selection Bit GPB_MFP6 determines the PB.6 function.
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP7 : PB.7 Pin Function Selection Bit GPB_MFP7 determines the PB.7 function.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP8 : PB.8 Pin Function Selection Bits PB8_BPWM12 (ALT_MFP3[20]), PB8_CLKO (ALT_MFP[29]) and GPB_MFP8 determine the PB.8 function. (PB8_BPWM12, PB8_CLKO, GPB_MFP8) value and function mapping is as following list.
bits : 8 - 8 (1 bit)
access : read-write

GPB_MFP9 : PB.9 Pin Function Selection Bit GPB_MFP9 determines the PB.9 function.
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP10 : PB.10 Pin Function Selection Bit GPB_MFP10 determines the PB.10 function.
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP11 : PB.11 Pin Function Selection Bits PB11_PWM04 (ALT_MFP3[24]) and GPB_MFP11 determine the PB.11 function. (PB11_PWM04, GPB_MFP11) value and function mapping is as following list.
bits : 11 - 11 (1 bit)
access : read-write

GPB_MFP12 : PB.12 Pin Function Selection Bits PB12_BPWM13 (ALT_MFP3[21]) and GPB_MFP12 determine the PB.12 function. (PB12_BPWM13, GPB_MFP12) value and function mapping is as following list.
bits : 12 - 12 (1 bit)
access : read-write

GPB_MFP14 : PB.14 Pin Function Selection Bit GPB_MFP14 determines the PB.14 function.
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPB_MFP15 : PB.15 Pin Function Selection Bits PB15_BPWM15 (ALT_MFP3[23]), PB15_T0EX (ALT_MFP[24]), PB15_TM0 (ALT_MFP2[2]) and GPB_MFP15 determine the PB.15 function. (PB15_BPWM15, PB15_T0EX, PB15_TM0, GPB_MFP15) value and function mapping is as following list.
bits : 15 - 15 (1 bit)
access : read-write

GPB_TYPEn : Trigger Function Selection
bits : 16 - 31 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP0 : PC.0 Pin Function Selection Bits PC0_BPWM00 (ALT_MFP3[12]) and GPC_MFP0 determine the PC.0 function. (PC0_BPWM00, GPC_MFP0) value and function mapping is as following list.
bits : 0 - 0 (1 bit)
access : read-write

GPC_MFP1 : PC.1 Pin Function Selection Bits PC1_BPWM01 (ALT_MFP3[13]) and GPC_MFP1 determine the PC.1 function. (PC1_BPWM01, GPC_MFP1) value and function mapping is as following list.
bits : 1 - 1 (1 bit)
access : read-write

GPC_MFP2 : PC.2 Pin Function Selection Bits PC2_BPWM02 (ALT_MFP3[14]) and GPC_MFP2 determine the PC.2 function. (PC2_BPWM02, GPC_MFP2) value and function mapping is as following list.
bits : 2 - 2 (1 bit)
access : read-write

GPC_MFP3 : PC.3 Pin Function Selection Bits PC3_BPWM03 (ALT_MFP3[15]) and GPC_MFP3 determine the PC.3 function. (PC3_BPWM03, GPC_MFP3) value and function mapping is as following list.
bits : 3 - 3 (1 bit)
access : read-write

GPC_MFP6 : PC.6 Pin Function Selection Bits PC6_PWM0BK0 (ALT_MFP3[28]), PC6_I2C0SDA (ALT_MFP4[10]) and GPC_MFP6 determine the PC.6 function. (PC6_PWM0BK0, PC6_I2C0SDA, GPC_MFP6) value and function mapping is as following list.
bits : 6 - 6 (1 bit)
access : read-write

GPC_MFP7 : PC.7 Pin Function Selection Bits PC7_PWM0BK1 (ALT_MFP3[29]), PC7_I2C0SCL (ALT_MFP4[11]) and GPC_MFP7 determine the PC.7 function. (PC7_PWM0BK1, PC7_I2C0SCL, GPC_MFP7) value and function mapping is as following list.
bits : 7 - 7 (1 bit)
access : read-write

GPC_MFP8 : PC.8 Pin Function Selection Bit GPC_MFP8 determines the PC.8 function.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP9 : PC.9 Pin Function Selection Bit GPC_MFP9 determines the PC.9 function.
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP10 : PC.10 Pin Function Selection Bit GPC_MFP10 determines the PC.10 function.
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_MFP11 : PC.11 Pin Function Selection Bit GPC_MFP11 determines the PC.11 function.
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPC_TYPEn : Trigger Function Selection
bits : 16 - 31 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPD_MFP6 : PD.6 Pin Function Selection Bits PD6_BPWM11 (ALT_MFP3[19]) and GPD_MFP6 determine the PD.6 function. (PD6_BPWM11, GPD_MFP6) value and function mapping is as following list.
bits : 6 - 6 (1 bit)
access : read-write

GPD_MFP7 : PD.7 Pin Function Selection Bits PD7_BPWM10 (ALT_MFP3[18]) and GPD_MFP7 determine the PD.7 function. (PD7_BPWM10, GPD_MFP7) value and function mapping is as following list.
bits : 7 - 7 (1 bit)
access : read-write

GPD_MFP14 : PD.14 Pin Function Selection Bits PD14_BPWM05 (ALT_MFP3[17]) and GPD_MFP14 determine the PD.14 function. (PD14_BPWM05, GPD_MFP14) value and function mapping is as following list.
bits : 14 - 14 (1 bit)
access : read-write

GPD_MFP15 : PD.15 Pin Function Selection Bits PD15_BPWM04 (ALT_MFP3[16]) and GPD_MFP15 determine the PD.15 function. (PD15_BPWM04, GPD_MFP15) value and function mapping is as following list.
bits : 15 - 15 (1 bit)
access : read-write

GPD_TYPEn : Trigger Function Selection
bits : 16 - 31 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_POR : Power-On Reset Flag The RSTS_POR Flag is set by the 'Reset Signal' from the Power-On Reset (POR) vontroller or bit CHIP_RST (IPRSTC1[0]) to indicate the previous reset source. Note: Write 1 to clear this bit to 0.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_RESET : Reset Pin Reset Flag The RSTS_RESET flag is set by the 'Reset Signal' from the nRESET Pin to indicate the previous reset source. Note: Write 1 to clear this bit to 0.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_WDT : Watchdog Timer Reset Flag The RSTS_WDT flag is set by the 'Reset Signal' from the watchdog timer or window watchdog timer to indicate the previous reset source. Note1: Write 1 to clear this bit to 0. Note2: Watchdog Timer register WTRF (WTCR[2]) bit is set if the system has been reset by WDT time-out reset. Window Watchdog Timer register WWDTRF (WWDTSR) bit is set if the system has been reset by WWDT time-out reset.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_LVR : Low Voltage Reset Flag The RSTS_LVR flag is set by the 'Reset Signal' from the Low-Voltage-Reset controller to indicate the previous reset source. Note: Write 1 to clear this bit to 0.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_BOD : Brown-Out Detector Reset Flag The RSTS_BOD flag is set by the 'Reset Signal' from the Brown-Out Detector to indicate the previous reset source. Note: Write 1 to clear this bit to 0.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_SYS : SYS Reset Flag The RSTS_SYS flag Is set by the 'Reset Signal' from the Cortex-M0 coreto indicate the previous reset source. Note: Write 1 to clear this bit to 0.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTS_CPU : CPU Reset Flag\nThe RSTS_CPU flag Is set by hardware if software writes CPU_RST (IPRSTC1[1]) 1 To reset Cortex-M0 coreand flash memory controller (FMC).\nNote: Write 1 to clear this bit to 0.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPE_MFP5 : PE.5 Pin Function Selection Bits PE5_T1EX (ALT_MFP[25]), PE5_TM1 (ALT_MFP2[3]) and GPE_MFP5 determine the PE.5 function. (PE5_T1EX, PE5_TM1, GPE_MFP5) value and function mapping is as following list.
bits : 5 - 5 (1 bit)
access : read-write

GPE_TYPE5 : Trigger Function Selection
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPF_MFP0 : PF.0 Pin Function Selection\nBit GPF_MFP0 determines the PF.0 function.\nNote: This bit is read only and is decided by user configuration CGPFMFP (CONFIG0[27]).
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPF_MFP1 : PF.1 Pin Function Selection \nBit GPF_MFP1 determine the PF.1 function.\nNote: This bit is read only and is decided by user configuration CGPFMFP (CONFIG0[27]).
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPF_MFP4 : PF.4 Pin Function Selection Bits PF4_PWM14 (ALT_MFP3[10]) and GPF_MFP4 determine the PF.4 function. (PF4_PWM14, GPF_MFP4) value and function mapping is as following list.
bits : 4 - 4 (1 bit)
access : read-write

GPF_MFP5 : PF.5 Pin Function Selection Bits PF5_PWM15 (ALT_MFP3[11]) and GPF_MFP5 determine the PF.5 function. (PF5_PWM15, GPF_MFP5) value and function mapping is as following list.
bits : 5 - 5 (1 bit)
access : read-write

GPF_MFP6 : PF.6 Pin Function Selection Bit GPF_MFP6 determines the PF.6 function.
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPF_MFP7 : PF.7 Pin Function Selection Bit GPF_MFP7 determines the PF.7 function.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPF_MFP8 : PF.8 Pin Function Selection Bit PF8_BPWM14 (ALT_MFP3[22]), GPF_MFP8 determines the PF.8 function. (PF8_BPWM14, GPF_MFP8) value and function mapping is as following list.
bits : 8 - 8 (1 bit)
access : read-write

GPF_TYPEn : Trigger Function Selection
bits : 16 - 24 (9 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PB15_T0EX : PB.15 Pin Alternative Function Selection Bits PB15_BPWM15 (ALT_MFP3[23]), PB15_T0EX (ALT_MFP[24]), PB15_TM0 (ALT_MFP2[2]) and GPB_MFP15 determine the PB.15 function. (PB15_BPWM15, PB15_T0EX, PB15_TM0, GPB_MFP15) value and function mapping is as following list.
bits : 24 - 24 (1 bit)
access : read-write

PE5_T1EX : PE.5 Pin Alternative Function Selection Bits PE5_T1EX (ALT_MFP[25]), PE5_TM1 (ALT_MFP2[3]) and GPE_MFP5 determine the PE.5 function. (PE5_T1EX, PE5_TM1, GPE_MFP5) value and function mapping is as following list.
bits : 25 - 25 (1 bit)
access : read-write

PB2_T2EX : PB.2 Pin Alternative Function Selection Bits PB2_TM2 (ALT_MFP2[4]), PB2_PWM1BK1 (ALT_MFP3[31]), PB2_T2EX (ALT_MFP[26]) and GPB_MFP2 determine the PB.2 function. (PB2_TM2, PB2_PWM1BK1, PB2_T2EX, GPB_MFP2) value and function mapping is as following list.
bits : 26 - 26 (1 bit)
access : read-write

PB3_T3EX : PB.3 Pin Alternative Function Selection Bits PB3_TM3 (ALT_MFP2[5]), PB3_PWM1BK0 (ALT_MFP3[30]), PB3_T3EX (ALT_MFP[27]) and GPB_MFP3 determine the PB.3 function. (PB3_TM3, PB3_PWM1BK0, PB3_T3EX, GPB_MFP3) value and function mapping is as following list.
bits : 27 - 27 (1 bit)
access : read-write

PB8_CLKO : PB.8 Pin Alternative Function Selection Bits PB8_BPWM12 (ALT_MFP3[20]), PB8_CLKO (ALT_MFP[29]) and GPB_MFP8 determine the PB.8 function. (PB8_BPWM12, PB8_CLKO, GPB_MFP8) value and function mapping is as following list.
bits : 29 - 29 (1 bit)
access : read-write

PB15_TM0 : PB.15 Pin Alternative Function Selection Bits PB15_BPWM15 (ALT_MFP3[23]), PB15_T0EX (ALT_MFP[24]), PB15_TM0 (ALT_MFP2[2]) and GPB_MFP15 determine the PB.15 function. (PB15_BPWM15, PB15_T0EX, PB15_TM0, GPB_MFP15) value and function mapping is as following list.
bits : 2 - 2 (1 bit)
access : read-write

PE5_TM1 : PE.5 Pin Alternative Function Selection Bits PE5_T1EX (ALT_MFP[25]), PE5_TM1 (ALT_MFP2[3]) and GPE_MFP5 determine the PE.5 function. (PE5_T1EX, PE5_TM1, GPE_MFP5) value and function mapping is as following list.
bits : 3 - 3 (1 bit)
access : read-write

PB2_TM2 : PB.2 Pin Alternative Function Selection Bits PB2_TM2 (ALT_MFP2[4]), PB2_PWM1BK1 (ALT_MFP3[31]), PB2_T2EX (ALT_MFP[26]) and GPB_MFP2 determine the PB.2 function. (PB2_TM2, PB2_PWM1BK1, PB2_T2EX, GPB_MFP2) value and function mapping is as following list.
bits : 4 - 4 (1 bit)
access : read-write

PB3_TM3 : PB.3 Pin Alternative Function Selection Bits PB3_TM3 (ALT_MFP2[5]), PB3_PWM1BK0 (ALT_MFP3[30]), PB3_T3EX (ALT_MFP[27]) and GPB_MFP3 determine the PB.3 function. (PB3_TM3, PB3_PWM1BK0, PB3_T3EX, GPB_MFP3) value and function mapping is as following list.
bits : 5 - 5 (1 bit)
access : read-write

PA0_PWM04 : PA.0 Pin Alternative Function Selection Bits PA0_PWM04 (ALT_MFP3[4]), PA0_UR5TXD (ALT_MFP4[7]), PA0_I2C1SCL (ALT_MFP4[12]) and GPA_MFP0 determine the PA.0 function. (PA0_PWM04, PA0_UR5TXD, PA0_I2C1SCL, GPA_MFP0) value and function mapping is as following list.
bits : 4 - 4 (1 bit)
access : read-write

PA1_PWM05 : PA.1 Pin Alternative Function Selection Bits PA1_PWM05 (ALT_MFP3[5]), PA1_UR5RXD (ALT_MFP4[6]), PA1_I2C1SDA (ALT_MFP4[13]) and GPA_MFP1 determine the PA.1 function. (PA1_PWM05, PA1_UR5RXD , PA1_I2C1SDA, GPA_MFP1) value and function mapping is as following list.
bits : 5 - 5 (1 bit)
access : read-write

PA2_PWM10 : PA.2 Pin Alternative Function Selection Bits PA2_PWM10 (ALT_MFP3[6]), PA2_UR3TXD (ALT_MFP4[3]) and GPA_MFP2 determine the PA.2 function. (PA2_PWM10, PA2_UR3TXD, GPA_MFP2) value and function mapping is as following list.
bits : 6 - 6 (1 bit)
access : read-write

PA3_PWM11 : PA.3 Pin Alternative Function Selection Bits PA3_PWM11 (ALT_MFP3[7]), PA3_UR3RXD (ALT_MFP4[2]) and GPA_MFP3 determine the PA.3 function. (PA3_PWM11, PA3_UR3RXD, GPA_MFP3) value and function mapping is as following list.
bits : 7 - 7 (1 bit)
access : read-write

PA10_PWM12 : PA.10 Pin Alternative Function Selection Bits PA10_PWM12 (ALT_MFP3[8]) and GPA_MFP10 determine the PA.10 function. (PA10_PWM12, GPA_MFP10) value and function mapping is as following list.
bits : 8 - 8 (1 bit)
access : read-write

PA11_PWM13 : PA.11 Pin Alternative Function Selection Bits PA11_PWM13 (ALT_MFP3[9]) and GPA_MFP11 determine the PA.11 function. (PA11_PWM13, GPA_MFP11) value and function mapping is as following list.
bits : 9 - 9 (1 bit)
access : read-write

PF4_PWM14 : PF.4 Pin Alternative Function Selection Bits PF4_PWM14 (ALT_MFP3[10]) and GPF_MFP4 determine the PF.4 function. (PF4_PWM14, GPF_MFP4) value and function mapping is as following list.
bits : 10 - 10 (1 bit)
access : read-write

PF5_PWM15 : PF.5 Pin Alternative Function Selection Bits PF5_PWM15 (ALT_MFP3[11]) and GPF_MFP5 determine the PF.5 function. (PF5_PWM15, GPF_MFP5) value and function mapping is as following list.
bits : 11 - 11 (1 bit)
access : read-write

PC0_BPWM00 : PC.0 Pin Alternative Function Selection Bits PC0_BPWM00 (ALT_MFP3[12]) and GPC_MFP0 determine the PC.0 function. (PC0_BPWM00, GPC_MFP0) value and function mapping is as following list.
bits : 12 - 12 (1 bit)
access : read-write

PC1_BPWM01 : PC.1 Pin Alternative Function Selection Bits PC1_BPWM01 (ALT_MFP3[13]) and GPC_MFP1 determine the PC.1 function. (PC1_BPWM01, GPC_MFP1) value and function mapping is as following list.
bits : 13 - 13 (1 bit)
access : read-write

PC2_BPWM02 : PC.2 Pin Alternative Function Selection Bits PC2_BPWM02 (ALT_MFP3[14]) and GPC_MFP2 determine the PC.2 function. (PC2_BPWM02, GPC_MFP2) value and function mapping is as following list.
bits : 14 - 14 (1 bit)
access : read-write

PC3_BPWM03 : PC.3 Pin Alternative Function Selection Bits PC3_BPWM03 (ALT_MFP3[15]) and GPC_MFP3 determine the PC.3 function. (PC3_BPWM03, GPC_MFP3) value and function mapping is as following list.
bits : 15 - 15 (1 bit)
access : read-write

PD15_BPWM04 : PD.15 Pin Alternative Function Selection Bits PD15_BPWM04 (ALT_MFP3[16]) and GPD_MFP15 determine the PD.15 function. (PD15_BPWM04, GPD_MFP15) value and function mapping is as following list.
bits : 16 - 16 (1 bit)
access : read-write

PD14_BPWM05 : PD.14 Pin Alternative Function Selection Bits PD14_BPWM05 (ALT_MFP3[17]) and GPD_MFP14 determine the PD.14 function. (PD14_BPWM05, GPD_MFP14) value and function mapping is as following list.
bits : 17 - 17 (1 bit)
access : read-write

PD7_BPWM10 : PD.7 Pin Alternative Function Selection Bits PD7_BPWM10 (ALT_MFP3[18]) and GPD_MFP7 determine the PD.7 function. (PD7_BPWM10, GPD_MFP7) value and function mapping is as following list.
bits : 18 - 18 (1 bit)
access : read-write

PD6_BPWM11 : PD.6 Pin Alternative Function Selection Bits PD6_BPWM11 (ALT_MFP3[19]) and GPD_MFP6 determine the PD.6 function. (PD6_BPWM11, GPD_MFP6) value and function mapping is as following list.
bits : 19 - 19 (1 bit)
access : read-write

PB8_BPWM12 : PB.8 Pin Alternative Function Selection Bits PB8_BPWM12 (ALT_MFP3[20]), PB8_CLKO (ALT_MFP[29]) and GPB_MFP8 determine the PB.8 function. (PB8_BPWM12, PB8_CLKO, GPB_MFP8) value and function mapping is as following list.
bits : 20 - 20 (1 bit)
access : read-write

PB12_BPWM13 : PB.12 Pin Alternative Function Selection Bits PB12_BPWM13 (ALT_MFP3[21]) and GPB_MFP12 determine the PB.12 function. (PB12_BPWM13, GPB_MFP12) value and function mapping is as following list.
bits : 21 - 21 (1 bit)
access : read-write

PF8_BPWM14 : PF.8 Pin Function Selection Bit PF8_BPWM14 (ALT_MFP3[22]), GPF_MFP8 determines the PF.8 function. (PF8_BPWM14, GPF_MFP8) value and function mapping is as following list.
bits : 22 - 22 (1 bit)
access : read-write

PB15_BPWM15 : PB.15 Pin Function Selection Bits PB15_BPWM15 (ALT_MFP3[23]), PB15_T0EX (ALT_MFP[24]), PB15_TM0 (ALT_MFP2[2]) and GPB_MFP15 determine the PB.15 function. (PB15_BPWM15, PB15_T0EX, PB15_TM0, GPB_MFP15) value and function mapping is as following list.
bits : 23 - 23 (1 bit)
access : read-write

PB11_PWM04 : PB.11 Pin Alternative Function Selection Bits PB11_PWM04 (ALT_MFP3[24]) and GPB_MFP11 determine the PB.11 function. (PB11_PWM04, GPB_MFP11) value and function mapping is as following list.
bits : 24 - 24 (1 bit)
access : read-write

PC6_PWM0BK0 : PC.6 Pin Alternative Function Selection Bits PC6_PWM0BK0 (ALT_MFP3[28]), PC6_I2C0SDA (ALT_MFP4[10]) and GPC_MFP6 determine the PC.6 function. (PC6_PWM0BK0, PC6_I2C0SDA, GPB_MFP6) value and function mapping is as following list.
bits : 28 - 28 (1 bit)
access : read-write

PC7_PWM0BK1 : PC.7 Pin Alternative Function Selection Bits PC7_PWM0BK1 (ALT_MFP3[29]), PC7_I2C0SCL (ALT_MFP4[11]) and GPC_MFP7 determine the PC.7 function. (PC7_PWM0BK1, PC7_I2C0SCL, GPC_MFP7) value and function mapping is as following list.
bits : 29 - 29 (1 bit)
access : read-write

PB3_PWM1BK0 : PB.3 Pin Alternative Function Selection Bits PB3_TM3 (ALT_MFP2[5]), PB3_PWM1BK0 (ALT_MFP3[30]), PB3_T3EX (ALT_MFP[27]) and GPB_MFP3 determine the PB.3 function. (PB3_TM3, PB3_PWM1BK0, PB3_T3EX, GPB_MFP3) value and function mapping is as following list.
bits : 30 - 30 (1 bit)
access : read-write

PB2_PWM1BK1 : PB.2 Pin Alternative Function Selection Bits PB2_TM2 (ALT_MFP2[4]), PB2_PWM1BK1 (ALT_MFP3[31]), PB2_T2EX (ALT_MFP[26]) and GPB_MFP2 determine the PB.2 function. (PB2_TM2, PB2_PWM1BK1, PB2_T2EX, GPB_MFP2) value and function mapping is as following list.
bits : 31 - 31 (1 bit)
access : read-write

PA8_UR1RTS : PA.8 Pin Alternative Function Selection Bits PA8_UR1RTS (ALT_MFP4[0]) and GPA_MFP8 determine the PA.8 function. (PA8_UR1RTS, GPA_MFP8) value and function mapping is as following list.
bits : 0 - 0 (1 bit)
access : read-write

PA9_UR1CTS : PA.9 Pin Alternative Function Selection Bits PA9_UR1CTS (ALT_MFP4[1]) and GPA_MFP9 determine the PA.9 function. (PA9_UR1CTS, GPA_MFP9) value and function mapping is as following list.
bits : 1 - 1 (1 bit)
access : read-write

PA3_UR3RXD : PA.3 Pin Alternative Function Selection Bits PA3_PWM11 (ALT_MFP3[7]), PA3_UR3RXD (ALT_MFP4[2]) and GPA_MFP3 determine the PA.3 function. (PA3_PWM11, PA3_UR3RXD, GPA_MFP3) value and function mapping is as following list.
bits : 2 - 2 (1 bit)
access : read-write

PA2_UR3TXD : PA.2 Pin Alternative Function Selection Bits PA2_PWM10 (ALT_MFP3[6]), PA2_UR3TXD (ALT_MFP4[3]) and GPA_MFP2 determine the PA.2 function. (PA2_PWM10, PA2_UR3TXD, GPA_MFP2) value and function mapping is as following list.
bits : 3 - 3 (1 bit)
access : read-write

PA5_UR3RXD : PA.5 Pin Alternative Function Selection Bits PA5_UR3RXD (ALT_MFP4[4]) and GPA_MFP5 determine the PA.5 function. (PA5_UR3RXD, GPA_MFP5) value and function mapping is as following list.
bits : 4 - 4 (1 bit)
access : read-write

PA6_UR3TXD : PA.6 Pin Alternative Function Selection Bits PA6_UR3TXD (ALT_MFP4[5]) and GPA_MFP6 determine the PA.6 function. (PA6_UR3TXD, GPA_MFP6) value and function mapping is as following list.
bits : 5 - 5 (1 bit)
access : read-write

PA1_UR5RXD : PA.1 Pin Alternative Function Selection Bits PA1_PWM05 (ALT_MFP3[5]), PA1_UR5RXD (ALT_MFP4[6]), PA1_I2C1SDA (ALT_MFP4[13]) and GPA_MFP1 determine the PA.1 function. (PA1_PWM05, PA1_UR5RXD, PA1_I2C1SDA, GPA_MFP1) value and function mapping is as following list.
bits : 6 - 6 (1 bit)
access : read-write

PA0_UR5TXD : PA.0 Pin Alternative Function Selection Bits PA0_PWM04 (ALT_MFP3[4]), PA0_UR5TXD (ALT_MFP4[7]), PA0_I2C1SCL (ALT_MFP4[12]) and GPA_MFP0 determine the PA.0 function. (PA0_PWM04, PA0_UR5TXD, PA0_I2C1SCL, GPA_MFP0) value and function mapping is as following list.
bits : 7 - 7 (1 bit)
access : read-write

PA12_UR5RXD : PA.12 Pin Alternative Function Selection Bits PA12_UR5RXD (ALT_MFP4[8]) and GPA_MFP12 determine the PA.12 function. (PA12_UR5RXD, GPA_MFP12) value and function mapping is as following list.
bits : 8 - 8 (1 bit)
access : read-write

PA13_UR5TXD : PA.13 Pin Alternative Function Selection Bits PA13_UR5TXD (ALT_MFP4[9]) and GPA_MFP13 determine the PA.13 function. (PA13_UR5TXD, GPA_MFP13) value and function mapping is as following list.
bits : 9 - 9 (1 bit)
access : read-write

PC6_I2C0SDA : PC.6 Pin Alternative Function Selection Bits PC6_PWM0BK0 (ALT_MFP3[28]), PC6_I2C0SDA (ALT_MFP4[10]) and GPC_MFP6 determine the PC.6 function. (PC6_PWM0BK0, PC6_I2C0SDA, GPC_MFP6) value and function mapping is as following list.
bits : 10 - 10 (1 bit)
access : read-write

PC7_I2C0SCL : PC.7 Pin Alternative Function Selection Bits PC7_PWM0BK1 (ALT_MFP3[29]), PC7_I2C0SCL (ALT_MFP4[11]) and GPC_MFP7 determine the PC.7 function. (PC7_PWM0BK1, PC7_I2C0SCL, GPC_MFP7) value and function mapping is as following list.
bits : 11 - 11 (1 bit)
access : read-write

PA0_I2C1SCL : PA.0 Pin Alternative Function Selection Bits PA0_PWM04 (ALT_MFP3[4]), PA0_UR5TXD (ALT_MFP4[7]), PA0_I2C1SCL (ALT_MFP4[12]) and GPA_MFP0 determine the PA.0 function. (PA0_PWM04, PA0_UR5TXD, PA0_I2C1SCL, GPA_MFP0) value and function mapping is as following list.
bits : 12 - 12 (1 bit)
access : read-write

PA1_I2C1SDA : PA.1 Pin Alternative Function Selection Bits PA1_PWM05 (ALT_MFP3[5]), PA1_UR5RXD (ALT_MFP4[6]), PA1_I2C1SDA (ALT_MFP4[13]) and GPA_MFP1 determine the PA.1 function. (PA1_PWM05, PA1_UR5RXD, PA1_I2C1SDA, GPA_MFP1) value and function mapping is as following list.
bits : 13 - 13 (1 bit)
access : read-write

PA7_VREF : PA.7 Pin Alternative Function Selection Bits PA7_VREF (ALT_MFP4[14]) and GPA_MFP7 determine the PA.7 function. (PA7_VREF, GPA_MFP7) value and function mapping is as following list.
bits : 14 - 14 (1 bit)
access : read-write

CHIP_RST : CHIP One-Shot Reset (Write Protect) Setting this bit will reset the whole chip, including CPU coreand all peripherals, and this bit will automatically return to 0 after the 2 clock cycles. The CHIP_RST is the same as the POR reset, all the chip controllers are reset and the chip setting from flash are also reload. For the difference between CHIP_RST and SYSRESETREQ, please refer to section 6.2.2. Note: This bit is the protected bit, and programming it needs to write '59h', '16h', and '88h' to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CPU_RST : CPU Kernel One-Shot Reset (Write Protect) Setting this bit will only reset the CPU coreand Flash Memory Controller(FMC), and this bit will automatically return 0 after the two clock cycles. Note: This bit is the protected bit, and programming it needs to write '59h', '16h', and '88h' to address 0x5000_0100 to disable register protection. Refer to the register REGWRPROT at address GCR_BA+0x100.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

GPIO_RST : GPIO Controller Reset
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR0_RST : Timer0 Controller Reset
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR1_RST : Timer1 Controller Reset
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR2_RST : Timer2 Controller Reset
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR3_RST : Timer3 Controller Reset
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

I2C0_RST : I2C0 Controller Reset
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

I2C1_RST : I2C1 Controller Reset
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SPI0_RST : SPI0 Controller Reset
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

UART0_RST : UART0 Controller Reset
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

UART1_RST : UART1 Controller Reset
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

UART2_RST : UART2 Controller Reset
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAN0_RST : CAN0 Controller Reset
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADC_RST : ADC Controller Reset
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.