\n

ACMP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

Registers

CMPCR0

CMPCR1

CMPSR


CMPCR0

Analog Comparator 0 Control Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPCR0 CMPCR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPEN CMPIE CMP_HYSEN CMPCN CMPINV

CMPEN : Comparator Enable Bit\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Comparator Disabled

#1 : 1

Comparator Enabled

End of enumeration elements list.

CMPIE : Comparator Interrupt Enable Bit\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Interrupt function Disabled

#1 : 1

Interrupt function Enabled

End of enumeration elements list.

CMP_HYSEN : Comparator Hysteresis Enable Bit\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Hysteresis function Disabled (Default)

#1 : 1

Hysteresis function Enabled

End of enumeration elements list.

CMPCN : Comparator Negative Input Selection\n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

The source of the negative comparator input is from ACMPn_N pin (n = 0, 1)

#1 : 1

Internal band-gap reference voltage is selected as the source of negative comparator input

End of enumeration elements list.

CMPINV : Comparator Output Inverse Enable Bit\n
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Comparator analog output inverse is Disabled

#1 : 1

Comparator analog output inverse is Enabled

End of enumeration elements list.


CMPCR1

Analog Comparator 1 Control Register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPCR1 CMPCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

CMPSR

Analog Comparator Status Register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPSR CMPSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPF0 CMPF1 CO0 CO1

CMPF0 : Comparator 0 Interrupt Flag\nThis bit is set by hardware whenever the comparator 0 output changes state. This will cause an interrupt if CMPCR0[1] is set to 1.\nWrite 1 to clear this bit to 0.
bits : 0 - 0 (1 bit)
access : read-write

CMPF1 : Comparator 1 Interrupt Flag\nThis bit is set by hardware whenever the comparator 1 output changes state. This will cause an interrupt if CMPCR1[1] is set to 1.\nWrite 1 to clear this bit to 0.
bits : 1 - 1 (1 bit)
access : read-write

CO0 : Comparator 0 Output\n
bits : 2 - 2 (1 bit)
access : read-write

CO1 : Comparator 1 Output\n
bits : 3 - 3 (1 bit)
access : read-write



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