\n
address_offset : 0x0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
NMI Source Interrupt Enable Control Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BOD : BOD NMI Source Enable\n
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
BOD NMI source Disabled
#1 : 1
BOD NMI source Enabled
End of enumeration elements list.
IRC : IRC TRIM NMI Source Enable\n
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
IRC TRIM NMI source Disabled
#1 : 1
IRC TRIM NMI source Enabled
End of enumeration elements list.
PWRWK : Power-down Mode Wake-up NMI Source Enable\n
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Power-down mode wake-up NMI source Disabled
#1 : 1
Power-down mode wake-up NMI source Enabled
End of enumeration elements list.
SRAMFAIL : SRAM ParityCheck Error NMI Source Enable\n
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
SRAM parity check error NMI source Disabled
#1 : 1
SRAM parity check error NMI source Enabled
End of enumeration elements list.
CLKFAIL : Clock Fail Detected NMI Source Enable\n
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Clock fail detected interrupt NMI source Disabled
#1 : 1
Clock fail detected interrupt NMI source Enabled
End of enumeration elements list.
RTC : RTC NMI Source Enable\n
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
RTC NMI source Disabled
#1 : 1
RTC NMI source Enabled
End of enumeration elements list.
TAMPER : TAMPER_INT NMI Source Enable\n
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Backup register tamper detected interrupt.NMI source Disabled
#1 : 1
Backup register tamper detected interrupt.NMI source Enabled
End of enumeration elements list.
EINT0 : External Interrupt 0 NMI Source Enable\n
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
External interrupt 0 NMI source Disabled
#1 : 1
External interrupt 0 NMI source Enabled
End of enumeration elements list.
EINT1 : External Interrupt 1 NMI Source Enable\n
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
External interrupt 1 NMI source Disabled
#1 : 1
External interrupt 1 NMI source Enabled
End of enumeration elements list.
EINT2 : External Interrupt 2 NMI Source Enable\n
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
External interrupt 2 NMI source Disabled
#1 : 1
External interrupt 2 NMI source Enabled
End of enumeration elements list.
EINT3 : External Interrupt 3 NMI Source Enable\n
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
External interrupt 3 NMI source Disabled
#1 : 1
External interrupt 3 NMI source Enabled
End of enumeration elements list.
EINT4 : External Interrupt 4 NMI Source Enable\n
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
External interrupt 4 NMI source Disabled
#1 : 1
External interrupt 4 NMI source Enabled
End of enumeration elements list.
EINT5 : External Interrupt 5 NMI Source Enable\n
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
External interrupt 5 NMI source Disabled
#1 : 1
External interrupt 5 NMI source Enabled
End of enumeration elements list.
EINT6 : External Interrupt 6 NMI Source Enable\n
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
External interrupt 6 NMI source Disabled
#1 : 1
External interrupt 6 NMI source Enabled
End of enumeration elements list.
EINT7 : External Interrupt 7 NMI Source Enable\n
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
External interrupt 7 NMI source Disabled
#1 : 1
External interrupt 7 NMI source Enabled
End of enumeration elements list.
NMI Source Interrupt Status Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
BOD : BOD Interrupt Flag (Read Only)\n
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
#0 : 0
BOD interrupt is deasserted
#1 : 1
BOD interrupt is asserted
End of enumeration elements list.
IRC : IRC TRIM Interrupt Flag (Read Only)\n
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
HIRC TRIM interrupt is deasserted
#1 : 1
HIRC TRIM interrupt is asserted
End of enumeration elements list.
PWRWK : Power-down Mode Wake-up Interrupt Flag (Read Only)\n
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
#0 : 0
Power-down mode wake-up interrupt is deasserted
#1 : 1
Power-down mode wake-up interrupt is asserted
End of enumeration elements list.
SRAMFAIL : SRAM ParityCheck Error Interrupt Flag (Read Only)\n
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
#0 : 0
SRAM parity check error interrupt is deasserted
#1 : 1
SRAM parity check error interrupt is asserted
End of enumeration elements list.
CLKFAIL : Clock Fail Detected Interrupt Flag (Read Only)\n
bits : 4 - 4 (1 bit)
access : read-only
Enumeration:
#0 : 0
Clock fail detected interrupt is deasserted
#1 : 1
Clock fail detected interrupt is asserted
End of enumeration elements list.
RTC : RTC Interrupt Flag (Read Only)\n
bits : 6 - 6 (1 bit)
access : read-only
Enumeration:
#0 : 0
RTC interrupt is deasserted
#1 : 1
RTC interrupt is asserted
End of enumeration elements list.
TAMPER : TAMPER_INT Interrupt Flag (Read Only)\n
bits : 7 - 7 (1 bit)
access : read-only
Enumeration:
#0 : 0
Backup register tamper detected interrupt is deasserted
#1 : 1
Backup register tamper detected interrupt is asserted
End of enumeration elements list.
EINT0 : External Interrupt 0 Interrupt Flag (Read Only)\n
bits : 8 - 8 (1 bit)
access : read-only
Enumeration:
#0 : 0
External Interrupt 0 interrupt is deasserted
#1 : 1
External Interrupt 0 interrupt is asserted
End of enumeration elements list.
EINT1 : External Interrupt 1 Interrupt Flag (Read Only)\n
bits : 9 - 9 (1 bit)
access : read-only
Enumeration:
#0 : 0
External Interrupt 1 interrupt is deasserted
#1 : 1
External Interrupt 1 interrupt is asserted
End of enumeration elements list.
EINT2 : External Interrupt 2 Interrupt Flag (Read Only)\n
bits : 10 - 10 (1 bit)
access : read-only
Enumeration:
#0 : 0
External Interrupt 2 interrupt is deasserted
#1 : 1
External Interrupt 2 interrupt is asserted
End of enumeration elements list.
EINT3 : External Interrupt 3 Interrupt Flag (Read Only)\n
bits : 11 - 11 (1 bit)
access : read-only
Enumeration:
#0 : 0
External Interrupt 3 interrupt is deasserted
#1 : 1
External Interrupt 3 interrupt is asserted
End of enumeration elements list.
EINT4 : External Interrupt 4 Interrupt Flag (Read Only)\n
bits : 12 - 12 (1 bit)
access : read-only
Enumeration:
#0 : 0
External Interrupt 4 interrupt is deasserted
#1 : 1
External Interrupt 4 interrupt is asserted
End of enumeration elements list.
EINT5 : External Interrupt 5 Interrupt Flag (Read Only)\n
bits : 13 - 13 (1 bit)
access : read-only
Enumeration:
#0 : 0
External Interrupt 5 interrupt is deasserted
#1 : 1
External Interrupt 5 interrupt is asserted
End of enumeration elements list.
EINT6 : External Interrupt 6 Interrupt Flag (Read Only)\n
bits : 14 - 14 (1 bit)
access : read-only
Enumeration:
#0 : 0
External Interrupt 6 interrupt is deasserted
#1 : 1
External Interrupt 6 interrupt is asserted
End of enumeration elements list.
EINT7 : External Interrupt 7 Interrupt Flag (Read Only)\n
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
External Interrupt 7 interrupt is deasserted
#1 : 1
External Interrupt 7 interrupt is asserted
End of enumeration elements list.
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.