TIMER2_CTL

TIMER2_CAP

TIMER2_EXTCTL

TIMER2_EINTSTS

TIMER3_CTL

TIMER3_CMP

TIMER3_INTSTS

TIMER3_CNT

TIMER3_CAP

TIMER3_EXTCTL

TIMER3_EINTSTS

TIMER2_CMP

TIMER2_INTSTS

TIMER2_CNT

PSC : PSC Counter\n
bits : 0 - 7 (8 bit)
access : read-write

CNTDATEN : Data Load Enable\nWhen this bit is set, timer counter value (TIMERx_CNT) will be updated continuously to monitor internal 24-bit up counter value as the counter is counting.\n
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TOGDIS1 : Toggle Output 1 Disable\nSetting this bit will disable the Toggle output pins group 1.\nNote: The group1 pins are PB4, PB1, PC6, and PC1.
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TOGDIS2 : Toggle Output 2 Disable\nSetting this bit will disable the Toggle output pins group 2.\nNote1: If both TOUT1 (group 1 pins) and TOUT2 (group 2 pins) function are enabled, toggle output signal is generated only from TOUT1 pins.\nNote2: The group2 pins are PD1, PE8, PE1, and PD11.
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKEN : Wake-Up Enable\nIf this bit is set to 1, while timer interrupt flag TIF (TIMERx_INTSTS[0]) is 1 and INTEN (TIMERx_CTL[29]) is enabled, the timer interrupt signal will generate a wake-up trigger event to CPU.\n
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

EXTCNTEN : Counter Mode Enable Bit \nThis bit is for external counting pin function enabled. When timer is used as an event counter, this bit should be set to 1 and select PCLK as timer clock source.\n
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACTSTS : Timer Active Status Bit (Read Only)\nThis bit indicates the 24-bit up counter status.\n
bits : 25 - 25 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RSTCNT : Timer Reset Bit\nSetting this bit will reset the 24-bit up counter value (TIMERx_CNT) and also force CNTEN (TIMERx_CTL[30]) to 0 if ACTSTS (TIMERx_CTL[25]) is 1.\n
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OPMODE : Timer Operation Mode\n
bits : 27 - 28 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INTEN : Interrupt Enable Bit\nIf this bit is enabled, when the timer interrupt flag TIF is set to 1, the timer interrupt signal is generated and inform to CPU.
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CNTEN : Timer Enable Bit\n
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ICEDEBUG : ICE Debug Mode Acknowledge Disable Bit (Write Protect)\nTIMER counter will keep going no matter CPU is held by ICE or not.
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPDAT : Timer Capture Data Register\nWhen CAPEN (TIMERx_EXTCTL[3]) bit is set, CAPFUNCS (TIMERx_EXTCTL[4]) bit is 0, and a transition on TMx_EXT pin matched the CAPEDGE (TIMERx_EXTCTL[2:1]) setting, CAPIF (TIMERx_EINTSTS[0]) will set to 1 and the current timer counter value (TIMERx_CNT value) will be auto-loaded into this CAPDAT field.
bits : 0 - 23 (24 bit)
access : read-only

CNTPHASE : Timer External Count Phase \nThis bit indicates the detection phase of external counting pin.\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPEDGE : Timer External Pin Edge Detect\n
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPEN : Timer External Pin Enable \nThis bit enables the CAPFUNCS (TIMERx_EXTCTL[4]) function on the TMx_EXT pin. \n
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPFUNCS : Timer External Reset Counter / Capture Mode Select\n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPIEN : Timer External Interrupt Enable\n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPDBEN : Timer External Capture Pin De-Bounce Enable\nIf this bit is enabled, the edge detection of TMx_EXT pin is detected with de-bounce circuit.
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CNTDBEN : Timer Counter Pin De-Bounce Enable\nIf this bit is enabled, the edge detection of TMx pin is detected with de-bounce circuit.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAPIF : Timer External Interrupt Flag\nThis bit indicates the timer external interrupt flag status.\nNote: This bit is cleared by writing 1 to it.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CMPDAT : Timer Compared Value\nCMPDAT is a 24-bit compared value register. When the internal 24-bit up counter value is equal to CMPDAT value, the TIF (TIMERx_INTSTS[0] timer interrupt flag) will set to 1.\nNote1: Never write 0x0 or 0x1 in CMPDAT field, or the timer will run into unknown state.\nNote2: When timer is operating at continuous counting mode, the 24-bit up counter will keep counting continuously even if software writes a new value into CMPDAT field. But if timer is operating at other modes, the 24-bit up counter will restart counting and using newest CMPDAT value to be the timer compared value if software writes a new value into CMPDAT field.
bits : 0 - 23 (24 bit)
access : read-write

TIF : Timer Interrupt Flag\nThis bit indicates the interrupt flag status of Timer while TIMERx_CNT value reaches to CMPDAT value.\nNote: This bit is cleared by writing 1 to it.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TWKF : Timer Wake-Up Flag\nThis bit indicates the interrupt wake-up flag status of timer.\nNote: This bit is cleared by writing 1 to it.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CNT : Timer Data Register\nUser can read CNT for getting current 24- bit event counter value if TIMERx_CTL[24] is 1
bits : 0 - 23 (24 bit)
access : read-only