HcRevision

HcInterruptEnable

HcInterruptDisable

HcHCCA

HcPeriodCurrentED

HcControlHeadED

HcPhyControl

HcMiscControl

HcControlCurrentED

HcBulkHeadED

HcBulkCurrentED

HcDoneHead

HcFmInterval

HcFmRemaining

HcFmNumber

HcControl

HcPeriodicStart

HcLSThreshold

HcRhDescriptorA

HcRhDescriptorB

HcRhStatus

HcRhPortStatus1

HcRhPortStatus2

HcCommandStatus

HcInterruptStatus

REV : Revision Indicates the Open HCI Specification revision number implemented by the Hardware. Host Controller supports 1.1 specification.
bits : 0 - 7 (8 bit)
access : read-only

SO : Scheduling Overrun Interrupt Enable Bit\nWrite Operation:\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDH : Write Back Done Head Interrupt Enable Bit\nWrite Operation:\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SF : Start Of Frame Interrupt Enable Bit\nWrite Operation:\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RD : Resume Detected Interrupt Enable Bit\nWrite Operation:\n
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FNO : Frame Number Overflow Interrupt Enable Bit\nWrite Operation:\n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RHSC : Root Hub Status Change Interrupt Enable Bit\nWrite Operation:\n
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

MIE : Master Interrupt Enable Bit\nThis bit is a global interrupt enable. A write of '1' allows interrupts to be enabled via the specific enable bits listed above.\nWrite Operation:\n
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SO : Scheduling Overrun Disable Bit\nWrite Operation:\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDH : Write Back Done Head Disable Bit\nWrite Operation:\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SF : Start Of Frame Disable Bit\nWrite Operation:\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RD : Resume Detected Disable Bit\nWrite Operation:\n
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FNO : Frame Number Overflow Disable Bit\nWrite Operation:\n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RHSC : Root Hub Status Change Disable Bit\nWrite Operation:\n
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

MIE : Master Interrupt Disable Bit\nGlobal interrupt disable. Writing '1' to disable all interrupts.\nWrite Operation:\n
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HCCA : Host Controller Communication Area\nPointer to indicate base address of the Host Controller Communication Area (HCCA).
bits : 8 - 31 (24 bit)
access : read-write

PCED : Periodic Current ED\nPointer to indicate physical address of the current Isochronous or Interrupt Endpoint Descriptor.
bits : 4 - 31 (28 bit)
access : read-write

CHED : Control Head ED\nPointer to indicate physical address of the first Endpoint Descriptor of the Control list.
bits : 4 - 31 (28 bit)
access : read-write

STBYEN : USB Transceiver Standby Enable Bit\nThis bit controls if USB transceiver could enter the standby mode to reduce power consumption.\n
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DBR16 : Data Buffer Region 16 When set, the size of the data buffer region is 16 bytes. Otherwise, the size is 32 bytes.
bits : 0 - 0 (1 bit)
access : read-write

ABORT : AHB Bus ERROR Response\nThis bit indicates there is an ERROR response received in AHB bus.\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OCAL : Overcurrent Active Low\nThis bit controls the polarity of overcurrent flag from external power IC.\n
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PCAL : Port Power Control Active Low\nThis bit controls the polarity of port power control to external power IC.\n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SIEPD : SIE Pipeline Disable Bit When set, waits for all USB bus activity to complete prior to returning completion status to the List Processor. This is a failsafe mechanism to avoid potential problems with the clk_dr transition between 1.5 MHz and 12 MHz.
bits : 8 - 8 (1 bit)
access : read-write

DPRT1 : Port 1 Disable Bit\nThis bit controls if the connection between USB host controller and transceiver of port 1 is disabled. If the connection is disabled, the USB host controller will not recognize any event of USB bus.\nSet this bit high, the transceiver of port 1 will also be forced into the standby mode no matter what USB host controller operation is.\n
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DPRT2 : Port 2 Disable Bit\nThis bit controls if the connection between USB host controller and transceiver of port 2 is disabled. If the connection is disabled, the USB host controller will not recognize any event of USB bus.\nSet this bit high, the transceiver of port 2 will also be forced into the standby mode no matter what USB host controller operation is.\n
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CCED : Control Current Head ED\nPointer to indicate the physical address of the current Endpoint Descriptor of the Control list.
bits : 4 - 31 (28 bit)
access : read-write

BHED : Bulk Head ED\nPointer to indicate the physical address of the first Endpoint Descriptor of the Bulk list.
bits : 4 - 31 (28 bit)
access : read-write

BCED : Bulk Current Head ED\nPointer to indicate the physical address of the current endpoint of the Bulk list.
bits : 4 - 31 (28 bit)
access : read-write

DH : Done Head\nPointer to indicate the physical address of the last completed Transfer Descriptor that was added to the Done queue.
bits : 4 - 31 (28 bit)
access : read-write

FI : Frame Interval\nThis field specifies the length of a frame as (bit times - 1). For 12,000 bit times in a frame, a value of 11,999 is stored here.
bits : 0 - 13 (14 bit)
access : read-write

FSMPS : FS Largest Data Packet\nThis field specifies a value that is loaded into the Largest Data Packet Counter at the beginning of each frame.
bits : 16 - 30 (15 bit)
access : read-write

FIT : Frame Interval Toggle\nThis bit is toggled by Host Controller Driver when it loads a new value into FI (HcFmInterval[13:0]).\n
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FR : Frame Remaining\nWhen the Host Controller is in the USBOPERATIONAL state, this 14-bit field decrements each 12 MHz clock period. When the count reaches 0, (end of frame) the counter reloads with Frame Interval. In addition, the counter loads when the Host Controller transitions into USBOPERATIONAL.
bits : 0 - 13 (14 bit)
access : read-only

FRT : Frame Remaining Toggle\nThis bit is loaded from the FIT (HcFmInterval[31]) whenever FR (HcFmRemaining[13:0]) reaches 0
bits : 31 - 31 (1 bit)
access : read-only

FN : Frame Number\nThis 16-bit incrementing counter field is incremented coincident with the loading of FR (HcFmRemaining[13:0]). The count rolls over from 'FFFFh' to '0h.'
bits : 0 - 15 (16 bit)
access : read-only

CBSR : Control Bulk Service Ratio\nThis specifies the service ratio between Control and Bulk EDs. Before processing any of the non-periodic lists, HC must compare the ratio specified with its internal count on how many nonempty Control EDs have been processed, in determining whether to continue serving another Control ED or switching to Bulk EDs. The internal count will be retained when crossing the frame boundary. In case of reset, HCD is responsible for restoring this\nValue.\n
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PLE : Periodic List Enable Bit When set, this bit enables processing of the Periodic (interrupt and isochronous) list. The Host Controller checks this bit prior to attempting any periodic transfers in a frame. Note: To enable the processing of the Isochronous list, user has to set both PLE and IE (HcControl[3]) high.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IE : Isochronous Enable Bit\nBoth ISOEn and PLE (HcControl[2]) high enables Host Controller to process the Isochronous list. Either ISOEn or PLE (HcControl[2]) is low disables Host Controller to process the Isochronous list.\n
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CLE : Control List Enable Bit\n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BLE : Bulk List Enable Bit\n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HCFS : Host Controller Functional State\nThis field sets the Host Controller state. The Controller may force a state change from USBSUSPEND to USBRESUME after detecting resume signaling from a downstream port. States are:\n
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PS : Periodic Start\nThis field contains a value used by the List Processor to determine where in a frame the Periodic List processing must begin.
bits : 0 - 13 (14 bit)
access : read-write

LST : Low-Speed Threshold\n
bits : 0 - 11 (12 bit)
access : read-write

NDP : Number Downstream Ports\nRoot Hub supports two downstream ports. It's 2 in this Root Hub.
bits : 0 - 7 (8 bit)
access : read-write

PSM : Power Switching Mode\nThis bit is used to specify how the power switching of the Root Hub ports is controlled.\n
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OCPM : Overcurrent Protection Mode\nThis bit describes how the over current status for the Root Hub ports reported. This bit is only valid when NOCP (HcRhDescriptorA[12]) is cleared.\n
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

NOCP : No Overcurrent Protection\nThis bit describes how the over current status for the Root Hub ports reported.\n
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PPCM : Port Power Control Mask\nGlobal power switching. This field is only valid if PowerSwitchingMode is set (individual port switching). When set, the port only responds to individual port power switching commands (Set/ClearPortPower). When cleared, the port only responds to global power switching commands (Set/ClearGlobalPower).\nNote: PPCM[15:3] and PPCM[0] are reserved.
bits : 16 - 31 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LPS : Clear Global Power\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OCI : Overcurrent Indicator\nThis bit reflects the state of the over current status pin. This field is only valid if NOCP (HcRhDesA[12]) and OCPM (HcRhDesA[11]) are cleared.\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DRWE : Device Remote Wakeup Enable Bit\nThis bit controls if port's Connect Status Change as a remote wake-up event.\nWrite Operation:\n
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LPSC : SetGlobalPower\n
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OCIC : Over Current Indicator Change\nThis bit is set by hardware when a change has occurred in OCI (HcRhStatus[1]).\nWrite 1 to clear this bit to zero.\n
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CRWE : Clear Remote Wake-Up Enable Bit\nThis bit is use to clear DRWE (HcRhStatus[15]).\nThis bit always read as zero.\nWrite Operation:\n
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CCS : CurrentConnectStatus (Read) Or ClearPortEnable Bit (Write)\nWrite Operation:\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PES : Port Enable Status\nWrite Operation:\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PSS : Port Suspend Status\nThis bit indicates the port is suspended\nWrite Operation:\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

POCI : Port Over Current Indicator (Read) Or Clear Port Suspend (Write) This bit reflects the state of the over current status pin dedicated to this port. This field is only valid if NOCP (HcRhDescriptorA[12]) is cleared and OCPM (HcRhDescriptorA[11]) is set. This bit is also used to initiate the selective result sequence for the port. Write Operation:
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PRS : Port Reset Status\nThis bit reflects the reset state of the port.\nWrite Operation:\n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PPS : Port Power Status\nThis bit reflects the power state of the port regardless of the power switching mode.\nWrite Operation:\n
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LSDA : Low Speed Device Attached (Read) Or Clear Port Power (Write)\nThis bit defines the speed (and bud idle) of the attached device. It is only valid when CCS (HcRhPortStatus1[0]) is set.\nThis bit is also used to clear port power.\nWrite Operation:\n
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CSC : Connect Status Change\nThis bit indicates connect or disconnect event has been detected (CCS (HcRhPortStatus1[0]) changed).\nWrite 1 to clear this bit to zero.\n
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PESC : Port Enable Status Change\nThis bit indicates that the port has been disabled (PES (HcRhPortStatus1[1]) cleared) due to a hardware event.\nWrite 1 to clear this bit to zero.\n
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PSSC : Port Suspend Status Change\nThis bit indicates the completion of the selective resume sequence for the port.\nWrite 1 to clear this bit to zero.\n
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OCIC : Port Over Current Indicator Change\nThis bit is set when POCI (HcRhPortStatus1[3]) changes.\nWrite 1 to clear this bit to zero.\n
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PRSC : Port Reset Status Change\nThis bit indicates that the port reset signal has completed.\nWrite 1 to clear this bit to zero.\n
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HCR : Host Controller Reset\nThis bit is set to initiate the software reset of Host Controller. This bit is cleared by the Host Controller, upon completed of the reset operation.\nThis bit, when set, didn't reset the Root Hub and no subsequent reset signaling be asserted to its downstream ports.\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CLF : Control List Filled\nSet high to indicate there is an active TD on the Control List. It may be set by either software or the Host Controller and cleared by the Host Controller each time it begins processing the head of the Control List.\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BLF : Bulk List Filled\nSet high to indicate there is an active TD on the Bulk list. This bit may be set by either software or the Host Controller and cleared by the Host Controller each time it begins processing the head of the Bulk list.\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOC : Scheduling Overrun Count\nThese bits are incremented on each scheduling overrun error. It is initialized to 00b and wraps around at 11b. This will be incremented when a scheduling overrun is detected even if SO (HcInterruptStatus[0]) has already been set.
bits : 16 - 17 (2 bit)
access : read-write

SO : Scheduling Overrun\nSet when the List Processor determines a Schedule Overrun has occurred.\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDH : Write Back Done Head\nSet after the Host Controller has written HcDoneHead to HccaDoneHead. Further updates of the HccaDoneHead will not occur until this bit has been cleared.\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SF : Start Of Frame\nSet when the Frame Management functional block signals a 'Start of Frame' event. Host Control generates a SOF token at the same time.\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RD : Resume Detected\nSet when Host Controller detects resume signaling on a downstream port.\n
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FNO : Frame Number Overflow\nThis bit is set when bit 15 of Frame Number changes from 1 to 0 or from 0 to 1.\n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RHSC : Root Hub Status Change\nThis bit is set when the content of HcRhStatus or the content of HcRhPortStatus1 register has changed.\n
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.