\n

CAP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x38 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x80 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x3C Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x48 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CAP_CTL (CTL)

CAP_MD (MD)

CAP_MDADDR (MDADDR)

CAP_MDYADDR (MDYADDR)

CAP_SEPIA (SEPIA)

CAP_CWSP (CWSP)

CAP_CWS (CWS)

CAP_PKTSL (PKTSL)

CAP_PLNSL (PLNSL)

CAP_FRCTL (FRCTL)

CAP_STRIDE (STRIDE)

CAP_FIFOTH (FIFOTH)

CAP_PAR (PAR)

CAP_CMPADDR (CMPADDR)

CAP_PKTSM (PKTSM)

CAP_PLNSM (PLNSM)

CAP_CURADDRP (CURADDRP)

CAP_CURADDRY (CURADDRY)

CAP_CURADDRU (CURADDRU)

CAP_CURVADDR (CURVADDR)

CAP_PKTBA0 (PKTBA0)

CAP_PKTBA1 (PKTBA1)

CAP_INT (INT)

CAP_YBA (YBA)

CAP_UBA (UBA)

CAP_VBA (VBA)

CAP_POSTERIZE (POSTERIZE)


CAP_CTL (CTL)

Image Capture Interface Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_CTL CAP_CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPEN ADDRSW PLNEN PKTEN SHUTTER UPDATE VPRST

CAPEN : Image Capture Interface Enable\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Image Capture Interface Disabled

#1 : 1

Image Capture Interface Enabled

End of enumeration elements list.

ADDRSW : Packet Buffer Address Switch\n
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Packet buffer address switch Disabled

#1 : 1

Packet buffer address switch Enabled

End of enumeration elements list.

PLNEN : Planar Output Enable\n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Planar output Disabled

#1 : 1

Planar output Enabled

End of enumeration elements list.

PKTEN : Packet Output Enable\n
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Packet output Disabled

#1 : 1

Packet output Enabled

End of enumeration elements list.

SHUTTER : Image Capture Interface Automatically Disable The Capture Inteface After A Frame Had Been Captured\n
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

Shutter Disabled

#1 : 1

Shutter Enabled

End of enumeration elements list.

UPDATE : Update Register At New Frame\n
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

#0 : 0

Update register at new frame Disabled

#1 : 1

Update register at new frame Enabled (Auto clear to 0 when register updated)

End of enumeration elements list.

VPRST : Capture Interface Reset\n
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

Capture interface reset Disabled

#1 : 1

Capture interface reset Enabled

End of enumeration elements list.


CAP_MD (MD)

Motion Detection Register
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_MD CAP_MD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MDEN MDBS MDSM MDDF MDTHR

MDEN : Motion Detection Enable\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

CAP_MD Disabled

#1 : 1

CAP_MD Enabled

End of enumeration elements list.

MDBS : Motion Detection Block Size\n
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

16x16

#1 : 1

8x8

End of enumeration elements list.

MDSM : Motion Detection Save Mode\n
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

1 bit DIFF + 7 bit Y Differential

#1 : 1

1 bit DIFF only

End of enumeration elements list.

MDDF : Motion Detection Detect Frequency\n
bits : 10 - 11 (2 bit)
access : read-write

Enumeration:

#00 : 0

Each frame

#01 : 1

Every 2 frame

#10 : 2

Every 3 frame

#11 : 3

Every 4 frame

End of enumeration elements list.

MDTHR : Motion Detection Differential Threshold
bits : 16 - 20 (5 bit)
access : read-write


CAP_MDADDR (MDADDR)

Motion Detection Output Address Register
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_MDADDR CAP_MDADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MDADDR

MDADDR : Motion Detection Output Address Register (Word Alignment)
bits : 0 - 31 (32 bit)
access : read-write


CAP_MDYADDR (MDYADDR)

Motion Detection Temp Y Output Address Register
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_MDYADDR CAP_MDYADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MDYADDR

MDYADDR : Motion Detection Temp Y Output Address Register (Word Alignment)
bits : 0 - 31 (32 bit)
access : read-write


CAP_SEPIA (SEPIA)

Sepia Effect Control Register
address_offset : 0x1C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_SEPIA CAP_SEPIA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VCOMP UCOMP

VCOMP : Define the constant V component while Sepia color effect is turned on.
bits : 0 - 7 (8 bit)
access : read-write

UCOMP : Define the constant U component while Sepia color effect is turned on.
bits : 8 - 15 (8 bit)
access : read-write


CAP_CWSP (CWSP)

Cropping Window Starting Address Register
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_CWSP CAP_CWSP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CWSADDRH CWSADDRV

CWSADDRH : Cropping Window Horizontal Starting Address
bits : 0 - 11 (12 bit)
access : read-write

CWSADDRV : Cropping Window Vertical Starting Address
bits : 16 - 26 (11 bit)
access : read-write


CAP_CWS (CWS)

Cropping Window Size Register
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_CWS CAP_CWS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CWW CWH

CWW : Cropping Window Width
bits : 0 - 11 (12 bit)
access : read-write

CWH : Cropping Window Height
bits : 16 - 26 (11 bit)
access : read-write


CAP_PKTSL (PKTSL)

Packet Scaling Vertical/Horizontal Factor Register (LSB)
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_PKTSL CAP_PKTSL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PKTSHML PKTSHNL PKTSVML PKTSVNL

PKTSHML : Packet Scaling Horizontal Factor M (Lower 8-Bit)\nSpecifies the lower 8-bit of denominator part (M) of the horizontal scaling factor.\nThe lower 8-bit will be cascaded with higher 8-bit (PKDSHMH) to form a 16-bit denominator (M) of vertical factor.\nThe output image width will be equal to the image width * N/M.\nNote: The value of N must be equal to or less than M.
bits : 0 - 7 (8 bit)
access : read-write

PKTSHNL : Packet Scaling Horizontal Factor N (Lower 8-Bit)\nSpecify the lower 8-bit of numerator part (N) of the horizontal scaling factor.\nThe lower 8-bit will be cascaded with higher 8-bit (PKDSHNH) to form a 16-bit numerator of horizontal factor.
bits : 8 - 15 (8 bit)
access : read-write

PKTSVML : Packet Scaling Vertical Factor M (Lower 8-Bit)\nSpecify the lower 8-bit of denominator part (M) of the vertical scaling factor.\nThe lower 8-bit will be cascaded with higher 8-bit (PKDSVMH) to form a 16-bit denominator (M) of vertical factor.\nThe output image width will be equal to the image height * N/M.\nNote: The value of N must be equal to or less than M.
bits : 16 - 23 (8 bit)
access : read-write

PKTSVNL : Packet Scaling Vertical Factor N (Lower 8-Bit)\nSpecify the lower 8-bit of numerator part (N) of the vertical scaling factor. \nThe lower 8-bit will be cascaded with higher 8-bit (PKDSVNH) to form a 16-bit numerator of vertical factor.
bits : 24 - 31 (8 bit)
access : read-write


CAP_PLNSL (PLNSL)

Planar Scaling Vertical/Horizontal Factor Register (LSB)
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_PLNSL CAP_PLNSL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PLNSHML PLNSHNL PLNSVML PLNSVNL

PLNSHML : Planar Scaling Horizontal Factor M (Lower 8-Bit)\nSpecify the lower 8-bit of denominator part (M) of the horizontal scaling factor.\nThe lower 8-bit will be cascaded with higher 8-bit (PNDSHMH) to form a 16-bit denominator (M) of vertical factor.\nThe output image width will be equal to the image width * N/M.\nNote: The value of N must be equal to or less than M.
bits : 0 - 7 (8 bit)
access : read-write

PLNSHNL : Planar Scaling Horizontal Factor N (Lower 8-Bit)\nSpecify the lower 8-bit of numerator part (N) of the horizontal scaling factor.\nThe lower 8-bit will be cascaded with higher 8-bit (PNDSHNH) to form a 16-bit numerator of horizontal factor.
bits : 8 - 15 (8 bit)
access : read-write

PLNSVML : Planar Scaling Vertical Factor M (Lower 8-Bit)\nSpecify the lower 8-bit of denominator part (M) of the vertical scaling factor.\nThe lower 8-bit will be cascaded with higher 8-bit (PNDSVMH) to form a 16-bit denominator (M) of vertical factor.\nThe output image width will be equal to the image height * N/M.\nNote: The value of N must be equal to or less than M.
bits : 16 - 23 (8 bit)
access : read-write

PLNSVNL : Planar Scaling Vertical Factor N (Lower 8-Bit)\nSpecify the lower 8-bit of numerator part (N) of the vertical scaling factor. \nThe lower 8-bit will be cascaded with higher 8-bit (PNDSVNH) to form a 16-bit numerator of vertical factor.
bits : 24 - 31 (8 bit)
access : read-write


CAP_FRCTL (FRCTL)

Scaling Frame Rate Factor Register
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_FRCTL CAP_FRCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FRM FRN

FRM : Scaling Frame Rate Factor M\nSpecify the denominator part (M) of the frame rate scaling factor.\nThe output image frame rate will be equal to input image frame rate * (N/M).\nNote: The value of N must be equal to or less than M.
bits : 0 - 5 (6 bit)
access : read-write

FRN : Scaling Frame Rate Factor N\nSpecify the denominator part (N) of the frame rate scaling factor.
bits : 8 - 13 (6 bit)
access : read-write


CAP_STRIDE (STRIDE)

Frame Output Pixel Stride Width Register
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_STRIDE CAP_STRIDE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PKTSTRIDE PLNSTRIDE

PKTSTRIDE : Packet Frame Output Pixel Stride Width\nThe output pixel stride size of packet pipe.
bits : 0 - 13 (14 bit)
access : read-write

PLNSTRIDE : Planar Frame Output Pixel Stride Width\nThe output pixel stride size of planar pipe.
bits : 16 - 29 (14 bit)
access : read-write


CAP_FIFOTH (FIFOTH)

FIFO Threshold Register
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_FIFOTH CAP_FIFOTH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PLNVFTH PLNUFTH PLNYFTH PKTFTH OVF

PLNVFTH : Planar V FIFO Threshold
bits : 0 - 3 (4 bit)
access : read-write

PLNUFTH : Planar U FIFO Threshold
bits : 8 - 11 (4 bit)
access : read-write

PLNYFTH : Planar Y FIFO Threshold
bits : 16 - 20 (5 bit)
access : read-write

PKTFTH : Packet FIFO Threshold
bits : 24 - 28 (5 bit)
access : read-write

OVF : FIFO Overflow Flag
bits : 31 - 31 (1 bit)
access : read-write


CAP_PAR (PAR)

Image Capture Interface Parameter Register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_PAR CAP_PAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INFMT SENTYPE INDATORD OUTFMT RANGE PLNFMT PCLKP HSP VSP COLORCTL FBB

INFMT : Sensor Input Data Format\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

YCbCr422

#1 : 1

RGB565

End of enumeration elements list.

SENTYPE : Sensor Input Type\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

CCIR601

#1 : 1

CCIR656, VSync Hsync embedded in the data signal

End of enumeration elements list.

INDATORD : Sensor Input Data Order\n
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

#00 : 0

Y0 U0 Y1 V0

#01 : 1

Y0 V0 Y1 U0

#10 : 2

U0 Y0 V0 Y1

#11 : 3

V0 Y0 U0 Y1

End of enumeration elements list.

OUTFMT : Image Data Format Output To System Memory\n
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 0

YCbCr422

#01 : 1

Only output Y

#10 : 2

RGB555

#11 : 3

RGB565

End of enumeration elements list.

RANGE : Scale Input YUV CCIR601 Color Range To Full Range\n
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

default

#1 : 1

Scale to full range

End of enumeration elements list.

PLNFMT : Planar Output YUV Format\n
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

YUV422

#1 : 1

YUV420

End of enumeration elements list.

PCLKP : Sensor Pixel Clock Polarity\n
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

Input video data and signals are latched by falling edge of Pixel Clock

#1 : 1

Input video data and signals are latched by rising edge of Pixel Clock

End of enumeration elements list.

HSP : Sensor Hsync Polarity\n
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

Sync Low

#1 : 1

Sync High

End of enumeration elements list.

VSP : Sensor Vsync Polarity\n
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Sync Low

#1 : 1

Sync High

End of enumeration elements list.

COLORCTL : Special COLORCTL Processing\n
bits : 11 - 12 (2 bit)
access : read-write

Enumeration:

#00 : 0

Normal Color

#01 : 1

Sepia effect, corresponding U,V component value is set at register CAP_SEPIA

#10 : 2

Negative picture

#11 : 3

Posterize image, the Y, U, V components posterizing factor are set at register CAP_POSTERIZE

End of enumeration elements list.

FBB : Field By Blank\nHardware will tag field0 or field1 by vertical blanking instead of FIELD flag in ccir-656 mode.\n
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

#0 : 0

Field by blank Disabled

#1 : 1

Field by blank Enabled

End of enumeration elements list.


CAP_CMPADDR (CMPADDR)

Compare Memory Base Address Register
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_CMPADDR CAP_CMPADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPADDR

CMPADDR : Compare Memory Base Address Word aligns address ignore the bits [1:0].
bits : 0 - 31 (32 bit)
access : read-write


CAP_PKTSM (PKTSM)

Packet Scaling Vertical/Horizontal Factor Register (MSB)
address_offset : 0x48 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_PKTSM CAP_PKTSM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PKTSHMH PKTSHNH PKTSVMH PKTSVNH

PKTSHMH : Packet Scaling Horizontal Factor M (Higher 8-Bit) Specify the lower 8-bit of denominator part (M) of the horizontal scaling factor. Please refer to the register CAP_PKTSL for the detailed operation.
bits : 0 - 7 (8 bit)
access : read-write

PKTSHNH : Packet Scaling Horizontal Factor N (Higher 8-Bit) Specify the lower 8-bit of numerator part (N) of the horizontal scaling factor. Please refer to the register CAP_PKTSL for the detailed operation.
bits : 8 - 15 (8 bit)
access : read-write

PKTSVMH : Packet Scaling Vertical Factor M (Higher 8-Bit) Specify the lower 8-bit of denominator part (M) of the vertical scaling factor. Please refer to the register CAP_PKTSL to check the cooperation between these two registers.
bits : 16 - 23 (8 bit)
access : read-write

PKTSVNH : Packet Scaling Vertical Factor N (Higher 8-Bit) Specify the higher 8-bit of numerator part (N) of the vertical scaling factor. Please refer to the register CAP_PKTSL to check the cooperation between these two registers.
bits : 24 - 31 (8 bit)
access : read-write


CAP_PLNSM (PLNSM)

Planar Scaling Vertical/Horizontal Factor Register (MSB)
address_offset : 0x4C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_PLNSM CAP_PLNSM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PLNSHMH PLNSHNH PLNSVMH PLNSVNH

PLNSHMH : Planar Scaling Horizontal Factor M (Higher 8-Bit) Specifies the higher 8-bit of denominator part (M) of the horizontal scaling factor For detailed programming, please refer to the register CAP_PLNSL .
bits : 0 - 7 (8 bit)
access : read-write

PLNSHNH : Planar Scaling Horizontal Factor N (Higher 8-Bit) Specifies the higher 8-bit of numerator part (N) of the horizontal scaling factor. For detailed programming, please refer to the register CAP_PLNSL .
bits : 8 - 15 (8 bit)
access : read-write

PLNSVMH : Planar Scaling Vertical Factor M (Higher 8-Bit) Specifies the lower 8-bit of denominator part (M) of the vertical scaling factor. For detailed programming, please refer to the register CAP_PLNSL .
bits : 16 - 23 (8 bit)
access : read-write

PLNSVNH : Planar Scaling Vertical Factor N (Higher 8-Bit) Specifies the higher 8-bit of numerator part (N) of the vertical scaling factor. For detailed programming, please refer to the register CAP_PLNSL .
bits : 24 - 31 (8 bit)
access : read-write


CAP_CURADDRP (CURADDRP)

Current Packet System Memory Address Register
address_offset : 0x50 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CAP_CURADDRP CAP_CURADDRP read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURADDR

CURADDR : Current Packet Output Memory Address
bits : 0 - 31 (32 bit)
access : read-only


CAP_CURADDRY (CURADDRY)

Current Planar Y System Memory Address Register
address_offset : 0x54 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CAP_CURADDRY CAP_CURADDRY read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURADDR

CURADDR : Current Planar Y Output Memory Address
bits : 0 - 31 (32 bit)
access : read-only


CAP_CURADDRU (CURADDRU)

Current Planar U System Memory Address Register
address_offset : 0x58 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CAP_CURADDRU CAP_CURADDRU read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURADDR

CURADDR : Current Planar U Output Memory Address
bits : 0 - 31 (32 bit)
access : read-only


CAP_CURVADDR (CURVADDR)

Current Planar V System Memory Address Register
address_offset : 0x5C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CAP_CURVADDR CAP_CURVADDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURADDR

CURADDR : Current Planar V Output Memory Address
bits : 0 - 31 (32 bit)
access : read-only


CAP_PKTBA0 (PKTBA0)

System Memory Packet Base Address 0 Register
address_offset : 0x60 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_PKTBA0 CAP_PKTBA0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASEADDR

BASEADDR : System Memory Packet Base Address 0 Word aligns address ignore the bits [1:0].
bits : 0 - 31 (32 bit)
access : read-write


CAP_PKTBA1 (PKTBA1)

System Memory Packet Base Address 1 Register
address_offset : 0x64 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_PKTBA1 CAP_PKTBA1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASEADDR

BASEADDR : System Memory Packet Base Address 1 Word aligns address ignore the bits [1:0].
bits : 0 - 31 (32 bit)
access : read-write


CAP_INT (INT)

Image Capture Interface Interrupt Register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_INT CAP_INT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VINTF MEINTF ADDRMINTF MDINTF VIEN MEIEN ADDRMIEN MDIEN

VINTF : Video Frame End Interrupt\nIf this bit shows 1, receiving a frame completed.\nWrite 1 to clear it.
bits : 0 - 0 (1 bit)
access : read-write

MEINTF : Bus Master Transfer Error Interrupt\nIf this bit shows 1, Transfer Error occurred. Write 1 to clear it.
bits : 1 - 1 (1 bit)
access : read-write

ADDRMINTF : Memory Address Match Interrupt\nIf this bit shows 1, Memory Address Match Interrupt occurred.\nWrite 1 to clear it.
bits : 3 - 3 (1 bit)
access : read-write

MDINTF : Motion Detection Output Finish Interrupt\nIf this bit shows 1, Motion Detection Output Finish Interrupt occurred.\nWrite 1 to clear it.
bits : 4 - 4 (1 bit)
access : read-write

VIEN : Video Frame End Interrupt Enable\n
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

Video frame end interrupt Disabled

#1 : 1

Video frame end interrupt Enabled

End of enumeration elements list.

MEIEN : System Memory Error Interrupt Enable\n
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

#0 : 0

System memory error interrupt Disabled

#1 : 1

System memory error interrupt Enabled

End of enumeration elements list.

ADDRMIEN : Address Match Interrupt Enable\n
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

#0 : 0

Address match interrupt Disabled

#1 : 1

Address match interrupt Enabled

End of enumeration elements list.

MDIEN : Motion Detection Output Finish Interrupt Enable\n
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

#0 : 0

CAP_MD finish interrupt Disabled

#1 : 1

CAP_MD finish interrupt Enabled

End of enumeration elements list.


CAP_YBA (YBA)

System Memory Planar Y Base Address Register
address_offset : 0x80 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_YBA CAP_YBA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASEADDR

BASEADDR : System Memory Planar Y Base Address Word aligns address ignore the bits [1:0].
bits : 0 - 31 (32 bit)
access : read-write


CAP_UBA (UBA)

System Memory Planar U Base Address Register
address_offset : 0x84 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_UBA CAP_UBA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASEADDR

BASEADDR : System Memory Planar U Base Address Word aligns address ignore the bits [1:0].
bits : 0 - 31 (32 bit)
access : read-write


CAP_VBA (VBA)

System Memory Planar V Base Address Register
address_offset : 0x88 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_VBA CAP_VBA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASEADDR

BASEADDR : System Memory Planar V Base Address Word aligns address ignore the bits [1:0].
bits : 0 - 31 (32 bit)
access : read-write


CAP_POSTERIZE (POSTERIZE)

YUV Component Posterizing Factor Register
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAP_POSTERIZE CAP_POSTERIZE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VCOMP UCOMP YCOMP

VCOMP : V Component Posterizing Factor\n
bits : 0 - 7 (8 bit)
access : read-write

UCOMP : U Component Posterizing Factor\n
bits : 8 - 15 (8 bit)
access : read-write

YCOMP : Y Component Posterizing Factor\n
bits : 16 - 23 (8 bit)
access : read-write



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