Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
CRC Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRCEN : CRC Channel Enable Bit\n
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
CRC function Disabled
#1 : 1
CRC function Enabled
End of enumeration elements list.
CRCRST : CRC Engine Reset\nNote: Setting this bit will reload the initial seed value.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
No effect
#1 : 1
Reset the internal CRC state machine and internal buffer. The contents of control register will not be cleared. This bit will automatically be cleared after few clock cycles
End of enumeration elements list.
DATREV : Write Data Order Reverse\nNote: If the write data is 0xAABBCCDD, the bit order reverse for CRC write data in is 0x55DD33BB
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
No bit order reversed for CRC write data in
#1 : 1
Bit order reversed for CRC write data in (per byte)
End of enumeration elements list.
CHKSREV : Checksum Reverse\nNote: If the checksum data is 0XDD7B0F2E, the bit order reversed for CRC checksum is 0x74F0DEBB.
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
No bit order reverse for CRC checksum
#1 : 1
Bit order reverse for CRC checksum
End of enumeration elements list.
DATFMT : Write Data Complement\n
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
No bit order reversed for CRC write data in
#1 : 1
1's complement for CRC write data in
End of enumeration elements list.
CHKSFMT : Checksum Complement\n
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
No bit order reverse for CRC checksum
#1 : 1
1's complement for CRC checksum
End of enumeration elements list.
DATLEN : CPU Write Data Length
This field indicates the write data length.
Note: When the data length is 8-bit mode, the valid data is DATA [7:0] if the data length is 16-bit mode, the valid data is DATA [15:0].
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
#00 : 0
Data length is 8-bit mode
#01 : 1
Data length is 16-bit mode.\nData length is 32-bit mode
End of enumeration elements list.
CRCMODE : CRC Polynomial Mode Selection\n
bits : 30 - 31 (2 bit)
access : read-write
Enumeration:
#00 : 0
CRC-CCITT Polynomial mode
#01 : 1
CRC-8 Polynomial mode
#10 : 2
CRC-16 Polynomial mode
#11 : 3
CRC-32 Polynomial mode
End of enumeration elements list.
CRC Write Data Register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : CRC Write Data Bits\nSoftware can write data to this field to perform CRC operation, or uses PDMA function to get the data from memory\n
bits : 0 - 31 (32 bit)
access : read-write
CRC Seed Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEED : CRC Seed Bits\nThis field indicates the CRC seed value.
bits : 0 - 31 (32 bit)
access : read-write
CRC Checksum Register
address_offset : 0xC Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CHECKSUM : CRC Checksum Bits\nThis field indicates the CRC checksum.
bits : 0 - 31 (32 bit)
access : read-only
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.