\n
address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x80 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x40 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x20 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
Dividend Source Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIVIDEND : Dividend Source\nThis register is given the dividend of divider before calculation is started.
bits : 0 - 31 (32 bit)
access : read-write
Divider Status Register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DIVBYZERO : Divisor Zero Warning (Read Only)\nNote: The DIVBYZERO flag is used to indicate divide-by-zero situation and updated whenever HDIV_DIVISOR is written. This bit is read only.
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
The divisor is not 0
#1 : 1
The divisor is 0
End of enumeration elements list.
Dividend Source Register
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Divisor Source Resister
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Quotient Result Resister
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Remainder Result Register
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Divisor Source Resister
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIVISOR : Divisor Source\nThis register is given the divisor of divider before calculation starts.\nNote: When this register is written, hardware divider will start calculation.
bits : 0 - 15 (16 bit)
access : read-write
Dividend Source Register
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Divisor Source Resister
address_offset : 0x44 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Quotient Result Resister
address_offset : 0x48 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Remainder Result Register
address_offset : 0x4C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Quotient Result Resister
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QUOTIENT : Quotient Result\nThis register holds the quotient result of divider after calculation is completed.
bits : 0 - 31 (32 bit)
access : read-write
CRC16 Control Register
address_offset : 0x80 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEED : CRC Seed Data\nThis register was provided to be the initial value for CRC operation.\nWrite data to this register before CRC operation.\nWrite this register will also clear CRC16 register.
bits : 0 - 15 (16 bit)
access : read-write
CNT : CRC Byte Length
bits : 16 - 25 (10 bit)
access : read-write
BITORD : Bit order\n0: [0:7]\n1: [7:0]
bits : 30 - 30 (1 bit)
access : read-write
BYTEORD : Byte order\n0: Big endian\n1: Little endian
bits : 31 - 31 (1 bit)
access : read-write
CRC16 Data in Register
address_offset : 0x84 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIN : CRC Data in\nThis register was provided to be the initial value for CRC operation.\nWrite data to this register before CRC operation.\nRead data from this register after CRC read operation.
bits : 0 - 31 (32 bit)
access : read-write
CRC16 Result Value Register
address_offset : 0x88 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESULT : CRC Result Value\nThis register provided current value of CRC durning calculation.
bits : 0 - 15 (16 bit)
access : read-only
Remainder Result Register
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REM : Remainder Result\nThe remainder of hardware divider is 16-bit sign integer (REM[15:0]) with sign extension (REM[31:16]) to 32-bit integer.
bits : 0 - 31 (32 bit)
access : read-write
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