\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
OTG_FS power and clock gating control register (OTG_FS_PCGCCTL)
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STPPCLK : Stop PHY clock
bits : 0 - 0 (1 bit)
GATEHCLK : Gate HCLK
bits : 1 - 1 (1 bit)
PHYSUSP : PHY Suspended
bits : 4 - 4 (1 bit)
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