\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
Access control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LATENCY : Latency
bits : 0 - 3 (4 bit)
RUN_PD : Flash Power-down mode during Low-power run mode
bits : 13 - 13 (1 bit)
SLEEP_PD : Flash Power-down mode during Low-power sleep mode
bits : 14 - 14 (1 bit)
LVEN : LVEN
bits : 15 - 15 (1 bit)
Flash option key register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
OPTKEYR : OPTKEYR
bits : 0 - 31 (32 bit)
Flash low voltage key register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
LVEKEYR : LVEKEYR
bits : 0 - 31 (32 bit)
Flash status register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NSEOP : NSEOP
bits : 0 - 0 (1 bit)
access : read-write
NSOPERR : NSOPERR
bits : 1 - 1 (1 bit)
access : read-write
NSPROGERR : NSPROGERR
bits : 3 - 3 (1 bit)
access : read-write
NSWRPERR : NSWRPERR
bits : 4 - 4 (1 bit)
access : read-write
NSPGAERR : NSPGAERR
bits : 5 - 5 (1 bit)
access : read-write
NSSIZERR : NSSIZERR
bits : 6 - 6 (1 bit)
access : read-write
NSPGSERR : NSPGSERR
bits : 7 - 7 (1 bit)
access : read-write
OPTWERR : OPTWERR
bits : 13 - 13 (1 bit)
access : read-write
OPTVERR : OPTVERR
bits : 15 - 15 (1 bit)
access : read-write
NSBSY : NSBusy
bits : 16 - 16 (1 bit)
access : read-only
Flash status register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECEOP : SECEOP
bits : 0 - 0 (1 bit)
access : read-write
SECOPERR : SECOPERR
bits : 1 - 1 (1 bit)
access : read-write
SECPROGERR : SECPROGERR
bits : 3 - 3 (1 bit)
access : read-write
SECWRPERR : SECWRPERR
bits : 4 - 4 (1 bit)
access : read-write
SECPGAERR : SECPGAERR
bits : 5 - 5 (1 bit)
access : read-write
SECSIZERR : SECSIZERR
bits : 6 - 6 (1 bit)
access : read-write
SECPGSERR : SECPGSERR
bits : 7 - 7 (1 bit)
access : read-write
SECRDERR : Secure read protection error
bits : 14 - 14 (1 bit)
access : read-write
SECBSY : SECBusy
bits : 16 - 16 (1 bit)
access : read-only
Flash non-secure control register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NSPG : NSPG
bits : 0 - 0 (1 bit)
NSPER : NSPER
bits : 1 - 1 (1 bit)
NSMER1 : NSMER1
bits : 2 - 2 (1 bit)
NSPNB : NSPNB
bits : 3 - 9 (7 bit)
NSBKER : NSBKER
bits : 11 - 11 (1 bit)
NSMER2 : NSMER2
bits : 15 - 15 (1 bit)
NSSTRT : Options modification start
bits : 16 - 16 (1 bit)
OPTSTRT : Options modification start
bits : 17 - 17 (1 bit)
NSEOPIE : NSEOPIE
bits : 24 - 24 (1 bit)
NSERRIE : NSERRIE
bits : 25 - 25 (1 bit)
OBL_LAUNCH : Force the option byte loading
bits : 27 - 27 (1 bit)
OPTLOCK : Options Lock
bits : 30 - 30 (1 bit)
NSLOCK : NSLOCK
bits : 31 - 31 (1 bit)
Flash secure control register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECPG : SECPG
bits : 0 - 0 (1 bit)
SECPER : SECPER
bits : 1 - 1 (1 bit)
SECMER1 : SECMER1
bits : 2 - 2 (1 bit)
SECPNB : SECPNB
bits : 3 - 9 (7 bit)
SECBKER : SECBKER
bits : 11 - 11 (1 bit)
SECMER2 : SECMER2
bits : 15 - 15 (1 bit)
SECSTRT : SECSTRT
bits : 16 - 16 (1 bit)
SECEOPIE : SECEOPIE
bits : 24 - 24 (1 bit)
SECERRIE : SECERRIE
bits : 25 - 25 (1 bit)
SECRDERRIE : SECRDERRIE
bits : 26 - 26 (1 bit)
SECINV : SECINV
bits : 29 - 29 (1 bit)
SECLOCK : SECLOCK
bits : 31 - 31 (1 bit)
Flash ECC register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDR_ECC : ECC fail address
bits : 0 - 18 (19 bit)
access : read-only
BK_ECC : BK_ECC
bits : 21 - 21 (1 bit)
access : read-only
SYSF_ECC : SYSF_ECC
bits : 22 - 22 (1 bit)
access : read-only
ECCIE : ECC correction interrupt enable
bits : 24 - 24 (1 bit)
access : read-write
ECCC2 : ECCC2
bits : 28 - 28 (1 bit)
access : read-write
ECCD2 : ECCD2
bits : 29 - 29 (1 bit)
access : read-write
ECCC : ECC correction
bits : 30 - 30 (1 bit)
access : read-write
ECCD : ECC detection
bits : 31 - 31 (1 bit)
access : read-write
Power down key register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PDKEYR : RUN_PD in FLASH_ACR key
bits : 0 - 31 (32 bit)
Flash option register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RDP : Read protection level
bits : 0 - 7 (8 bit)
BOR_LEV : BOR reset Level
bits : 8 - 10 (3 bit)
nRST_STOP : nRST_STOP
bits : 12 - 12 (1 bit)
nRST_STDBY : nRST_STDBY
bits : 13 - 13 (1 bit)
nRST_SHDW : nRST_SHDW
bits : 14 - 14 (1 bit)
IWDG_SW : Independent watchdog selection
bits : 16 - 16 (1 bit)
IWDG_STOP : Independent watchdog counter freeze in Stop mode
bits : 17 - 17 (1 bit)
IWDG_STDBY : Independent watchdog counter freeze in Standby mode
bits : 18 - 18 (1 bit)
WWDG_SW : Window watchdog selection
bits : 19 - 19 (1 bit)
SWAP_BANK : SWAP_BANK
bits : 20 - 20 (1 bit)
DB256K : DB256K
bits : 21 - 21 (1 bit)
DBANK : DBANK
bits : 22 - 22 (1 bit)
SRAM2_PE : SRAM2 parity check enable
bits : 24 - 24 (1 bit)
SRAM2_RST : SRAM2 Erase when system reset
bits : 25 - 25 (1 bit)
nSWBOOT0 : nSWBOOT0
bits : 26 - 26 (1 bit)
nBOOT0 : nBOOT0
bits : 27 - 27 (1 bit)
PA15_PUPEN : PA15_PUPEN
bits : 28 - 28 (1 bit)
TZEN : TZEN
bits : 31 - 31 (1 bit)
Flash non-secure boot address 0 register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
NSBOOTADD0 : NSBOOTADD0
bits : 7 - 31 (25 bit)
Flash non-secure boot address 1 register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
NSBOOTADD1 : NSBOOTADD1
bits : 7 - 31 (25 bit)
FFlash secure boot address 0 register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BOOT_LOCK : BOOT_LOCK
bits : 0 - 0 (1 bit)
access : read-write
SECBOOTADD0 : SECBOOTADD0
bits : 7 - 31 (25 bit)
access : write-only
Flash bank 1 secure watermak1 register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECWM1_PSTRT : SECWM1_PSTRT
bits : 0 - 6 (7 bit)
SECWM1_PEND : SECWM1_PEND
bits : 16 - 22 (7 bit)
Flash secure watermak1 register 2
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PCROP1_PSTRT : PCROP1_PSTRT
bits : 0 - 6 (7 bit)
PCROP1EN : PCROP1EN
bits : 15 - 15 (1 bit)
HDP1_PEND : HDP1_PEND
bits : 16 - 22 (7 bit)
HDP1EN : HDP1EN
bits : 31 - 31 (1 bit)
Flash Bank 1 WRP area A address register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WRP1A_PSTRT : WRP1A_PSTRT
bits : 0 - 6 (7 bit)
WRP1A_PEND : WRP1A_PEND
bits : 16 - 22 (7 bit)
Flash Bank 1 WRP area B address register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WRP1B_PSTRT : WRP1B_PSTRT
bits : 0 - 6 (7 bit)
WRP1B_PEND : WRP1B_PEND
bits : 16 - 22 (7 bit)
Flash secure watermak2 register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECWM2_PSTRT : SECWM2_PSTRT
bits : 0 - 6 (7 bit)
SECWM2_PEND : SECWM2_PEND
bits : 16 - 22 (7 bit)
Flash secure watermak2 register2
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PCROP2_PSTRT : PCROP2_PSTRT
bits : 0 - 6 (7 bit)
PCROP2EN : PCROP2EN
bits : 15 - 15 (1 bit)
HDP2_PEND : HDP2_PEND
bits : 16 - 22 (7 bit)
HDP2EN : HDP2EN
bits : 31 - 31 (1 bit)
Flash WPR2 area A address register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WRP2A_PSTRT : WRP2A_PSTRT
bits : 0 - 6 (7 bit)
WRP2A_PEND : WRP2A_PEND
bits : 16 - 22 (7 bit)
Flash WPR2 area B address register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WRP2B_PSTRT : WRP2B_PSTRT
bits : 0 - 6 (7 bit)
WRP2B_PEND : WRP2B_PEND
bits : 16 - 22 (7 bit)
Flash non-secure key register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
NSKEYR : NSKEYR
bits : 0 - 31 (32 bit)
FLASH secure block based bank 1 register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECBB1 : SECBB1
bits : 0 - 31 (32 bit)
FLASH secure block based bank 1 register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECBB1 : SECBB1
bits : 0 - 31 (32 bit)
FLASH secure block based bank 1 register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECBB1 : SECBB1
bits : 0 - 31 (32 bit)
FLASH secure block based bank 1 register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECBB1 : SECBB1
bits : 0 - 31 (32 bit)
FLASH secure block based bank 2 register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECBB2 : SECBB2
bits : 0 - 31 (32 bit)
FLASH secure block based bank 2 register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECBB2 : SECBB2
bits : 0 - 31 (32 bit)
FLASH secure block based bank 2 register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECBB2 : SECBB2
bits : 0 - 31 (32 bit)
FLASH secure block based bank 2 register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECBB2 : SECBB2
bits : 0 - 31 (32 bit)
Flash secure key register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SECKEYR : SECKEYR
bits : 0 - 31 (32 bit)
FLASH secure HDP control register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HDP1_ACCDIS : HDP1_ACCDIS
bits : 0 - 0 (1 bit)
HDP2_ACCDIS : HDP2_ACCDIS
bits : 1 - 1 (1 bit)
Power privilege configuration register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRIV : PRIV
bits : 0 - 0 (1 bit)
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